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R600/SI: Make fitsRegClass() operands const 

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
llvm-svn: 182282
This commit is contained in:
Tom Stellard 2013-05-20 15:02:01 +00:00
parent f41e3f56a5
commit b35efba4d9
2 changed files with 3 additions and 2 deletions
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2
llvm/lib/Target/R600/SIISelLowering.cpp
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@ -513,7 +513,7 @@ bool SITargetLowering::foldImm(SDValue &Operand, int32_t &Immediate,
}
/// \brief Does "Op" fit into register class "RegClass" ?
bool SITargetLowering::fitsRegClass(SelectionDAG &DAG, SDValue &Op,
bool SITargetLowering::fitsRegClass(SelectionDAG &DAG, const SDValue &Op,
unsigned RegClass) const {
MachineRegisterInfo &MRI = DAG.getMachineFunction().getRegInfo();

3
llvm/lib/Target/R600/SIISelLowering.h
View File

@ -30,7 +30,8 @@ class SITargetLowering : public AMDGPUTargetLowering {
bool foldImm(SDValue &Operand, int32_t &Immediate,
bool &ScalarSlotUsed) const;
bool fitsRegClass(SelectionDAG &DAG, SDValue &Op, unsigned RegClass) const;
bool fitsRegClass(SelectionDAG &DAG, const SDValue &Op,
unsigned RegClass) const;
void ensureSRegLimit(SelectionDAG &DAG, SDValue &Operand,
unsigned RegClass, bool &ScalarSlotUsed) const;