diff --git a/llvm/lib/Target/X86/X86InstrMMX.td b/llvm/lib/Target/X86/X86InstrMMX.td index a45bd830eda2..5c505b0b4259 100644 --- a/llvm/lib/Target/X86/X86InstrMMX.td +++ b/llvm/lib/Target/X86/X86InstrMMX.td @@ -311,11 +311,11 @@ defm MMX_PADDUSW : MMXI_binop_rm_int<0xDD, "paddusw", int_x86_mmx_paddus_w, WriteVecALU, 1>; defm MMX_PHADDW : SS3I_binop_rm_int_mm<0x01, "phaddw", int_x86_ssse3_phadd_w, - WriteVecALU>; + WritePHAdd>; defm MMX_PHADDD : SS3I_binop_rm_int_mm<0x02, "phaddd", int_x86_ssse3_phadd_d, - WriteVecALU>; + WritePHAdd>; defm MMX_PHADDSW : SS3I_binop_rm_int_mm<0x03, "phaddsw",int_x86_ssse3_phadd_sw, - WriteVecALU>; + WritePHAdd>; // -- Subtraction defm MMX_PSUBB : MMXI_binop_rm_int<0xF8, "psubb", int_x86_mmx_psub_b, @@ -369,30 +369,30 @@ defm MMX_PMADDUBSW : SS3I_binop_rm_int_mm<0x04, "pmaddubsw", int_x86_ssse3_pmadd_ub_sw, WriteVecIMul>; let Predicates = [HasSSE1] in { defm MMX_PAVGB : MMXI_binop_rm_int<0xE0, "pavgb", int_x86_mmx_pavg_b, - WriteVecIMul, 1>; + WriteVecALU, 1>; defm MMX_PAVGW : MMXI_binop_rm_int<0xE3, "pavgw", int_x86_mmx_pavg_w, - WriteVecIMul, 1>; + WriteVecALU, 1>; defm MMX_PMINUB : MMXI_binop_rm_int<0xDA, "pminub", int_x86_mmx_pminu_b, - WriteVecIMul, 1>; + WriteVecALU, 1>; defm MMX_PMINSW : MMXI_binop_rm_int<0xEA, "pminsw", int_x86_mmx_pmins_w, - WriteVecIMul, 1>; + WriteVecALU, 1>; defm MMX_PMAXUB : MMXI_binop_rm_int<0xDE, "pmaxub", int_x86_mmx_pmaxu_b, - WriteVecIMul, 1>; + WriteVecALU, 1>; defm MMX_PMAXSW : MMXI_binop_rm_int<0xEE, "pmaxsw", int_x86_mmx_pmaxs_w, - WriteVecIMul, 1>; + WriteVecALU, 1>; defm MMX_PSADBW : MMXI_binop_rm_int<0xF6, "psadbw", int_x86_mmx_psad_bw, WriteVecIMul, 1>; } defm MMX_PSIGNB : SS3I_binop_rm_int_mm<0x08, "psignb", int_x86_ssse3_psign_b, - WriteVecIMul>; + WriteVecALU>; defm MMX_PSIGNW : SS3I_binop_rm_int_mm<0x09, "psignw", int_x86_ssse3_psign_w, - WriteVecIMul>; + WriteVecALU>; defm MMX_PSIGND : SS3I_binop_rm_int_mm<0x0A, "psignd", int_x86_ssse3_psign_d, - WriteVecIMul>; + WriteVecALU>; let Constraints = "$src1 = $dst" in defm MMX_PALIGNR : ssse3_palign_mm<"palignr", int_x86_mmx_palignr_b>; diff --git a/llvm/test/CodeGen/X86/mmx-schedule.ll b/llvm/test/CodeGen/X86/mmx-schedule.ll index 53cd12ed9377..6e36d3cc6fbd 100644 --- a/llvm/test/CodeGen/X86/mmx-schedule.ll +++ b/llvm/test/CodeGen/X86/mmx-schedule.ll @@ -2354,8 +2354,8 @@ declare x86_mmx @llvm.x86.mmx.pandn(x86_mmx, x86_mmx) nounwind readnone define i64 @test_pavgb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; GENERIC-LABEL: test_pavgb: ; GENERIC: # %bb.0: -; GENERIC-NEXT: pavgb %mm1, %mm0 # sched: [5:1.00] -; GENERIC-NEXT: pavgb (%rdi), %mm0 # sched: [10:1.00] +; GENERIC-NEXT: pavgb %mm1, %mm0 # sched: [3:1.00] +; GENERIC-NEXT: pavgb (%rdi), %mm0 # sched: [8:1.00] ; GENERIC-NEXT: movq %mm0, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -2368,15 +2368,15 @@ define i64 @test_pavgb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; SLM-LABEL: test_pavgb: ; SLM: # %bb.0: -; SLM-NEXT: pavgb %mm1, %mm0 # sched: [4:1.00] -; SLM-NEXT: pavgb (%rdi), %mm0 # sched: [7:1.00] +; SLM-NEXT: pavgb %mm1, %mm0 # sched: [1:0.50] +; SLM-NEXT: pavgb (%rdi), %mm0 # sched: [4:1.00] ; SLM-NEXT: movq %mm0, %rax # sched: [1:0.50] ; SLM-NEXT: retq # sched: [4:1.00] ; ; SANDY-LABEL: test_pavgb: ; SANDY: # %bb.0: -; SANDY-NEXT: pavgb %mm1, %mm0 # sched: [5:1.00] -; SANDY-NEXT: pavgb (%rdi), %mm0 # sched: [10:1.00] +; SANDY-NEXT: pavgb %mm1, %mm0 # sched: [3:1.00] +; SANDY-NEXT: pavgb (%rdi), %mm0 # sched: [8:1.00] ; SANDY-NEXT: movq %mm0, %rax # sched: [1:0.33] ; SANDY-NEXT: retq # sched: [1:1.00] ; @@ -2410,15 +2410,15 @@ define i64 @test_pavgb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; BTVER2-LABEL: test_pavgb: ; BTVER2: # %bb.0: -; BTVER2-NEXT: pavgb %mm1, %mm0 # sched: [2:1.00] -; BTVER2-NEXT: pavgb (%rdi), %mm0 # sched: [7:1.00] +; BTVER2-NEXT: pavgb %mm1, %mm0 # sched: [1:0.50] +; BTVER2-NEXT: pavgb (%rdi), %mm0 # sched: [6:1.00] ; BTVER2-NEXT: movq %mm0, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-LABEL: test_pavgb: ; ZNVER1: # %bb.0: -; ZNVER1-NEXT: pavgb %mm1, %mm0 # sched: [4:1.00] -; ZNVER1-NEXT: pavgb (%rdi), %mm0 # sched: [11:1.00] +; ZNVER1-NEXT: pavgb %mm1, %mm0 # sched: [1:0.25] +; ZNVER1-NEXT: pavgb (%rdi), %mm0 # sched: [8:0.50] ; ZNVER1-NEXT: movq %mm0, %rax # sched: [2:1.00] ; ZNVER1-NEXT: retq # sched: [1:0.50] %1 = call x86_mmx @llvm.x86.mmx.pavg.b(x86_mmx %a0, x86_mmx %a1) @@ -2432,8 +2432,8 @@ declare x86_mmx @llvm.x86.mmx.pavg.b(x86_mmx, x86_mmx) nounwind readnone define i64 @test_pavgw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; GENERIC-LABEL: test_pavgw: ; GENERIC: # %bb.0: -; GENERIC-NEXT: pavgw %mm1, %mm0 # sched: [5:1.00] -; GENERIC-NEXT: pavgw (%rdi), %mm0 # sched: [10:1.00] +; GENERIC-NEXT: pavgw %mm1, %mm0 # sched: [3:1.00] +; GENERIC-NEXT: pavgw (%rdi), %mm0 # sched: [8:1.00] ; GENERIC-NEXT: movq %mm0, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -2446,15 +2446,15 @@ define i64 @test_pavgw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; SLM-LABEL: test_pavgw: ; SLM: # %bb.0: -; SLM-NEXT: pavgw %mm1, %mm0 # sched: [4:1.00] -; SLM-NEXT: pavgw (%rdi), %mm0 # sched: [7:1.00] +; SLM-NEXT: pavgw %mm1, %mm0 # sched: [1:0.50] +; SLM-NEXT: pavgw (%rdi), %mm0 # sched: [4:1.00] ; SLM-NEXT: movq %mm0, %rax # sched: [1:0.50] ; SLM-NEXT: retq # sched: [4:1.00] ; ; SANDY-LABEL: test_pavgw: ; SANDY: # %bb.0: -; SANDY-NEXT: pavgw %mm1, %mm0 # sched: [5:1.00] -; SANDY-NEXT: pavgw (%rdi), %mm0 # sched: [10:1.00] +; SANDY-NEXT: pavgw %mm1, %mm0 # sched: [3:1.00] +; SANDY-NEXT: pavgw (%rdi), %mm0 # sched: [8:1.00] ; SANDY-NEXT: movq %mm0, %rax # sched: [1:0.33] ; SANDY-NEXT: retq # sched: [1:1.00] ; @@ -2488,15 +2488,15 @@ define i64 @test_pavgw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; BTVER2-LABEL: test_pavgw: ; BTVER2: # %bb.0: -; BTVER2-NEXT: pavgw %mm1, %mm0 # sched: [2:1.00] -; BTVER2-NEXT: pavgw (%rdi), %mm0 # sched: [7:1.00] +; BTVER2-NEXT: pavgw %mm1, %mm0 # sched: [1:0.50] +; BTVER2-NEXT: pavgw (%rdi), %mm0 # sched: [6:1.00] ; BTVER2-NEXT: movq %mm0, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-LABEL: test_pavgw: ; ZNVER1: # %bb.0: -; ZNVER1-NEXT: pavgw %mm1, %mm0 # sched: [4:1.00] -; ZNVER1-NEXT: pavgw (%rdi), %mm0 # sched: [11:1.00] +; ZNVER1-NEXT: pavgw %mm1, %mm0 # sched: [1:0.25] +; ZNVER1-NEXT: pavgw (%rdi), %mm0 # sched: [8:0.50] ; ZNVER1-NEXT: movq %mm0, %rax # sched: [2:1.00] ; ZNVER1-NEXT: retq # sched: [1:0.50] %1 = call x86_mmx @llvm.x86.mmx.pavg.w(x86_mmx %a0, x86_mmx %a1) @@ -3746,8 +3746,8 @@ declare x86_mmx @llvm.x86.ssse3.pmadd.ub.sw(x86_mmx, x86_mmx) nounwind readnone define i64 @test_pmaxsw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; GENERIC-LABEL: test_pmaxsw: ; GENERIC: # %bb.0: -; GENERIC-NEXT: pmaxsw %mm1, %mm0 # sched: [5:1.00] -; GENERIC-NEXT: pmaxsw (%rdi), %mm0 # sched: [10:1.00] +; GENERIC-NEXT: pmaxsw %mm1, %mm0 # sched: [3:1.00] +; GENERIC-NEXT: pmaxsw (%rdi), %mm0 # sched: [8:1.00] ; GENERIC-NEXT: movq %mm0, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -3760,15 +3760,15 @@ define i64 @test_pmaxsw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; SLM-LABEL: test_pmaxsw: ; SLM: # %bb.0: -; SLM-NEXT: pmaxsw %mm1, %mm0 # sched: [4:1.00] -; SLM-NEXT: pmaxsw (%rdi), %mm0 # sched: [7:1.00] +; SLM-NEXT: pmaxsw %mm1, %mm0 # sched: [1:0.50] +; SLM-NEXT: pmaxsw (%rdi), %mm0 # sched: [4:1.00] ; SLM-NEXT: movq %mm0, %rax # sched: [1:0.50] ; SLM-NEXT: retq # sched: [4:1.00] ; ; SANDY-LABEL: test_pmaxsw: ; SANDY: # %bb.0: -; SANDY-NEXT: pmaxsw %mm1, %mm0 # sched: [5:1.00] -; SANDY-NEXT: pmaxsw (%rdi), %mm0 # sched: [10:1.00] +; SANDY-NEXT: pmaxsw %mm1, %mm0 # sched: [3:1.00] +; SANDY-NEXT: pmaxsw (%rdi), %mm0 # sched: [8:1.00] ; SANDY-NEXT: movq %mm0, %rax # sched: [1:0.33] ; SANDY-NEXT: retq # sched: [1:1.00] ; @@ -3802,15 +3802,15 @@ define i64 @test_pmaxsw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; BTVER2-LABEL: test_pmaxsw: ; BTVER2: # %bb.0: -; BTVER2-NEXT: pmaxsw %mm1, %mm0 # sched: [2:1.00] -; BTVER2-NEXT: pmaxsw (%rdi), %mm0 # sched: [7:1.00] +; BTVER2-NEXT: pmaxsw %mm1, %mm0 # sched: [1:0.50] +; BTVER2-NEXT: pmaxsw (%rdi), %mm0 # sched: [6:1.00] ; BTVER2-NEXT: movq %mm0, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-LABEL: test_pmaxsw: ; ZNVER1: # %bb.0: -; ZNVER1-NEXT: pmaxsw %mm1, %mm0 # sched: [4:1.00] -; ZNVER1-NEXT: pmaxsw (%rdi), %mm0 # sched: [11:1.00] +; ZNVER1-NEXT: pmaxsw %mm1, %mm0 # sched: [1:0.25] +; ZNVER1-NEXT: pmaxsw (%rdi), %mm0 # sched: [8:0.50] ; ZNVER1-NEXT: movq %mm0, %rax # sched: [2:1.00] ; ZNVER1-NEXT: retq # sched: [1:0.50] %1 = call x86_mmx @llvm.x86.mmx.pmaxs.w(x86_mmx %a0, x86_mmx %a1) @@ -3824,8 +3824,8 @@ declare x86_mmx @llvm.x86.mmx.pmaxs.w(x86_mmx, x86_mmx) nounwind readnone define i64 @test_pmaxub(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; GENERIC-LABEL: test_pmaxub: ; GENERIC: # %bb.0: -; GENERIC-NEXT: pmaxub %mm1, %mm0 # sched: [5:1.00] -; GENERIC-NEXT: pmaxub (%rdi), %mm0 # sched: [10:1.00] +; GENERIC-NEXT: pmaxub %mm1, %mm0 # sched: [3:1.00] +; GENERIC-NEXT: pmaxub (%rdi), %mm0 # sched: [8:1.00] ; GENERIC-NEXT: movq %mm0, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -3838,15 +3838,15 @@ define i64 @test_pmaxub(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; SLM-LABEL: test_pmaxub: ; SLM: # %bb.0: -; SLM-NEXT: pmaxub %mm1, %mm0 # sched: [4:1.00] -; SLM-NEXT: pmaxub (%rdi), %mm0 # sched: [7:1.00] +; SLM-NEXT: pmaxub %mm1, %mm0 # sched: [1:0.50] +; SLM-NEXT: pmaxub (%rdi), %mm0 # sched: [4:1.00] ; SLM-NEXT: movq %mm0, %rax # sched: [1:0.50] ; SLM-NEXT: retq # sched: [4:1.00] ; ; SANDY-LABEL: test_pmaxub: ; SANDY: # %bb.0: -; SANDY-NEXT: pmaxub %mm1, %mm0 # sched: [5:1.00] -; SANDY-NEXT: pmaxub (%rdi), %mm0 # sched: [10:1.00] +; SANDY-NEXT: pmaxub %mm1, %mm0 # sched: [3:1.00] +; SANDY-NEXT: pmaxub (%rdi), %mm0 # sched: [8:1.00] ; SANDY-NEXT: movq %mm0, %rax # sched: [1:0.33] ; SANDY-NEXT: retq # sched: [1:1.00] ; @@ -3880,15 +3880,15 @@ define i64 @test_pmaxub(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; BTVER2-LABEL: test_pmaxub: ; BTVER2: # %bb.0: -; BTVER2-NEXT: pmaxub %mm1, %mm0 # sched: [2:1.00] -; BTVER2-NEXT: pmaxub (%rdi), %mm0 # sched: [7:1.00] +; BTVER2-NEXT: pmaxub %mm1, %mm0 # sched: [1:0.50] +; BTVER2-NEXT: pmaxub (%rdi), %mm0 # sched: [6:1.00] ; BTVER2-NEXT: movq %mm0, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-LABEL: test_pmaxub: ; ZNVER1: # %bb.0: -; ZNVER1-NEXT: pmaxub %mm1, %mm0 # sched: [4:1.00] -; ZNVER1-NEXT: pmaxub (%rdi), %mm0 # sched: [11:1.00] +; ZNVER1-NEXT: pmaxub %mm1, %mm0 # sched: [1:0.25] +; ZNVER1-NEXT: pmaxub (%rdi), %mm0 # sched: [8:0.50] ; ZNVER1-NEXT: movq %mm0, %rax # sched: [2:1.00] ; ZNVER1-NEXT: retq # sched: [1:0.50] %1 = call x86_mmx @llvm.x86.mmx.pmaxu.b(x86_mmx %a0, x86_mmx %a1) @@ -3902,8 +3902,8 @@ declare x86_mmx @llvm.x86.mmx.pmaxu.b(x86_mmx, x86_mmx) nounwind readnone define i64 @test_pminsw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; GENERIC-LABEL: test_pminsw: ; GENERIC: # %bb.0: -; GENERIC-NEXT: pminsw %mm1, %mm0 # sched: [5:1.00] -; GENERIC-NEXT: pminsw (%rdi), %mm0 # sched: [10:1.00] +; GENERIC-NEXT: pminsw %mm1, %mm0 # sched: [3:1.00] +; GENERIC-NEXT: pminsw (%rdi), %mm0 # sched: [8:1.00] ; GENERIC-NEXT: movq %mm0, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -3916,15 +3916,15 @@ define i64 @test_pminsw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; SLM-LABEL: test_pminsw: ; SLM: # %bb.0: -; SLM-NEXT: pminsw %mm1, %mm0 # sched: [4:1.00] -; SLM-NEXT: pminsw (%rdi), %mm0 # sched: [7:1.00] +; SLM-NEXT: pminsw %mm1, %mm0 # sched: [1:0.50] +; SLM-NEXT: pminsw (%rdi), %mm0 # sched: [4:1.00] ; SLM-NEXT: movq %mm0, %rax # sched: [1:0.50] ; SLM-NEXT: retq # sched: [4:1.00] ; ; SANDY-LABEL: test_pminsw: ; SANDY: # %bb.0: -; SANDY-NEXT: pminsw %mm1, %mm0 # sched: [5:1.00] -; SANDY-NEXT: pminsw (%rdi), %mm0 # sched: [10:1.00] +; SANDY-NEXT: pminsw %mm1, %mm0 # sched: [3:1.00] +; SANDY-NEXT: pminsw (%rdi), %mm0 # sched: [8:1.00] ; SANDY-NEXT: movq %mm0, %rax # sched: [1:0.33] ; SANDY-NEXT: retq # sched: [1:1.00] ; @@ -3958,15 +3958,15 @@ define i64 @test_pminsw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; BTVER2-LABEL: test_pminsw: ; BTVER2: # %bb.0: -; BTVER2-NEXT: pminsw %mm1, %mm0 # sched: [2:1.00] -; BTVER2-NEXT: pminsw (%rdi), %mm0 # sched: [7:1.00] +; BTVER2-NEXT: pminsw %mm1, %mm0 # sched: [1:0.50] +; BTVER2-NEXT: pminsw (%rdi), %mm0 # sched: [6:1.00] ; BTVER2-NEXT: movq %mm0, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-LABEL: test_pminsw: ; ZNVER1: # %bb.0: -; ZNVER1-NEXT: pminsw %mm1, %mm0 # sched: [4:1.00] -; ZNVER1-NEXT: pminsw (%rdi), %mm0 # sched: [11:1.00] +; ZNVER1-NEXT: pminsw %mm1, %mm0 # sched: [1:0.25] +; ZNVER1-NEXT: pminsw (%rdi), %mm0 # sched: [8:0.50] ; ZNVER1-NEXT: movq %mm0, %rax # sched: [2:1.00] ; ZNVER1-NEXT: retq # sched: [1:0.50] %1 = call x86_mmx @llvm.x86.mmx.pmins.w(x86_mmx %a0, x86_mmx %a1) @@ -3980,8 +3980,8 @@ declare x86_mmx @llvm.x86.mmx.pmins.w(x86_mmx, x86_mmx) nounwind readnone define i64 @test_pminub(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; GENERIC-LABEL: test_pminub: ; GENERIC: # %bb.0: -; GENERIC-NEXT: pminub %mm1, %mm0 # sched: [5:1.00] -; GENERIC-NEXT: pminub (%rdi), %mm0 # sched: [10:1.00] +; GENERIC-NEXT: pminub %mm1, %mm0 # sched: [3:1.00] +; GENERIC-NEXT: pminub (%rdi), %mm0 # sched: [8:1.00] ; GENERIC-NEXT: movq %mm0, %rax # sched: [1:0.33] ; GENERIC-NEXT: retq # sched: [1:1.00] ; @@ -3994,15 +3994,15 @@ define i64 @test_pminub(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; SLM-LABEL: test_pminub: ; SLM: # %bb.0: -; SLM-NEXT: pminub %mm1, %mm0 # sched: [4:1.00] -; SLM-NEXT: pminub (%rdi), %mm0 # sched: [7:1.00] +; SLM-NEXT: pminub %mm1, %mm0 # sched: [1:0.50] +; SLM-NEXT: pminub (%rdi), %mm0 # sched: [4:1.00] ; SLM-NEXT: movq %mm0, %rax # sched: [1:0.50] ; SLM-NEXT: retq # sched: [4:1.00] ; ; SANDY-LABEL: test_pminub: ; SANDY: # %bb.0: -; SANDY-NEXT: pminub %mm1, %mm0 # sched: [5:1.00] -; SANDY-NEXT: pminub (%rdi), %mm0 # sched: [10:1.00] +; SANDY-NEXT: pminub %mm1, %mm0 # sched: [3:1.00] +; SANDY-NEXT: pminub (%rdi), %mm0 # sched: [8:1.00] ; SANDY-NEXT: movq %mm0, %rax # sched: [1:0.33] ; SANDY-NEXT: retq # sched: [1:1.00] ; @@ -4036,15 +4036,15 @@ define i64 @test_pminub(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; BTVER2-LABEL: test_pminub: ; BTVER2: # %bb.0: -; BTVER2-NEXT: pminub %mm1, %mm0 # sched: [2:1.00] -; BTVER2-NEXT: pminub (%rdi), %mm0 # sched: [7:1.00] +; BTVER2-NEXT: pminub %mm1, %mm0 # sched: [1:0.50] +; BTVER2-NEXT: pminub (%rdi), %mm0 # sched: [6:1.00] ; BTVER2-NEXT: movq %mm0, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-LABEL: test_pminub: ; ZNVER1: # %bb.0: -; ZNVER1-NEXT: pminub %mm1, %mm0 # sched: [4:1.00] -; ZNVER1-NEXT: pminub (%rdi), %mm0 # sched: [11:1.00] +; ZNVER1-NEXT: pminub %mm1, %mm0 # sched: [1:0.25] +; ZNVER1-NEXT: pminub (%rdi), %mm0 # sched: [8:0.50] ; ZNVER1-NEXT: movq %mm0, %rax # sched: [2:1.00] ; ZNVER1-NEXT: retq # sched: [1:0.50] %1 = call x86_mmx @llvm.x86.mmx.pminu.b(x86_mmx %a0, x86_mmx %a1) @@ -4829,8 +4829,8 @@ define i64 @test_psignb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; SLM-LABEL: test_psignb: ; SLM: # %bb.0: -; SLM-NEXT: psignb %mm1, %mm0 # sched: [4:1.00] -; SLM-NEXT: psignb (%rdi), %mm0 # sched: [7:1.00] +; SLM-NEXT: psignb %mm1, %mm0 # sched: [1:0.50] +; SLM-NEXT: psignb (%rdi), %mm0 # sched: [4:1.00] ; SLM-NEXT: movq %mm0, %rax # sched: [1:0.50] ; SLM-NEXT: retq # sched: [4:1.00] ; @@ -4871,15 +4871,15 @@ define i64 @test_psignb(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; BTVER2-LABEL: test_psignb: ; BTVER2: # %bb.0: -; BTVER2-NEXT: psignb %mm1, %mm0 # sched: [2:1.00] -; BTVER2-NEXT: psignb (%rdi), %mm0 # sched: [7:1.00] +; BTVER2-NEXT: psignb %mm1, %mm0 # sched: [1:0.50] +; BTVER2-NEXT: psignb (%rdi), %mm0 # sched: [6:1.00] ; BTVER2-NEXT: movq %mm0, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-LABEL: test_psignb: ; ZNVER1: # %bb.0: -; ZNVER1-NEXT: psignb %mm1, %mm0 # sched: [4:1.00] -; ZNVER1-NEXT: psignb (%rdi), %mm0 # sched: [11:1.00] +; ZNVER1-NEXT: psignb %mm1, %mm0 # sched: [1:0.25] +; ZNVER1-NEXT: psignb (%rdi), %mm0 # sched: [8:0.50] ; ZNVER1-NEXT: movq %mm0, %rax # sched: [2:1.00] ; ZNVER1-NEXT: retq # sched: [1:0.50] %1 = call x86_mmx @llvm.x86.ssse3.psign.b(x86_mmx %a0, x86_mmx %a1) @@ -4907,8 +4907,8 @@ define i64 @test_psignd(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; SLM-LABEL: test_psignd: ; SLM: # %bb.0: -; SLM-NEXT: psignd %mm1, %mm0 # sched: [4:1.00] -; SLM-NEXT: psignd (%rdi), %mm0 # sched: [7:1.00] +; SLM-NEXT: psignd %mm1, %mm0 # sched: [1:0.50] +; SLM-NEXT: psignd (%rdi), %mm0 # sched: [4:1.00] ; SLM-NEXT: movq %mm0, %rax # sched: [1:0.50] ; SLM-NEXT: retq # sched: [4:1.00] ; @@ -4949,15 +4949,15 @@ define i64 @test_psignd(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; BTVER2-LABEL: test_psignd: ; BTVER2: # %bb.0: -; BTVER2-NEXT: psignd %mm1, %mm0 # sched: [2:1.00] -; BTVER2-NEXT: psignd (%rdi), %mm0 # sched: [7:1.00] +; BTVER2-NEXT: psignd %mm1, %mm0 # sched: [1:0.50] +; BTVER2-NEXT: psignd (%rdi), %mm0 # sched: [6:1.00] ; BTVER2-NEXT: movq %mm0, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-LABEL: test_psignd: ; ZNVER1: # %bb.0: -; ZNVER1-NEXT: psignd %mm1, %mm0 # sched: [4:1.00] -; ZNVER1-NEXT: psignd (%rdi), %mm0 # sched: [11:1.00] +; ZNVER1-NEXT: psignd %mm1, %mm0 # sched: [1:0.25] +; ZNVER1-NEXT: psignd (%rdi), %mm0 # sched: [8:0.50] ; ZNVER1-NEXT: movq %mm0, %rax # sched: [2:1.00] ; ZNVER1-NEXT: retq # sched: [1:0.50] %1 = call x86_mmx @llvm.x86.ssse3.psign.d(x86_mmx %a0, x86_mmx %a1) @@ -4985,8 +4985,8 @@ define i64 @test_psignw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; SLM-LABEL: test_psignw: ; SLM: # %bb.0: -; SLM-NEXT: psignw %mm1, %mm0 # sched: [4:1.00] -; SLM-NEXT: psignw (%rdi), %mm0 # sched: [7:1.00] +; SLM-NEXT: psignw %mm1, %mm0 # sched: [1:0.50] +; SLM-NEXT: psignw (%rdi), %mm0 # sched: [4:1.00] ; SLM-NEXT: movq %mm0, %rax # sched: [1:0.50] ; SLM-NEXT: retq # sched: [4:1.00] ; @@ -5027,15 +5027,15 @@ define i64 @test_psignw(x86_mmx %a0, x86_mmx %a1, x86_mmx* %a2) optsize { ; ; BTVER2-LABEL: test_psignw: ; BTVER2: # %bb.0: -; BTVER2-NEXT: psignw %mm1, %mm0 # sched: [2:1.00] -; BTVER2-NEXT: psignw (%rdi), %mm0 # sched: [7:1.00] +; BTVER2-NEXT: psignw %mm1, %mm0 # sched: [1:0.50] +; BTVER2-NEXT: psignw (%rdi), %mm0 # sched: [6:1.00] ; BTVER2-NEXT: movq %mm0, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] ; ; ZNVER1-LABEL: test_psignw: ; ZNVER1: # %bb.0: -; ZNVER1-NEXT: psignw %mm1, %mm0 # sched: [4:1.00] -; ZNVER1-NEXT: psignw (%rdi), %mm0 # sched: [11:1.00] +; ZNVER1-NEXT: psignw %mm1, %mm0 # sched: [1:0.25] +; ZNVER1-NEXT: psignw (%rdi), %mm0 # sched: [8:0.50] ; ZNVER1-NEXT: movq %mm0, %rax # sched: [2:1.00] ; ZNVER1-NEXT: retq # sched: [1:0.50] %1 = call x86_mmx @llvm.x86.ssse3.psign.w(x86_mmx %a0, x86_mmx %a1)