forked from OSchip/llvm-project
Define Mips specific unaligned load/store nodes.
llvm-svn: 157863
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@ -81,6 +81,14 @@ const char *MipsTargetLowering::getTargetNodeName(unsigned Opcode) const {
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case MipsISD::Sync: return "MipsISD::Sync";
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case MipsISD::Ext: return "MipsISD::Ext";
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case MipsISD::Ins: return "MipsISD::Ins";
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case MipsISD::LWL: return "MipsISD::LWL";
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case MipsISD::LWR: return "MipsISD::LWR";
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case MipsISD::SWL: return "MipsISD::SWL";
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case MipsISD::SWR: return "MipsISD::SWR";
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case MipsISD::LDL: return "MipsISD::LDL";
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case MipsISD::LDR: return "MipsISD::LDR";
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case MipsISD::SDL: return "MipsISD::SDL";
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case MipsISD::SDR: return "MipsISD::SDR";
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default: return NULL;
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}
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}
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@ -79,7 +79,17 @@ namespace llvm {
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Sync,
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Ext,
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Ins
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Ins,
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// Load/Store Left/Right nodes.
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LWL = ISD::FIRST_TARGET_MEMORY_OPCODE,
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LWR,
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SWL,
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SWR,
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LDL,
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LDR,
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SDL,
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SDR
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};
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}
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@ -44,6 +44,10 @@ def SDT_Ins : SDTypeProfile<1, 4, [SDTCisInt<0>, SDTCisSameAs<0, 1>,
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SDTCisVT<2, i32>, SDTCisSameAs<2, 3>,
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SDTCisSameAs<0, 4>]>;
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def SDTMipsLoadLR : SDTypeProfile<1, 2,
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[SDTCisInt<0>, SDTCisPtrTy<1>,
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SDTCisSameAs<0, 2>]>;
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// Call
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def MipsJmpLink : SDNode<"MipsISD::JmpLink",SDT_MipsJmpLink,
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[SDNPHasChain, SDNPOutGlue, SDNPOptInGlue,
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@ -113,6 +117,23 @@ def MipsSync : SDNode<"MipsISD::Sync", SDT_Sync, [SDNPHasChain]>;
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def MipsExt : SDNode<"MipsISD::Ext", SDT_Ext>;
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def MipsIns : SDNode<"MipsISD::Ins", SDT_Ins>;
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def MipsLWL : SDNode<"MipsISD::LWL", SDTMipsLoadLR,
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[SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
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def MipsLWR : SDNode<"MipsISD::LWR", SDTMipsLoadLR,
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[SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
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def MipsSWL : SDNode<"MipsISD::SWL", SDTStore,
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[SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
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def MipsSWR : SDNode<"MipsISD::SWR", SDTStore,
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[SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
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def MipsLDL : SDNode<"MipsISD::LDL", SDTMipsLoadLR,
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[SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
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def MipsLDR : SDNode<"MipsISD::LDR", SDTMipsLoadLR,
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[SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>;
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def MipsSDL : SDNode<"MipsISD::SDL", SDTStore,
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[SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
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def MipsSDR : SDNode<"MipsISD::SDR", SDTStore,
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[SDNPHasChain, SDNPMayStore, SDNPMemOperand]>;
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//===----------------------------------------------------------------------===//
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// Mips Instruction Predicate Definitions.
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//===----------------------------------------------------------------------===//
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