forked from OSchip/llvm-project
[X86] Turn (and (shl X, C1), C2) into (shl (and X, (C1 >> C2), C2) if the AND could match a movzx.
Could get further improvements by recognizing (i64 and (anyext (i32 shl))). llvm-svn: 358737
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@ -4009,6 +4009,9 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
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ShiftedVal = (uint64_t)Val >> ShAmt;
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if (NVT == MVT::i64 && !isUInt<32>(Val) && isUInt<32>(ShiftedVal))
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return true;
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// Also swap order when the AND can become MOVZX.
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if (ShiftedVal == UINT8_MAX || ShiftedVal == UINT16_MAX)
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return true;
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}
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ShiftedVal = Val >> ShAmt;
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if ((!isInt<8>(Val) && isInt<8>(ShiftedVal)) ||
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@ -201,9 +201,8 @@ define i64 @test16(i64 %x, i64* %y) nounwind {
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define i32 @test17(i32 %x) nounwind {
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; CHECK-LABEL: test17:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: movzbl %dil, %eax
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; CHECK-NEXT: shll $10, %eax
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; CHECK-NEXT: andl $261120, %eax # imm = 0x3FC00
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; CHECK-NEXT: retq
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%and = shl i32 %x, 10
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%shl = and i32 %and, 261120
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@ -225,9 +224,8 @@ define i64 @test18(i64 %x) nounwind {
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define i32 @test19(i32 %x) nounwind {
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; CHECK-LABEL: test19:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: movzwl %di, %eax
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; CHECK-NEXT: shll $10, %eax
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; CHECK-NEXT: andl $67107840, %eax # imm = 0x3FFFC00
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; CHECK-NEXT: retq
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%and = shl i32 %x, 10
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%shl = and i32 %and, 67107840
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