forked from OSchip/llvm-project
				
			R600/SI: Default to no single precision denormals.
llvm-svn: 213017
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					@ -47,10 +47,18 @@ using namespace llvm;
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// precision, and leaves single precision to flush all and does not report
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					// precision, and leaves single precision to flush all and does not report
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// CL_FP_DENORM for CL_DEVICE_SINGLE_FP_CONFIG. Mesa's OpenCL currently reports
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					// CL_FP_DENORM for CL_DEVICE_SINGLE_FP_CONFIG. Mesa's OpenCL currently reports
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// CL_FP_DENORM for both.
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					// CL_FP_DENORM for both.
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					//
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					// FIXME: It seems some instructions do not support single precision denormals
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					// regardless of the mode (exp_*_f32, rcp_*_f32, rsq_*_f32, rsq_*f32, sqrt_f32,
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					// and sin_f32, cos_f32 on most parts).
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					// We want to use these instructions, and using fp32 denormals also causes
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					// instructions to run at the double precision rate for the device so it's
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					// probably best to just report no single precision denormals.
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static uint32_t getFPMode(const MachineFunction &) {
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					static uint32_t getFPMode(const MachineFunction &) {
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  return FP_ROUND_MODE_SP(FP_ROUND_ROUND_TO_NEAREST) |
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					  return FP_ROUND_MODE_SP(FP_ROUND_ROUND_TO_NEAREST) |
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         FP_ROUND_MODE_DP(FP_ROUND_ROUND_TO_NEAREST) |
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					         FP_ROUND_MODE_DP(FP_ROUND_ROUND_TO_NEAREST) |
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         FP_DENORM_MODE_SP(FP_DENORM_FLUSH_NONE) |
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					         FP_DENORM_MODE_SP(FP_DENORM_FLUSH_IN_FLUSH_OUT) |
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         FP_DENORM_MODE_DP(FP_DENORM_FLUSH_NONE);
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					         FP_DENORM_MODE_DP(FP_DENORM_FLUSH_NONE);
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}
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					}
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					@ -1,7 +1,7 @@
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; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
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					; RUN: llc -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
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; SI-LABEL: @test_kernel
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					; SI-LABEL: @test_kernel
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; SI: FloatMode: 240
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					; SI: FloatMode: 192
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; SI: IeeeMode: 0
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					; SI: IeeeMode: 0
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define void @test_kernel(float addrspace(1)* %out0, double addrspace(1)* %out1) nounwind {
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					define void @test_kernel(float addrspace(1)* %out0, double addrspace(1)* %out1) nounwind {
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  store float 0.0, float addrspace(1)* %out0
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					  store float 0.0, float addrspace(1)* %out0
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