forked from OSchip/llvm-project
- Somehow I forgot about one / une.
- Renumber fcmp predicates to match their icmp counterparts. - Try swapping operands to expose more optimization opportunities. llvm-svn: 57513
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@ -3124,14 +3124,16 @@ static unsigned getFCmpCode(FCmpInst::Predicate CC, bool &isOrdered) {
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switch (CC) {
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switch (CC) {
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case FCmpInst::FCMP_ORD: isOrdered = true; return 0; // 000
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case FCmpInst::FCMP_ORD: isOrdered = true; return 0; // 000
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case FCmpInst::FCMP_UNO: return 0; // 000
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case FCmpInst::FCMP_UNO: return 0; // 000
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case FCmpInst::FCMP_OEQ: isOrdered = true; return 1; // 001
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case FCmpInst::FCMP_OGT: isOrdered = true; return 1; // 001
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case FCmpInst::FCMP_UEQ: return 1; // 001
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case FCmpInst::FCMP_UGT: return 1; // 001
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case FCmpInst::FCMP_OGT: isOrdered = true; return 2; // 010
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case FCmpInst::FCMP_OEQ: isOrdered = true; return 2; // 010
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case FCmpInst::FCMP_UGT: return 2; // 010
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case FCmpInst::FCMP_UEQ: return 2; // 010
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case FCmpInst::FCMP_OGE: isOrdered = true; return 3; // 011
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case FCmpInst::FCMP_OGE: isOrdered = true; return 3; // 011
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case FCmpInst::FCMP_UGE: return 3; // 011
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case FCmpInst::FCMP_UGE: return 3; // 011
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case FCmpInst::FCMP_OLT: isOrdered = true; return 4; // 100
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case FCmpInst::FCMP_OLT: isOrdered = true; return 4; // 100
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case FCmpInst::FCMP_ULT: return 4; // 100
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case FCmpInst::FCMP_ULT: return 4; // 100
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case FCmpInst::FCMP_ONE: isOrdered = true; return 5; // 101
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case FCmpInst::FCMP_UNE: return 5; // 101
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case FCmpInst::FCMP_OLE: isOrdered = true; return 6; // 110
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case FCmpInst::FCMP_OLE: isOrdered = true; return 6; // 110
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case FCmpInst::FCMP_ULE: return 6; // 110
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case FCmpInst::FCMP_ULE: return 6; // 110
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default:
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default:
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@ -3181,22 +3183,22 @@ static Value *getICmpValue(bool sign, unsigned code, Value *LHS, Value *RHS) {
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static Value *getFCmpValue(bool isordered, unsigned code,
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static Value *getFCmpValue(bool isordered, unsigned code,
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Value *LHS, Value *RHS) {
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Value *LHS, Value *RHS) {
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switch (code) {
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switch (code) {
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default: assert(0 && "Illegal ICmp code!");
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default: assert(0 && "Illegal FCmp code!");
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case 0:
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case 0:
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if (isordered)
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if (isordered)
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return new FCmpInst(FCmpInst::FCMP_ORD, LHS, RHS);
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return new FCmpInst(FCmpInst::FCMP_ORD, LHS, RHS);
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else
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else
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return new FCmpInst(FCmpInst::FCMP_UNO, LHS, RHS);
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return new FCmpInst(FCmpInst::FCMP_UNO, LHS, RHS);
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case 1:
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case 1:
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if (isordered)
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return new FCmpInst(FCmpInst::FCMP_OEQ, LHS, RHS);
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else
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return new FCmpInst(FCmpInst::FCMP_UEQ, LHS, RHS);
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case 2:
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if (isordered)
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if (isordered)
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return new FCmpInst(FCmpInst::FCMP_OGT, LHS, RHS);
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return new FCmpInst(FCmpInst::FCMP_OGT, LHS, RHS);
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else
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else
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return new FCmpInst(FCmpInst::FCMP_UGT, LHS, RHS);
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return new FCmpInst(FCmpInst::FCMP_UGT, LHS, RHS);
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case 2:
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if (isordered)
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return new FCmpInst(FCmpInst::FCMP_OEQ, LHS, RHS);
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else
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return new FCmpInst(FCmpInst::FCMP_UEQ, LHS, RHS);
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case 3:
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case 3:
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if (isordered)
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if (isordered)
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return new FCmpInst(FCmpInst::FCMP_OGE, LHS, RHS);
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return new FCmpInst(FCmpInst::FCMP_OGE, LHS, RHS);
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@ -3208,6 +3210,11 @@ static Value *getFCmpValue(bool isordered, unsigned code,
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else
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else
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return new FCmpInst(FCmpInst::FCMP_ULT, LHS, RHS);
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return new FCmpInst(FCmpInst::FCMP_ULT, LHS, RHS);
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case 5:
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case 5:
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if (isordered)
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return new FCmpInst(FCmpInst::FCMP_ONE, LHS, RHS);
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else
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return new FCmpInst(FCmpInst::FCMP_UNE, LHS, RHS);
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case 6:
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if (isordered)
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if (isordered)
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return new FCmpInst(FCmpInst::FCMP_OLE, LHS, RHS);
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return new FCmpInst(FCmpInst::FCMP_OLE, LHS, RHS);
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else
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else
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@ -3973,6 +3980,11 @@ Instruction *InstCombiner::visitAnd(BinaryOperator &I) {
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FCmpInst::Predicate Op0CC, Op1CC;
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FCmpInst::Predicate Op0CC, Op1CC;
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if (match(Op0, m_FCmp(Op0CC, m_Value(Op0LHS), m_Value(Op0RHS))) &&
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if (match(Op0, m_FCmp(Op0CC, m_Value(Op0LHS), m_Value(Op0RHS))) &&
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match(Op1, m_FCmp(Op1CC, m_Value(Op1LHS), m_Value(Op1RHS)))) {
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match(Op1, m_FCmp(Op1CC, m_Value(Op1LHS), m_Value(Op1RHS)))) {
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if (Op0LHS == Op1RHS && Op0RHS == Op1LHS) {
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// Swap RHS operands to match LHS.
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Op1CC = FCmpInst::getSwappedPredicate(Op1CC);
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std::swap(Op1LHS, Op1RHS);
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}
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if (Op0LHS == Op1LHS && Op0RHS == Op1RHS) {
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if (Op0LHS == Op1LHS && Op0RHS == Op1RHS) {
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// Simplify (fcmp cc0 x, y) & (fcmp cc1 x, y).
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// Simplify (fcmp cc0 x, y) & (fcmp cc1 x, y).
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if (Op0CC == Op1CC)
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if (Op0CC == Op1CC)
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@ -1,4 +1,4 @@
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; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep fcmp | count 2
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; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep fcmp | count 3
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; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep ret | grep 0
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; RUN: llvm-as < %s | opt -instcombine | llvm-dis | grep ret | grep 0
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define zeroext i8 @t1(float %x, float %y) nounwind {
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define zeroext i8 @t1(float %x, float %y) nounwind {
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@ -24,3 +24,11 @@ define zeroext i8 @t3(float %x, float %y) nounwind {
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%retval = zext i1 %c to i8
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%retval = zext i1 %c to i8
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ret i8 %retval
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ret i8 %retval
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}
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}
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define zeroext i8 @t4(float %x, float %y) nounwind {
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%a = fcmp one float %y, %x
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%b = fcmp ord float %x, %y
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%c = and i1 %a, %b
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%retval = zext i1 %c to i8
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ret i8 %retval
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}
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