forked from OSchip/llvm-project
[AMDGPU] Ask subtarget if waitcnt instruction is needed before barrier instruction
Differential Revision: https://reviews.llvm.org/D24985 llvm-svn: 282875
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@ -540,6 +540,12 @@ public:
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/// Return the maximum number of waves per SIMD for kernels using \p VGPRs VGPRs
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/// Return the maximum number of waves per SIMD for kernels using \p VGPRs VGPRs
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unsigned getOccupancyWithNumVGPRs(unsigned VGPRs) const;
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unsigned getOccupancyWithNumVGPRs(unsigned VGPRs) const;
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/// \returns True if waitcnt instruction is needed before barrier instruction,
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/// false otherwise.
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bool needWaitcntBeforeBarrier() const {
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return true;
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}
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};
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};
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} // End namespace llvm
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} // End namespace llvm
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@ -590,7 +590,8 @@ bool SIInsertWaits::runOnMachineFunction(MachineFunction &MF) {
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// S_SENDMSG implicitly waits for all outstanding LGKM transfers to finish,
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// S_SENDMSG implicitly waits for all outstanding LGKM transfers to finish,
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// but we also want to wait for any other outstanding transfers before
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// but we also want to wait for any other outstanding transfers before
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// signalling other hardware blocks
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// signalling other hardware blocks
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if (I->getOpcode() == AMDGPU::S_BARRIER ||
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if ((I->getOpcode() == AMDGPU::S_BARRIER &&
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ST->needWaitcntBeforeBarrier()) ||
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I->getOpcode() == AMDGPU::S_SENDMSG)
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I->getOpcode() == AMDGPU::S_SENDMSG)
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Required = LastIssued;
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Required = LastIssued;
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else
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else
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