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Fix rev 96389 by restricting the xform to mask that's either signbit or max signed value. 

llvm-svn: 96990
This commit is contained in:
Evan Cheng 2010-02-23 21:51:54 +00:00
parent fc83aa04db
commit da52f449a0
1 changed files with 9 additions and 4 deletions
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13
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -9092,9 +9092,10 @@ static SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG,
}
/// PerformANDCombine - Look for SSE and instructions of this form:
/// (and x, (build_vector c1,c2,c3,c4)). If there exists a use of a build_vector
/// that's the bitwise complement of the mask, then transform the node to
/// (and (xor x, (build_vector -1,-1,-1,-1)), (build_vector ~c1,~c2,~c3,~c4)).
/// (and x, (build_vector signbit,signbit,signbit,signbit)). If there
/// exists a use of a build_vector that's the bitwise complement of the mask,
/// then transform the node to
/// (and (xor x, (build_vector -1,-1,-1,-1)), (build_vector ~sb,~sb,~sb,~sb)).
static SDValue PerformANDCombine(SDNode *N, SelectionDAG &DAG,
TargetLowering::DAGCombinerInfo &DCI) {
EVT VT = N->getValueType(0);
@ -9118,7 +9119,11 @@ static SDValue PerformANDCombine(SDNode *N, SelectionDAG &DAG,
continue;
}
ConstantSDNode *C = dyn_cast<ConstantSDNode>(Arg);
if (!C) return SDValue();
if (!C)
return SDValue();
if (!C->getAPIntValue().isSignBit() &&
!C->getAPIntValue().isMaxSignedValue())
return SDValue();
Mask.push_back(DAG.getConstant(~C->getAPIntValue(), EltVT));
}
N1 = DAG.getNode(ISD::BUILD_VECTOR, N1.getDebugLoc(), VT,