fixed incorrect lowering of ISD::SUB node. SUB has only one result value.

It wasn't caught during tests because we never got a sub generated, (i8 was always getting promoted to int, which in turn was broken into subc/sube). Though the optimizer leaves an i8 sub now. 

llvm-svn: 77178
This commit is contained in:
Sanjiv Gupta 2009-07-27 02:26:06 +00:00
parent ba4c6d1c91
commit e334b34bfd
1 changed files with 14 additions and 5 deletions

View File

@ -1573,11 +1573,20 @@ SDValue PIC16TargetLowering::LowerSUB(SDValue Op, SelectionDAG &DAG) {
SDValue NewVal = ConvertToMemOperand (Op.getOperand(0), DAG, dl);
SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Flag);
if (Op.getOpcode() == ISD::SUBE)
return DAG.getNode(Op.getOpcode(), dl, Tys, NewVal, Op.getOperand(1),
Op.getOperand(2));
else
return DAG.getNode(Op.getOpcode(), dl, Tys, NewVal, Op.getOperand(1));
switch (Op.getOpcode()) {
case ISD::SUBE:
return DAG.getNode(Op.getOpcode(), dl, Tys, NewVal, Op.getOperand(1),
Op.getOperand(2));
break;
case ISD::SUBC:
return DAG.getNode(Op.getOpcode(), dl, Tys, NewVal, Op.getOperand(1));
break;
case ISD::SUB:
return DAG.getNode(Op.getOpcode(), dl, MVT::i8, NewVal, Op.getOperand(1));
break;
default:
assert (0 && "Opcode unknown.");
}
}
void PIC16TargetLowering::InitReservedFrameCount(const Function *F) {