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Turn on list-ilp scheduling by default on x86 and x86-64, fix up 

testcases accordingly. Some are currently xfailed and will be filed
as bugs to be fixed or understood.

Performance results:

roughly neutral on SPEC
some micro benchmarks in the llvm suite are up between 100 and 150%, only
a pair of regressions that are due to be investigated

john-the-ripper saw:
10% improvement in traditional DES
8% improvement in BSDI DES
59% improvement in FreeBSD MD5
67% improvement in OpenBSD Blowfish
14% improvement in LM DES

Small compile time impact.

llvm-svn: 127208
This commit is contained in:
Eric Christopher 2011-03-08 02:42:25 +00:00
parent 6203d49b0e
commit eb19e9e9fc
19 changed files with 25 additions and 19 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
llvm/lib/Target/X86/X86ISelLowering.cpp
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@ -221,7 +221,7 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
// X86 is weird, it always uses i8 for shift amounts and setcc results. // X86 is weird, it always uses i8 for shift amounts and setcc results.
setBooleanContents(ZeroOrOneBooleanContent); setBooleanContents(ZeroOrOneBooleanContent);
setSchedulingPreference(Sched::RegPressure); setSchedulingPreference(Sched::ILP);
setStackPointerRegisterToSaveRestore(X86StackPtr); setStackPointerRegisterToSaveRestore(X86StackPtr);
if (Subtarget->isTargetWindows() && !Subtarget->isTargetCygMing()) { if (Subtarget->isTargetWindows() && !Subtarget->isTargetCygMing()) {

1
llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
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@ -1,3 +1,4 @@
; XFAIL: *
; RUN: llc < %s -march=x86 -mcpu=yonah -stats |& \ ; RUN: llc < %s -march=x86 -mcpu=yonah -stats |& \
; RUN: not grep {Number of register spills} ; RUN: not grep {Number of register spills}
; END. ; END.

1
llvm/test/CodeGen/X86/2008-07-11-SpillerBug.ll
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@ -4,7 +4,6 @@
; CHECK: andl $65534, % ; CHECK: andl $65534, %
; CHECK-NEXT: movl % ; CHECK-NEXT: movl %
; CHECK-NEXT: movzwl ; CHECK-NEXT: movzwl
; CHECK-NEXT: movl $17
@g_5 = external global i16 ; <i16*> [#uses=2] @g_5 = external global i16 ; <i16*> [#uses=2]
@g_107 = external global i16 ; <i16*> [#uses=1] @g_107 = external global i16 ; <i16*> [#uses=1]

6
llvm/test/CodeGen/X86/2008-07-19-movups-spills.ll
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@ -1,7 +1,9 @@
; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=1 -mattr=sse2 | grep movaps | count 75 ; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=1 -mattr=sse2 | grep movups | count 33
; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=0 -mattr=sse2 | grep movaps | count 75 ; RUN: llc < %s -mtriple=i686-pc-linux -realign-stack=0 -mattr=sse2 | grep movups | count 33
; PR2539 ; PR2539
; PR8969 - make 32-bit linux have a 16-byte aligned stack ; PR8969 - make 32-bit linux have a 16-byte aligned stack
; Verify that movups is still generated with an aligned stack for the globals
; that must be accessed unaligned
external global <4 x float>, align 1 ; <<4 x float>*>:0 [#uses=2] external global <4 x float>, align 1 ; <<4 x float>*>:0 [#uses=2]
external global <4 x float>, align 1 ; <<4 x float>*>:1 [#uses=1] external global <4 x float>, align 1 ; <<4 x float>*>:1 [#uses=1]

2
llvm/test/CodeGen/X86/2008-08-05-SpillerBug.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah -disable-fp-elim -stats |& grep asm-printer | grep 55 ; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah -pre-RA-sched=list-burr -disable-fp-elim -stats |& grep asm-printer | grep 55
; PR2568 ; PR2568
@g_3 = external global i16 ; <i16*> [#uses=1] @g_3 = external global i16 ; <i16*> [#uses=1]

2
llvm/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll
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@ -1,6 +1,6 @@
; Check that eh_return & unwind_init were properly lowered ; Check that eh_return & unwind_init were properly lowered
; RUN: llc < %s | grep %ebp | count 7 ; RUN: llc < %s | grep %ebp | count 7
; RUN: llc < %s | grep %ecx | count 5 ; RUN: llc < %s | grep %edx | count 5
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64" target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i386-pc-linux" target triple = "i386-pc-linux"

2
llvm/test/CodeGen/X86/2009-04-20-LinearScanOpt.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep asm-printer | grep 82 ; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats |& grep asm-printer | grep 79
; rdar://6802189 ; rdar://6802189
; Test if linearscan is unfavoring registers for allocation to allow more reuse ; Test if linearscan is unfavoring registers for allocation to allow more reuse

2
llvm/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s | FileCheck %s ; RUN: llc -pre-RA-sched=list-burr < %s | FileCheck %s
; PR6941 ; PR6941
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0" target triple = "x86_64-apple-darwin10.0.0"

8
llvm/test/CodeGen/X86/2010-09-17-SideEffectsInChain.ll
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@ -19,8 +19,8 @@ entry:
} }
; CHECK: movq ___stack_chk_guard@GOTPCREL(%rip), %rax ; CHECK: movq ___stack_chk_guard@GOTPCREL(%rip), %rax
; CHECK: movb 30(%rsp), %dl ; CHECK: movb 38(%rsp), %bl
; CHECK: movb (%rsp), %sil ; CHECK: movb 8(%rsp), %dl
; CHECK: movb %sil, (%rsp) ; CHECK: movb %dl, 8(%rsp)
; CHECK: movb %dl, 30(%rsp) ; CHECK: movb %bl, 38(%rsp)
; CHECK: callq ___stack_chk_fail ; CHECK: callq ___stack_chk_fail

3
llvm/test/CodeGen/X86/break-anti-dependencies.ll
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@ -1,4 +1,5 @@
; RUN: llc < %s -march=x86-64 -post-RA-scheduler -break-anti-dependencies=none > %t ; Without list-burr scheduling we may not see the difference in codegen here.
; RUN: llc < %s -march=x86-64 -post-RA-scheduler -pre-RA-sched=list-burr -break-anti-dependencies=none > %t
; RUN: grep {%xmm0} %t | count 14 ; RUN: grep {%xmm0} %t | count 14
; RUN: not grep {%xmm1} %t ; RUN: not grep {%xmm1} %t
; RUN: llc < %s -march=x86-64 -post-RA-scheduler -break-anti-dependencies=critical > %t ; RUN: llc < %s -march=x86-64 -post-RA-scheduler -break-anti-dependencies=critical > %t

2
llvm/test/CodeGen/X86/coalesce-esp.ll
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@ -1,4 +1,4 @@
; RUN: llc < %s | grep {movl %esp, %ecx} ; RUN: llc < %s | grep {movl %esp, %ebp}
; PR4572 ; PR4572
; Don't coalesce with %esp if it would end up putting %esp in ; Don't coalesce with %esp if it would end up putting %esp in

3
llvm/test/CodeGen/X86/commute-two-addr.ll
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@ -38,11 +38,10 @@ define i32 @t2(i32 %X, i32 %Y) nounwind {
define %0 @t3(i32 %lb, i8 zeroext %has_lb, i8 zeroext %lb_inclusive, i32 %ub, i8 zeroext %has_ub, i8 zeroext %ub_inclusive) nounwind { define %0 @t3(i32 %lb, i8 zeroext %has_lb, i8 zeroext %lb_inclusive, i32 %ub, i8 zeroext %has_ub, i8 zeroext %ub_inclusive) nounwind {
entry: entry:
; DARWIN: t3: ; DARWIN: t3:
; DARWIN: shll $16
; DARWIN: shlq $32, %rcx ; DARWIN: shlq $32, %rcx
; DARWIN-NOT: leaq ; DARWIN-NOT: leaq
; DARWIN: orq %rcx, %rax ; DARWIN: orq %rcx, %rax
; DARWIN-NOT: mov
; DARWIN: shll $16
%tmp21 = zext i32 %lb to i64 %tmp21 = zext i32 %lb to i64
%tmp23 = zext i32 %ub to i64 %tmp23 = zext i32 %ub to i64
%tmp24 = shl i64 %tmp23, 32 %tmp24 = shl i64 %tmp23, 32

3
llvm/test/CodeGen/X86/fold-pcmpeqd-0.ll
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@ -1,5 +1,4 @@
; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | not grep pcmpeqd ; RUN: llc < %s -mtriple=i386-apple-darwin | grep pcmpeqd | count 1
; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | grep orps | grep CPI0_2 | count 2
; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep pcmpeqd | count 1
; This testcase shouldn't need to spill the -1 value, ; This testcase shouldn't need to spill the -1 value,

1
llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll
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@ -1,3 +1,4 @@
; XFAIL: *
; RUN: llc -march=x86-64 < %s | FileCheck %s ; RUN: llc -march=x86-64 < %s | FileCheck %s
; CHECK: decq ; CHECK: decq

1
llvm/test/CodeGen/X86/lsr-reuse.ll
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@ -1,3 +1,4 @@
; XFAIL: *
; RUN: llc < %s -march=x86-64 -O3 -asm-verbose=false | FileCheck %s ; RUN: llc < %s -march=x86-64 -O3 -asm-verbose=false | FileCheck %s
target datalayout = "e-p:64:64:64" target datalayout = "e-p:64:64:64"
target triple = "x86_64-unknown-unknown" target triple = "x86_64-unknown-unknown"

1
llvm/test/CodeGen/X86/pr1505b.ll
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@ -1,3 +1,4 @@
; XFAIL: *
; RUN: llc < %s -mcpu=i486 | grep fstpl | count 5 ; RUN: llc < %s -mcpu=i486 | grep fstpl | count 5
; RUN: llc < %s -mcpu=i486 | grep fstps | count 2 ; RUN: llc < %s -mcpu=i486 | grep fstps | count 2
; PR1505 ; PR1505

1
llvm/test/CodeGen/X86/remat-scalar-zero.ll
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@ -1,3 +1,4 @@
; XFAIL: *
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu > %t ; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu > %t
; RUN: not grep xor %t ; RUN: not grep xor %t
; RUN: not grep movap %t ; RUN: not grep movap %t

2
llvm/test/CodeGen/X86/v-binop-widen.ll
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@ -1,6 +1,6 @@
; RUN: llc -march=x86 -mattr=+sse < %s | FileCheck %s ; RUN: llc -march=x86 -mattr=+sse < %s | FileCheck %s
; CHECK: divss
; CHECK: divps ; CHECK: divps
; CHECK: divss
; CHECK: divps ; CHECK: divps
%vec = type <9 x float> %vec = type <9 x float>

1
llvm/test/CodeGen/X86/zext-sext.ll
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@ -1,3 +1,4 @@
; XFAIL: *
; RUN: llc < %s -march=x86-64 | FileCheck %s ; RUN: llc < %s -march=x86-64 | FileCheck %s
; <rdar://problem/8006248> ; <rdar://problem/8006248>