forked from OSchip/llvm-project
				
			[X86] When expanding LCMPXCHG16B_NO_RBX in EmitInstrWithCustomInserter, directly copy address operands instead of going through X86AddressMode.
I suspect getAddressFromInstr and addFullAddress are not handling all addresses cases properly based on a report from MaskRay. So just copy the operands directly. This should be more efficient anyway.
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					@ -33765,7 +33765,6 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
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  case X86::LCMPXCHG16B_NO_RBX: {
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					  case X86::LCMPXCHG16B_NO_RBX: {
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    const X86RegisterInfo *TRI = Subtarget.getRegisterInfo();
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					    const X86RegisterInfo *TRI = Subtarget.getRegisterInfo();
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    Register BasePtr = TRI->getBaseRegister();
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					    Register BasePtr = TRI->getBaseRegister();
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    X86AddressMode AM = getAddressFromInstr(&MI, 0);
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    if (TRI->hasBasePointer(*MF) &&
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					    if (TRI->hasBasePointer(*MF) &&
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        (BasePtr == X86::RBX || BasePtr == X86::EBX)) {
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					        (BasePtr == X86::RBX || BasePtr == X86::EBX)) {
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      if (!BB->isLiveIn(BasePtr))
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					      if (!BB->isLiveIn(BasePtr))
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					@ -33776,15 +33775,20 @@ X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
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      BuildMI(*BB, MI, DL, TII->get(TargetOpcode::COPY), SaveRBX)
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					      BuildMI(*BB, MI, DL, TII->get(TargetOpcode::COPY), SaveRBX)
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          .addReg(X86::RBX);
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					          .addReg(X86::RBX);
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      Register Dst = MF->getRegInfo().createVirtualRegister(&X86::GR64RegClass);
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					      Register Dst = MF->getRegInfo().createVirtualRegister(&X86::GR64RegClass);
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      addFullAddress(
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					      MachineInstrBuilder MIB =
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          BuildMI(*BB, MI, DL, TII->get(X86::LCMPXCHG16B_SAVE_RBX), Dst), AM)
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					          BuildMI(*BB, MI, DL, TII->get(X86::LCMPXCHG16B_SAVE_RBX), Dst);
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          .add(MI.getOperand(X86::AddrNumOperands))
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					      for (unsigned Idx = 0; Idx < X86::AddrNumOperands; ++Idx)
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          .addReg(SaveRBX);
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					        MIB.add(MI.getOperand(Idx));
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					      MIB.add(MI.getOperand(X86::AddrNumOperands));
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					      MIB.addReg(SaveRBX);
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    } else {
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					    } else {
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      // Simple case, just copy the virtual register to RBX.
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					      // Simple case, just copy the virtual register to RBX.
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      BuildMI(*BB, MI, DL, TII->get(TargetOpcode::COPY), X86::RBX)
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					      BuildMI(*BB, MI, DL, TII->get(TargetOpcode::COPY), X86::RBX)
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          .add(MI.getOperand(X86::AddrNumOperands));
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					          .add(MI.getOperand(X86::AddrNumOperands));
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      addFullAddress(BuildMI(*BB, MI, DL, TII->get(X86::LCMPXCHG16B)), AM);
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					      MachineInstrBuilder MIB =
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					          BuildMI(*BB, MI, DL, TII->get(X86::LCMPXCHG16B));
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					      for (unsigned Idx = 0; Idx < X86::AddrNumOperands; ++Idx)
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					        MIB.add(MI.getOperand(Idx));
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    }
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					    }
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    MI.eraseFromParent();
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					    MI.eraseFromParent();
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    return BB;
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					    return BB;
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