forked from OSchip/llvm-project
Make x86 isel lowering produce tailcall nodes. They are match to normal calls
for now. Patch contributed by Alexander Friedman. llvm-svn: 27994
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@ -1203,7 +1203,7 @@ X86TargetLowering::LowerFastCCCallTo(SDOperand Chain, const Type *RetTy,
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Ops.push_back(InFlag);
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// FIXME: Do not generate X86ISD::TAILCALL for now.
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Chain = DAG.getNode(X86ISD::CALL, NodeTys, Ops);
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Chain = DAG.getNode(isTailCall ? X86ISD::TAILCALL : X86ISD::CALL, NodeTys, Ops);
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InFlag = Chain.getValue(1);
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NodeTys.clear();
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@ -75,6 +75,9 @@ def X86callseq_end :
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def X86call : SDNode<"X86ISD::CALL", SDT_X86Call,
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[SDNPHasChain, SDNPOutFlag, SDNPOptInFlag]>;
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def X86tailcall : SDNode<"X86ISD::TAILCALL", SDT_X86Call,
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[SDNPHasChain, SDNPOutFlag, SDNPOptInFlag]>;
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def X86rep_stos: SDNode<"X86ISD::REP_STOS", SDTX86RepStr,
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[SDNPHasChain, SDNPInFlag, SDNPOutFlag]>;
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def X86rep_movs: SDNode<"X86ISD::REP_MOVS", SDTX86RepStr,
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@ -2329,6 +2332,19 @@ def : Pat<(store (X86Wrapper texternalsym:$src), addr:$dst),
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(MOV32mi addr:$dst, texternalsym:$src)>;
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// Calls
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def : Pat<(X86tailcall R32:$dst),
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(CALL32r R32:$dst)>;
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def : Pat<(X86tailcall (loadi32 addr:$dst)),
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(CALL32m addr:$dst)>;
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def : Pat<(X86tailcall tglobaladdr:$dst),
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(CALLpcrel32 tglobaladdr:$dst)>;
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def : Pat<(X86tailcall texternalsym:$dst),
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(CALLpcrel32 texternalsym:$dst)>;
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def : Pat<(X86call tglobaladdr:$dst),
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(CALLpcrel32 tglobaladdr:$dst)>;
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def : Pat<(X86call texternalsym:$dst),
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