forked from OSchip/llvm-project
parent
0b8bc00424
commit
f93b3f46f8
|
|
@ -219,11 +219,16 @@ def : Pat<(i64 immZExt16:$in),
|
||||||
def : Pat<(i64 imm:$imm),
|
def : Pat<(i64 imm:$imm),
|
||||||
(ORi64 (LUi64 (HI16 imm:$imm)), (LO16 imm:$imm))>;
|
(ORi64 (LUi64 (HI16 imm:$imm)), (LO16 imm:$imm))>;
|
||||||
|
|
||||||
// zextloadi32_u
|
// extended loads
|
||||||
def : Pat<(zextloadi32_u addr:$a), (DSRL32 (DSLL32 (ULW64_P8 addr:$a), 0), 0)>,
|
let Predicates = [NotN64] in {
|
||||||
Requires<[IsN64]>;
|
def : Pat<(extloadi32_a addr:$a), (DSRL32 (DSLL32 (LW64 addr:$a), 0), 0)>;
|
||||||
def : Pat<(zextloadi32_u addr:$a), (DSRL32 (DSLL32 (ULW64 addr:$a), 0), 0)>,
|
def : Pat<(zextloadi32_u addr:$a), (DSRL32 (DSLL32 (ULW64 addr:$a), 0), 0)>;
|
||||||
Requires<[NotN64]>;
|
}
|
||||||
|
let Predicates = [IsN64] in {
|
||||||
|
def : Pat<(extloadi32_a addr:$a), (DSRL32 (DSLL32 (LW64_P8 addr:$a), 0), 0)>;
|
||||||
|
def : Pat<(zextloadi32_u addr:$a),
|
||||||
|
(DSRL32 (DSLL32 (ULW64_P8 addr:$a), 0), 0)>;
|
||||||
|
}
|
||||||
|
|
||||||
// hi/lo relocs
|
// hi/lo relocs
|
||||||
def : Pat<(i64 (MipsLo tglobaladdr:$in)), (DADDiu ZERO_64, tglobaladdr:$in)>;
|
def : Pat<(i64 (MipsLo tglobaladdr:$in)), (DADDiu ZERO_64, tglobaladdr:$in)>;
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue