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Add AVX 256-bit MOVMSK forms 

llvm-svn: 108184
This commit is contained in:
Bruno Cardoso Lopes 2010-07-12 20:06:32 +00:00
parent 101c14c940
commit f9bcaad76d
3 changed files with 21 additions and 0 deletions
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6
llvm/lib/Target/X86/X86InstrSSE.td
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@ -1598,6 +1598,12 @@ let isAsmParserOnly = 1 in {
defm VMOVMSKPD : sse12_extr_sign_mask<VR128, int_x86_sse2_movmsk_pd, defm VMOVMSKPD : sse12_extr_sign_mask<VR128, int_x86_sse2_movmsk_pd,
"movmskpd", SSEPackedDouble>, OpSize, "movmskpd", SSEPackedDouble>, OpSize,
VEX; VEX;
// FIXME: merge with multiclass above when the intrinsics come.
def VMOVMSKPSYrr : PI<0x50, MRMSrcReg, (outs GR32:$dst), (ins VR256:$src),
"movmskps\t{$src, $dst|$dst, $src}", [], SSEPackedSingle>, VEX;
def VMOVMSKPDYrr : PI<0x50, MRMSrcReg, (outs GR32:$dst), (ins VR256:$src),
"movmskpd\t{$src, $dst|$dst, $src}", [], SSEPackedDouble>, OpSize,
VEX;
} }
//===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===//

7
llvm/test/MC/AsmParser/X86/x86_32-encoding.s
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@ -12398,4 +12398,11 @@
// CHECK: encoding: [0xc5,0xfc,0x2b,0x08] // CHECK: encoding: [0xc5,0xfc,0x2b,0x08]
vmovntps %ymm1, (%eax) vmovntps %ymm1, (%eax)
// CHECK: vmovmskps %xmm2, %eax
// CHECK: encoding: [0xc5,0xf8,0x50,0xc2]
vmovmskps %xmm2, %eax
// CHECK: vmovmskpd %xmm2, %eax
// CHECK: encoding: [0xc5,0xf9,0x50,0xc2]
vmovmskpd %xmm2, %eax

8
llvm/test/MC/AsmParser/X86/x86_64-encoding.s
View File

@ -2472,3 +2472,11 @@ pshufb CPI1_0(%rip), %xmm1
// CHECK: encoding: [0xc5,0x7c,0x2b,0x18] // CHECK: encoding: [0xc5,0x7c,0x2b,0x18]
vmovntps %ymm11, (%rax) vmovntps %ymm11, (%rax)
// CHECK: vmovmskps %xmm12, %eax
// CHECK: encoding: [0xc4,0xc1,0x78,0x50,0xc4]
vmovmskps %xmm12, %eax
// CHECK: vmovmskpd %xmm12, %eax
// CHECK: encoding: [0xc4,0xc1,0x79,0x50,0xc4]
vmovmskpd %xmm12, %eax