Define Config::isLE and Config::wordsize.

isLE() return true if the target is little-endian.
wordsize() returns 8 for 64-bit and 4 for 32-bit.

llvm-svn: 298167

lld/ELF/Config.h

@@ -168,6 +168,12 @@ struct Configuration {
   // Returns true if target is 64 bit.
   bool is64() const { return EKind == ELF64LEKind || EKind == ELF64BEKind; }
 
+  // Returns true if the target is little endian.
+  bool isLE() const { return EKind == ELF32LEKind || EKind == ELF64LEKind; }
+
+  // Returns 4 or 8 for ELF32 or ELF64, respectively.
+  int wordsize() const { return is64() ? 8 : 4; }
+
   // The ELF spec defines two types of relocation table entries, RELA and
   // REL. RELA is a triplet of (offset, info, addend) while REL is a
   // tuple of (offset, info). Addends for REL are implicit and read from

lld/ELF/EhFrame.cpp

@@ -127,7 +127,7 @@ template <class ELFT> static size_t getAugPSize(unsigned Enc) {
   switch (Enc & 0x0f) {
   case DW_EH_PE_absptr:
   case DW_EH_PE_signed:
-    return ELFT::Is64Bits ? 8 : 4;
+    return Config->wordsize();
   case DW_EH_PE_udata2:
   case DW_EH_PE_sdata2:
     return 2;

lld/ELF/InputFiles.cpp

@@ -81,8 +81,7 @@ template <class ELFT> void elf::ObjectFile<ELFT>::initializeDwarfLine() {
   DWARFContextInMemory Dwarf(*Obj, &ObjInfo);
   DwarfLine.reset(new DWARFDebugLine(&Dwarf.getLineSection().Relocs));
   DataExtractor LineData(Dwarf.getLineSection().Data,
-                         ELFT::TargetEndianness == support::little,
-                         ELFT::Is64Bits ? 8 : 4);
+                         Config->isLE(), Config->wordsize());
 
   // The second parameter is offset in .debug_line section
   // for compilation unit (CU) of interest. We have only one

lld/ELF/SyntheticSections.cpp

@@ -950,7 +950,7 @@ void GotPltSection::writeTo(uint8_t *Buf) {
   Buf += Target->GotPltHeaderEntriesNum * Target->GotPltEntrySize;
   for (const SymbolBody *B : Entries) {
     Target->writeGotPlt(Buf, *B);
-    Buf += Config->is64() ? 8 : 4;
+    Buf += Config->wordsize();
   }
 }
 
@@ -974,7 +974,7 @@ size_t IgotPltSection::getSize() const {
 void IgotPltSection::writeTo(uint8_t *Buf) {
   for (const SymbolBody *B : Entries) {
     Target->writeIgotPlt(Buf, *B);
-    Buf += Config->is64() ? 8 : 4;
+    Buf += Config->wordsize();
   }
 }
 
@@ -2194,7 +2194,7 @@ size_t MergeSyntheticSection::getSize() const {
 
 MipsRldMapSection::MipsRldMapSection()
     : SyntheticSection(SHF_ALLOC | SHF_WRITE, SHT_PROGBITS,
-                       Config->is64() ? 8 : 4, ".rld_map") {}
+                       Config->wordsize(), ".rld_map") {}
 
 void MipsRldMapSection::writeTo(uint8_t *Buf) {
   // Apply filler from linker script.
@@ -2226,7 +2226,7 @@ void ARMExidxSentinelSection<ELFT>::writeTo(uint8_t *Buf) {
 
 ThunkSection::ThunkSection(OutputSection *OS, uint64_t Off)
     : SyntheticSection(SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS,
-                       Config->is64() ? 8 : 4, ".text.thunk") {
+                       Config->wordsize(), ".text.thunk") {
   this->OutSec = OS;
   this->OutSecOff = Off;
 }

lld/ELF/SyntheticSections.h

@@ -718,7 +718,7 @@ private:
 class MipsRldMapSection : public SyntheticSection {
 public:
   MipsRldMapSection();
-  size_t getSize() const override { return Config->is64() ? 8 : 4; }
+  size_t getSize() const override { return Config->wordsize(); }
   void writeTo(uint8_t *Buf) override;
 };