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aesthetic changes, no functionality change. Evan, it's not clear 

what 'Available' is, please add a comment near it and rename it
if appropriate.

llvm-svn: 44703
This commit is contained in:
Chris Lattner 2007-12-08 07:22:58 +00:00
parent 2b07d8c5a0
commit ff87f05e43
1 changed files with 40 additions and 38 deletions
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78
llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
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@ -562,7 +562,7 @@ void X86DAGToDAGISel::EmitFunctionEntryCode(Function &Fn, MachineFunction &MF) {
/// MatchAddress - Add the specified node to the specified addressing mode, /// MatchAddress - Add the specified node to the specified addressing mode,
/// returning true if it cannot be done. This just pattern matches for the /// returning true if it cannot be done. This just pattern matches for the
/// addressing mode /// addressing mode.
bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM, bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM,
bool isRoot, unsigned Depth) { bool isRoot, unsigned Depth) {
// Limit recursion. // Limit recursion.
@ -653,33 +653,35 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM,
break; break;
case ISD::SHL: case ISD::SHL:
if (!Available && AM.IndexReg.Val == 0 && AM.Scale == 1) if (Available || AM.IndexReg.Val != 0 || AM.Scale != 1)
if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.Val->getOperand(1))) { break;
unsigned Val = CN->getValue();
if (Val == 1 || Val == 2 || Val == 3) { if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.Val->getOperand(1))) {
AM.Scale = 1 << Val; unsigned Val = CN->getValue();
SDOperand ShVal = N.Val->getOperand(0); if (Val == 1 || Val == 2 || Val == 3) {
AM.Scale = 1 << Val;
SDOperand ShVal = N.Val->getOperand(0);
// Okay, we know that we have a scale by now. However, if the scaled // Okay, we know that we have a scale by now. However, if the scaled
// value is an add of something and a constant, we can fold the // value is an add of something and a constant, we can fold the
// constant into the disp field here. // constant into the disp field here.
if (ShVal.Val->getOpcode() == ISD::ADD && ShVal.hasOneUse() && if (ShVal.Val->getOpcode() == ISD::ADD && ShVal.hasOneUse() &&
isa<ConstantSDNode>(ShVal.Val->getOperand(1))) { isa<ConstantSDNode>(ShVal.Val->getOperand(1))) {
AM.IndexReg = ShVal.Val->getOperand(0); AM.IndexReg = ShVal.Val->getOperand(0);
ConstantSDNode *AddVal = ConstantSDNode *AddVal =
cast<ConstantSDNode>(ShVal.Val->getOperand(1)); cast<ConstantSDNode>(ShVal.Val->getOperand(1));
uint64_t Disp = AM.Disp + (AddVal->getValue() << Val); uint64_t Disp = AM.Disp + (AddVal->getValue() << Val);
if (isInt32(Disp)) if (isInt32(Disp))
AM.Disp = Disp; AM.Disp = Disp;
else else
AM.IndexReg = ShVal;
} else {
AM.IndexReg = ShVal; AM.IndexReg = ShVal;
} } else {
return false; AM.IndexReg = ShVal;
} }
return false;
} }
break; break;
}
case ISD::SMUL_LOHI: case ISD::SMUL_LOHI:
case ISD::UMUL_LOHI: case ISD::UMUL_LOHI:
@ -738,22 +740,22 @@ bool X86DAGToDAGISel::MatchAddress(SDOperand N, X86ISelAddressMode &AM,
case ISD::OR: case ISD::OR:
// Handle "X | C" as "X + C" iff X is known to have C bits clear. // Handle "X | C" as "X + C" iff X is known to have C bits clear.
if (!Available) { if (Available) break;
if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
X86ISelAddressMode Backup = AM; if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
// Start with the LHS as an addr mode. X86ISelAddressMode Backup = AM;
if (!MatchAddress(N.getOperand(0), AM, false) && // Start with the LHS as an addr mode.
// Address could not have picked a GV address for the displacement. if (!MatchAddress(N.getOperand(0), AM, false) &&
AM.GV == NULL && // Address could not have picked a GV address for the displacement.
// On x86-64, the resultant disp must fit in 32-bits. AM.GV == NULL &&
isInt32(AM.Disp + CN->getSignExtended()) && // On x86-64, the resultant disp must fit in 32-bits.
// Check to see if the LHS & C is zero. isInt32(AM.Disp + CN->getSignExtended()) &&
CurDAG->MaskedValueIsZero(N.getOperand(0), CN->getValue())) { // Check to see if the LHS & C is zero.
AM.Disp += CN->getValue(); CurDAG->MaskedValueIsZero(N.getOperand(0), CN->getValue())) {
return false; AM.Disp += CN->getValue();
} return false;
AM = Backup;
} }
AM = Backup;
} }
break; break;
} }