9a357637ef
Looks like this condition is inverted.
...
llvm-svn: 52841
2008-06-27 22:11:49 +00:00
21498f52b2
Don't perform expensive queries checking for super and sub registers when we know that there aren't any.
...
This speed up LiveVariables on instcombine at -O0 -g from 0.3855s to 0.3503s. Look for more improvements in this area soon!
llvm-svn: 52804
2008-06-27 01:22:50 +00:00
3f6bb2713e
Add a flag to indicate that an instruction is as cheap (or cheaper) than a move
...
instruction to execute. This can be used for transformations (like two-address
conversion) to remat an instruction instead of generating a "move"
instruction. The idea is to decrease the live ranges and register pressure and
all that jazz.
llvm-svn: 51660
2008-05-28 22:54:52 +00:00
72a0bc148c
Fix a broken doxygen comment, and reword it for clarity.
...
llvm-svn: 50687
2008-05-06 00:20:10 +00:00
6c17773ccc
Code clean up.
...
llvm-svn: 49783
2008-04-16 09:41:59 +00:00
3bc3ddd638
Rename MemOperand to MachineMemOperand. This was suggested by
...
review feedback from Chris quite a while ago. No functionality
change.
llvm-svn: 49348
2008-04-07 19:35:22 +00:00
a7cca362af
detabify llvm, patch by Mike Stump!
...
llvm-svn: 48577
2008-03-20 01:22:40 +00:00
399e1101ba
Refactor some code out of MachineSink into a MachineInstr query.
...
llvm-svn: 48311
2008-03-13 00:44:09 +00:00
6325446666
Refactor code. Remove duplicated functions that basically do the same thing as
...
findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies.
llvm-svn: 47927
2008-03-05 00:59:57 +00:00
2ae707888b
Did I say 'e = getNumOperands()'? I meant --e, of course.
...
llvm-svn: 47875
2008-03-04 00:48:15 +00:00
0e541ea730
Miscellaneous clean-ups based on Evan's feedback:
...
- Cleaned up how the prologue-epilogue inserter loops over the instructions.
- Instead of restarting the processing of an instruction if we remove an
implicit kill, just update the end iterator and make sure that the iterator
isn't incremented.
llvm-svn: 47870
2008-03-03 23:57:28 +00:00
7921ad0d67
Go through the machine instruction's operands to make sure that we're not
...
marking both a super- and sub-register as "killed". This removes implicit uses
that are marked as "killed".
llvm-svn: 47862
2008-03-03 22:14:33 +00:00
d7a258d325
Rename PrintableName to Name.
...
llvm-svn: 47629
2008-02-26 21:47:57 +00:00
a7d1ed4c98
Some platforms use the same name for 32-bit and 64-bit registers (like
...
%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data that lets you
specify a different name to be printed than the one that goes into the
ASM file -- %x3 instead of %r3, for instance.
llvm-svn: 47534
2008-02-24 00:56:13 +00:00
26b76b69f4
Support a new type of MachineOperand, MO_FPImmediate, used for holding
...
FP Immediates, crazily enough
llvm-svn: 47117
2008-02-14 07:39:30 +00:00
3a4be0fdef
Rename MRegisterInfo to TargetRegisterInfo.
...
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
e460869d86
Also print alignment.
...
llvm-svn: 46895
2008-02-08 22:05:07 +00:00
b781c79d2c
Don't abort if a MemOperand is missing a SourceValue; just print it
...
as <unknown>. And make some minor adjustments to the MemOperand
dump format.
llvm-svn: 46853
2008-02-07 16:18:00 +00:00
2d489b5081
Re-apply the memory operand changes, with a fix for the static
...
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.
llvm-svn: 46827
2008-02-06 22:27:42 +00:00
27b32b87ed
Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit.
...
llvm-svn: 46623
2008-01-31 21:00:00 +00:00
1c6c16ea11
Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution.
...
llvm-svn: 46609
2008-01-31 09:59:15 +00:00
3646fdda67
Create a new class, MemOperand, for describing memory references
...
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.
Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.
Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.
llvm-svn: 46585
2008-01-31 00:25:39 +00:00
2a8a485630
Move some functionality for adding flags to MachineInstr's into methods on MachineInstr rather than LiveVariables.
...
llvm-svn: 46295
2008-01-24 01:10:07 +00:00
f3efadcb5b
remove #includage
...
llvm-svn: 45697
2008-01-07 07:42:25 +00:00
03ad885039
rename TargetInstrDescriptor -> TargetInstrDesc.
...
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
llvm-svn: 45695
2008-01-07 07:27:27 +00:00
f376c99ea0
rename hasVariableOperands() -> isVariadic(). Add some comments.
...
Evan, please review the comments I added to getNumDefs to make sure
that they are accurate, thx.
llvm-svn: 45687
2008-01-07 05:19:29 +00:00
b0d06b4381
Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor
...
llvm-svn: 45680
2008-01-07 03:13:06 +00:00
e55e115616
Add predicates methods to TargetOperandInfo, and switch all clients
...
over to using them, instead of diddling Flags directly. Change the
various flags from const variables to enums.
llvm-svn: 45677
2008-01-07 02:39:19 +00:00
a98c679de0
Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
...
that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
llvm-svn: 45674
2008-01-07 01:56:04 +00:00
caaf8aae4d
Make MachineRegisterInfo::getVRegDef more efficient by aiming the keep the def of the vreg at the start of the list, so the list doesn't need to be traversed.
...
llvm-svn: 45483
2008-01-01 21:08:22 +00:00
0cb9dd7aa2
switch the register iterator to act more like hte LLVM value iterator: dereferencing
...
it now returns the machineinstr of the use. To get the operand, use I.getOperand().
Add a new MachineRegisterInfo::replaceRegWith, which is basically like
Value::replaceAllUsesWith.
llvm-svn: 45482
2008-01-01 20:36:19 +00:00
961e7427ea
Implement automatically updated def/use lists for all MachineInstr register
...
operands. The lists are currently kept in MachineRegisterInfo, but it does
not yet provide an iterator interface to them.
llvm-svn: 45477
2008-01-01 01:12:31 +00:00
574e7166e0
properly encapsulate the parent field of MBB and MI with get/set accessors.
...
llvm-svn: 45469
2007-12-31 04:56:33 +00:00
a10fff51d9
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
...
that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
llvm-svn: 45467
2007-12-31 04:13:23 +00:00
a5bb370aa4
Add new shorter predicates for testing machine operands for various types:
...
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
2007-12-30 23:10:15 +00:00
6005589faf
More cleanups for MachineOperand:
...
- Eliminate the static "print" method for operands, moving it
into MachineOperand::print.
- Change various set* methods for register flags to take a bool
for the value to set it to. Remove unset* methods.
- Group methods more logically by operand flavor in MachineOperand.h
llvm-svn: 45461
2007-12-30 21:56:09 +00:00
c98c0e57eb
MachineOperand:
...
- Add getParent() accessors.
- Move SubReg out of the AuxInfo union, to make way for future changes.
- Remove the getImmedValue/setImmedValue methods.
- in some MachineOperand::Create* methods, stop initializing fields that are dead.
MachineInstr:
- Delete one copy of the MachineInstr printing code, now there is only one dump
format and one copy of the code.
- Make MachineOperand use the parent field to get info about preg register names if
no target info is otherwise available.
- Move def/use/kill/dead flag printing to the machineoperand printer, so they are
always printed for an operand.
llvm-svn: 45460
2007-12-30 21:31:53 +00:00
35fececec9
simpilfy some register printing code.
...
llvm-svn: 45458
2007-12-30 21:08:36 +00:00
383a873a9a
eliminate a copy of the machineoperand printing stuff. Keep the copy that
...
knows how to print offsets.
llvm-svn: 45457
2007-12-30 21:03:30 +00:00
49bd29daa0
Simplify and clean up some machine operand/instr printing/dumping stuff.
...
llvm-svn: 45456
2007-12-30 21:01:27 +00:00
0dad74d252
two register machineoperands are not identical unless their subregs match.
...
llvm-svn: 45455
2007-12-30 20:55:08 +00:00
81798417dc
MachineOperand::getImmedValue -> MachineOperand::getImm
...
llvm-svn: 45454
2007-12-30 20:50:28 +00:00
3c6ce5b43c
make machine operands fatter: give each one an up-pointer to the
...
machineinstr that owns it.
llvm-svn: 45449
2007-12-30 06:11:04 +00:00
e35dfb827f
Start using the simplified methods for adding operands.
...
llvm-svn: 45432
2007-12-30 00:41:17 +00:00
c288ff1d78
simplify some code by factoring operand construction better.
...
llvm-svn: 45428
2007-12-30 00:12:25 +00:00
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
...
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
7f02cfa599
Clean up sub-register implementation by moving subReg information back to
...
MachineOperand auxInfo. Previous clunky implementation uses an external map
to track sub-register uses. That works because register allocator uses
a new virtual register for each spilled use. With interval splitting (coming
soon), we may have multiple uses of the same register some of which are
of using different sub-registers from others. It's too fragile to constantly
update the information.
llvm-svn: 44104
2007-11-14 07:59:08 +00:00
9490e0d078
Optionally create a MachineInstr without default implicit operands.
...
llvm-svn: 42945
2007-10-13 02:23:01 +00:00
aa2d6ef81d
EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like
...
(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.
llvm-svn: 42899
2007-10-12 08:50:34 +00:00
9da02f5ee2
Remove isReg, isImm, and isMBB, and change all their users to use
...
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.
llvm-svn: 41958
2007-09-14 20:33:02 +00:00
58c468fb09
Remove spurious consts. This fixes warnings with compilers that
...
are strict about such things.
llvm-svn: 41956
2007-09-14 20:08:19 +00:00
0dbc152d2e
Remove subreg index from MachineInstr's and also keep vregs as unsigned when adding operands.
...
llvm-svn: 40514
2007-07-26 07:00:46 +00:00
234a90e83e
MachineInstr::isPredicable() is no longer needed.
...
llvm-svn: 37599
2007-06-15 19:06:07 +00:00
5983bdbb2c
Add missing const qualifiers.
...
llvm-svn: 37341
2007-05-29 18:35:22 +00:00
5ea933a009
Rename M_PREDICATED to M_PREDICABLE; Moved isPredicable() to MachineInstr.
...
llvm-svn: 37121
2007-05-16 20:56:08 +00:00
4d728b0419
Added getNumExplicitOperands and findFirstPredOperand.
...
llvm-svn: 37064
2007-05-15 01:26:09 +00:00
27a625a74b
llvm bug #1350 , parts 1, 2, and 3.
...
llvm-svn: 36618
2007-05-01 05:57:02 +00:00
910c80851e
Rename findRegisterUseOperand to findRegisterUseOperandIdx to avoid confusion.
...
llvm-svn: 36483
2007-04-26 19:00:32 +00:00
ec3ac316e2
Change findRegisterUseOperand() to return operand index instead.
...
llvm-svn: 35363
2007-03-26 22:37:45 +00:00
9965aebd5d
Use findRegisterUseOperand to find a kill of particular register.
...
llvm-svn: 34512
2007-02-23 01:04:26 +00:00
f7ed82da10
Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
...
llvm-svn: 34428
2007-02-19 21:49:54 +00:00
da81bf4d3e
For PR1207:
...
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.
llvm-svn: 34399
2007-02-19 03:20:00 +00:00
6accd480a2
Added findRegisterDefOperand().
...
llvm-svn: 34380
2007-02-17 11:10:18 +00:00
66cb162f92
Print <dead> def operands.
...
llvm-svn: 34343
2007-02-16 09:49:18 +00:00
29192e6274
The best unbreakage yet, addressing Bill's concerns.
...
llvm-svn: 32622
2006-12-16 02:15:42 +00:00
b82309f1ab
An even better unbreakage...
...
llvm-svn: 32617
2006-12-15 22:57:14 +00:00
f3baad3ee1
Changed llvm_ostream et all to OStream. llvm_cerr, llvm_cout, llvm_null, are
...
now cerr, cout, and NullStream resp.
llvm-svn: 32298
2006-12-07 01:30:32 +00:00
75c2194b1a
Move copyKillDeadInfo out-of-line. Add findRegisterUseOperand().
...
llvm-svn: 32273
2006-12-06 08:27:42 +00:00
3c3ce98530
- MachineInstr now keeps a ptr to TargetInstrDescriptor instead of Opcode.
...
- Remove the ugly TargetInstrDescriptors hack.
llvm-svn: 32032
2006-11-30 07:08:44 +00:00
787b77320f
Use llvm streams instead of <iostream>
...
llvm-svn: 31985
2006-11-28 22:48:48 +00:00
b2a6b0dbad
Clean up.
...
llvm-svn: 31957
2006-11-28 02:25:34 +00:00
20350c4025
Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
...
of opcode and number of operands.
llvm-svn: 31947
2006-11-27 23:37:22 +00:00
539df43e4b
setOperand should not zap the operand list or add implicit operands to an
...
instruction. Doing so breaks the FP stackifier, the alpha branch selector
the sparc fpmover.
This fixes PR1012 and CodeGen/X86/fp-stack-compare.ll
llvm-svn: 31876
2006-11-20 17:57:22 +00:00
ebb0357b4c
Minor updates.
...
llvm-svn: 31761
2006-11-15 20:54:29 +00:00
77af6ac5e8
- Let MachineInstr ctors add implicit def and use operands. Other operands
...
will be inserted before these operands. If the opcode changes (by
setOpcode), the implicit operands are updated as well.
- Added IsKill, IsDead fields to MachineOperand in preparation for changes
that move kill / dead info to MachineInstr's.
llvm-svn: 31711
2006-11-13 23:34:06 +00:00
979bbf48d5
Add methods to add implicit def use operands to a MI.
...
llvm-svn: 31675
2006-11-11 10:20:02 +00:00
8c9c6d71ed
Add implicit def / use operands to MachineInstr.
...
llvm-svn: 31633
2006-11-10 08:43:01 +00:00
7a7835deb4
be more aggressive about matching identical instructions.
...
llvm-svn: 31179
2006-10-25 18:08:14 +00:00
33f5af09e4
implement MachineOperand::isIdenticalTo
...
llvm-svn: 31088
2006-10-20 22:39:59 +00:00
2cb238320d
Only call isUse/isDef on register operands
...
llvm-svn: 30118
2006-09-05 20:19:27 +00:00
55772ccfd6
Instructions with variable operands (variable_ops) can have a number required
...
operands. e.g.
def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops),
"call {*}$dst", [(X86call GR32:$dst)]>;
TableGen should emit operand informations for the "required" operands.
Added a target instruction info flag M_VARIABLE_OPS to indicate the target
instruction may have more operands in addition to the minimum required
operands.
llvm-svn: 28791
2006-06-15 07:22:16 +00:00
0f5c7936e7
Remove a bogus cast.
...
llvm-svn: 28492
2006-05-26 08:00:14 +00:00
abdf4d569c
Final pass of minor cleanups for MachineInstr
...
llvm-svn: 28110
2006-05-04 19:36:09 +00:00
53af9da363
Remove redundancy and a level of indirection when creating machine operands
...
llvm-svn: 28107
2006-05-04 19:14:44 +00:00
469647bf38
Remove and simplify some more machineinstr/machineoperand stuff.
...
llvm-svn: 28105
2006-05-04 18:16:01 +00:00
10b71c0d08
Rename MO_VirtualRegister -> MO_Register. Clean up immediate handling.
...
llvm-svn: 28104
2006-05-04 18:05:43 +00:00
10d6341618
Move some methods out of MachineInstr into MachineOperand
...
llvm-svn: 28102
2006-05-04 17:52:23 +00:00
fef7a2d0f5
There shalt be only one "immediate" operand type!
...
llvm-svn: 28099
2006-05-04 17:21:20 +00:00
15c52bda1d
Change "value" in MachineOperand to be a GlobalValue, as that is the only
...
thing that can be in it. Remove a dead method.
llvm-svn: 28098
2006-05-04 17:02:51 +00:00
ee64b6b40f
Remove a bunch more dead V9 specific stuff
...
llvm-svn: 28094
2006-05-04 01:26:39 +00:00
940cc978ef
Remove a bunch more SparcV9 specific stuff
...
llvm-svn: 28093
2006-05-04 01:15:02 +00:00
6e663f1c1e
Remove some more V9-specific stuff.
...
llvm-svn: 28092
2006-05-04 00:49:59 +00:00
9f6639b64d
Remove some more unused stuff from MachineInstr that was leftover from V9.
...
llvm-svn: 28091
2006-05-04 00:44:25 +00:00
4ca2ea5b43
JumpTable support! What this represents is working asm and jit support for
...
x86 and ppc for 100% dense switch statements when relocations are non-PIC.
This support will be extended and enhanced in the coming days to support
PIC, and less dense forms of jump tables.
llvm-svn: 27947
2006-04-22 18:53:45 +00:00
dcc1f995eb
This field no longer exists
...
llvm-svn: 27899
2006-04-20 18:32:41 +00:00
a38c3580bd
Remove some of the obvious V9-specific cruft
...
llvm-svn: 27893
2006-04-20 18:08:53 +00:00
bec79b4a59
Add a MachineInstr::eraseFromParent convenience method.
...
llvm-svn: 27775
2006-04-17 21:35:41 +00:00
835702a094
Remove trailing whitespace
...
llvm-svn: 21420
2005-04-21 22:36:52 +00:00
3065220deb
Allow machine operands to represent global variables with offsets. This is
...
useful when you have a reference like:
int A[100];
void foo() { A[10] = 1; }
In this case, &A[10] is a single constant and should be treated as such.
Only MO_GlobalAddress and MO_ExternalSymbol are allowed to use this field, no
other operand type is.
This is another fine patch contributed by Jeff Cohen!!
llvm-svn: 17007
2004-10-15 04:38:41 +00:00
7c16caa336
Changes For Bug 352
...
Move include/Config and include/Support into include/llvm/Config,
include/llvm/ADT and include/llvm/Support. From here on out, all LLVM
public header files must be under include/llvm/.
llvm-svn: 16137
2004-09-01 22:55:40 +00:00
b47ab7ae1c
* Doxygenify comments
...
* Fix spacing, grammar in comment
* Make code layout consistent
* Wrap code at 80 cols
* Delete spurious blank lines
No functional changes.
llvm-svn: 14721
2004-07-09 14:45:17 +00:00
eb04d9bcb4
Add #include <iostream> since Value.h does not #include it any more.
...
llvm-svn: 14622
2004-07-04 12:19:56 +00:00
23dbc8170c
Made a fix so that you can print out MachineInstrs that belong to a MachineBasicBlock that is not yet attached to a MachineFunction. This change includes changing the third operand (TargetMachine) to a pointer for the MachineInstr::print function.
...
llvm-svn: 14389
2004-06-25 00:13:11 +00:00
4300ca9d32
Make debugging dumps w/ multiple MachineBBs for a given LLVM BB readable.
...
llvm-svn: 14205
2004-06-17 22:26:53 +00:00
2150542af9
Adjust to new TargetMachine interface
...
llvm-svn: 13956
2004-06-02 05:57:12 +00:00
bcee21b491
Changed clone to be const.
...
Changed copy constructor to set parent, prev, and next pointers to null.
llvm-svn: 13706
2004-05-24 03:14:18 +00:00
9953d86e63
Fixed up my changes to add support for cloning Machine Instructions.
...
llvm-svn: 13665
2004-05-23 20:58:02 +00:00
e6a4a7dbcf
Adding support to clone MachineInstr
...
llvm-svn: 13661
2004-05-23 19:35:12 +00:00
015972103d
Make MachineOperand's value named 'contents'. Make really, really sure
...
it is always completely initialized and copied.
Also, fix up many comments and asserts.
llvm-svn: 12100
2004-03-03 19:07:27 +00:00
44b1b22a2d
int64_t -> int
...
llvm-svn: 11977
2004-02-29 05:07:02 +00:00
519e1e8c92
Fix crash caused by passing register 0 to
...
MRegisterInfo::isPhysicalRegister().
llvm-svn: 11894
2004-02-27 01:52:34 +00:00
91a7dc0a6e
Fix bugs in finegrainification
...
llvm-svn: 11758
2004-02-23 18:40:08 +00:00
43df6c268b
Finegrainify namespacification
...
llvm-svn: 11757
2004-02-23 18:38:20 +00:00
63f41abfe6
Fix a __LONG__ term annoyance of mine: symbolic registers weren't being printed
...
by operator<< on MachineInstr's, and looking up what register "24" is all of the
time was greatly annoying.
llvm-svn: 11623
2004-02-19 16:17:08 +00:00
14f3fe81c6
Add LeakDetection to MachineInstr.
...
Move out of line member functions of MachineBasicBlock to
MachineBasicBlock.cpp.
llvm-svn: 11497
2004-02-16 07:17:43 +00:00
8cdd0215bf
Remove getAllocatedRegNum(). Use getReg() instead.
...
llvm-svn: 11393
2004-02-13 21:01:20 +00:00
e8f7c2f863
Add head-of-file comments and Doxygen comments. Tighten up a lot of whitespace.
...
Rename SetMachineOperandConst's formal parameters to match other methods here.
Mark some methods as being used only by the SPARC back-end.
Fix a missing-paren bug in OutputValue().
llvm-svn: 11363
2004-02-13 04:39:32 +00:00
de8ac749fe
Add parent pointer to MachineInstr that points to owning
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MachineBasicBlock. Also change opcode to a short and numImplicitRefs
to an unsigned char so that overall MachineInstr's size stays the
same.
llvm-svn: 11357
2004-02-12 18:49:07 +00:00
6a597d6057
Rename the opCode instance variable to Opcode
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llvm-svn: 11348
2004-02-12 16:09:53 +00:00
6108d9d5ee
This field is never read
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llvm-svn: 11346
2004-02-12 16:04:49 +00:00
327426411e
Modify the two address instruction pass to remove the duplicate
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operand of the instruction and thus simplify the register allocation.
llvm-svn: 11124
2004-02-04 22:17:40 +00:00
3d100ef0ca
When an instruction like: A += B had both A and B virtual registers
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spilled, A was loaded from its stack location twice. This fixes the bug.
llvm-svn: 11093
2004-02-03 01:13:07 +00:00
aaba4639f8
Change interface of MachineOperand as follows:
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a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
b) add isUse(), isDef()
c) rename opHiBits32() to isHiBits32(),
opLoBits32() to isLoBits32(),
opHiBits64() to isHiBits64(),
opLoBits64() to isLoBits64().
This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.
llvm-svn: 10461
2003-12-14 13:24:17 +00:00
960707c335
Put all LLVM code into the llvm namespace, as per bug 109.
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llvm-svn: 9903
2003-11-11 22:41:34 +00:00
482202a601
Added LLVM project notice to the top of every C++ source file.
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Header files will be on the way.
llvm-svn: 9298
2003-10-20 19:43:21 +00:00
02fe6b7683
Fixed spelling.
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llvm-svn: 8588
2003-09-17 21:34:23 +00:00
da92f366c7
Fix assertion in MachineInstr::substituteValue().
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llvm-svn: 7675
2003-08-07 15:01:48 +00:00
020b544cbc
Do not insert physical regsiters into the regsUsed set
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llvm-svn: 7617
2003-08-05 21:55:20 +00:00
cd4f4320b0
All callers of these methods actually wanted them to preserve the flags,
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so get rid of the def/use parameters that were getting passed in.
**** This now changes the semantics of these methods to preserve the flags,
not clobber them!
llvm-svn: 7602
2003-08-05 16:58:46 +00:00
41a894de77
Simplify code, eliminating the need for the X86 isVoid target instr flag
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llvm-svn: 7534
2003-08-03 21:51:45 +00:00
1789d23990
Remove using decl
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llvm-svn: 7531
2003-08-03 20:24:29 +00:00
689adb19b0
Change interface to MachineInstr::substituteValue to specify more precisely
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which args can be substituted: defsOnly, defsAndUses or usesOnly.
llvm-svn: 7154
2003-07-10 19:45:07 +00:00
c468882155
Allow explicit physical registers for implicit operands.
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llvm-svn: 6468
2003-05-31 07:39:06 +00:00
7366fa1aa6
(1) Added special register class containing (for now) %fsr.
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Fixed spilling of %fcc[0-3] which are part of %fsr.
(2) Moved some machine-independent reg-class code to class TargetRegInfo
from SparcReg{Class,}Info.
(3) Renamed MachienOperand::opIsDef to MachineOperand::opIsDefOnly()
and related functions and flags. Fixed several bugs where only
"isDef" was being checked, not "isDefAndUse".
llvm-svn: 6341
2003-05-27 00:05:23 +00:00
5da071b265
Remove obsolete ctor
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llvm-svn: 5301
2003-01-15 19:47:02 +00:00
b4d58d7f9e
Rename MachineInstrInfo -> TargetInstrInfo
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llvm-svn: 5272
2003-01-14 22:00:31 +00:00
a2ad874c95
Add support for 3 new forms of MachineOperand
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llvm-svn: 5217
2003-01-13 00:23:24 +00:00
fd1ecadb1d
* Add printing support for FrameIndex operands
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llvm-svn: 5194
2002-12-28 20:37:37 +00:00
f895418b47
Implement printing of MBB arguments
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llvm-svn: 5053
2002-12-15 20:35:25 +00:00
d8ea18b695
Print is const!
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llvm-svn: 4737
2002-11-17 23:22:13 +00:00
17ec8a8dd0
Remove only uses of markDef/markDefAndUse methods
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llvm-svn: 4719
2002-11-17 22:14:08 +00:00
6c614a9931
Remove fixme
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llvm-svn: 4447
2002-10-30 02:02:37 +00:00
ac6e97410b
Add special code to make printing SSA form machine instructions nicer
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llvm-svn: 4446
2002-10-30 01:55:38 +00:00
4e9fb1f52e
Use MRegisterInfo, if available, to print symbolic register names
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llvm-svn: 4438
2002-10-30 00:58:19 +00:00
214808f8ac
Implement structured machine code printing
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llvm-svn: 4435
2002-10-30 00:48:05 +00:00
27ccb70df6
Implement autoinserting ctor
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llvm-svn: 4426
2002-10-29 23:19:00 +00:00
a1b4f0f85e
Remove separate vector of implicit refs from MachineInstr, and
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instead record them as extra operands in the operands[] vector.
Also, move CallArgsDescriptor into this class instead of making it an
annotation on the machine instruction.
llvm-svn: 4399
2002-10-29 19:41:18 +00:00
07e26837a9
Move TargetInstrDescriptors extern to the one .cpp file that refers to it:
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MachineInstr.cpp
llvm-svn: 4392
2002-10-29 17:40:30 +00:00
660bf10981
Use higher level methods, don't use TargetInstrDescriptors directly!
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llvm-svn: 4389
2002-10-29 17:35:39 +00:00
5c7d638208
Remove all traces of the "Opcode Mask" field in the MachineInstr class
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llvm-svn: 4359
2002-10-28 21:17:20 +00:00
bee314fc94
Remove more default arguments that are never used
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llvm-svn: 4358
2002-10-28 21:02:40 +00:00
307fb1a314
Remove default operands that are never used
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llvm-svn: 4357
2002-10-28 20:59:49 +00:00
ca4a9d20b8
* Make MachineOperand ctors private, so MachineOperand can only be created
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by MachineInstr.
* Add a bunch of new methods to allow incremental addition of operands to the
machine instr instance.
llvm-svn: 4356
2002-10-28 20:48:39 +00:00
864d279667
Remove two arguments that are never specified
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llvm-svn: 4348
2002-10-28 19:46:59 +00:00
340bb96e64
Fairly major overhaul of MachineInstr & Operand classes
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- Inline methods that are mostly a single line anyway
- Eliminate several methods that were never called
- Group methods a bit more consistently
llvm-svn: 4329
2002-10-28 04:24:49 +00:00
9668c8c8db
Add #includes now that MachineInstr.h doesn't include llvm/Target/MachineInstrInfo.h
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llvm-svn: 4327
2002-10-28 02:28:39 +00:00
ce64eddb71
- Two minor improvements to the MachineInstr class to reduce footprint and
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overhead: Merge 3 parallel vectors into 1, change regsUsed hash_set to be a
bitvector. Sped up LLC a little less than 10% in a debug build!
llvm-svn: 4261
2002-10-22 23:16:21 +00:00
97c348d9ec
Add method MachineInstr::replace to rewrite a machine instruction in place.
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llvm-svn: 3843
2002-09-20 00:47:49 +00:00
751130215f
Dump routine now writes out allocated register numbers if available.
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llvm-svn: 3737
2002-09-16 15:18:53 +00:00
fa99db77a8
Add method MachineInstr::substituteValue() which substitutes
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one Value with another one in all operands and implicit references
of the machine instruction.
llvm-svn: 3306
2002-08-14 16:52:58 +00:00
959a5fbf8e
* Removed extraneous #includes
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* Fixed file headers to be consistent with the rest of LLVM
* Other minor fixes
llvm-svn: 3278
2002-08-09 20:08:06 +00:00
10073a9080
*** empty log message ***
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llvm-svn: 3075
2002-07-25 06:17:51 +00:00
f089faa7f6
Add support for marking each operand as a %hh, %hm, %lm or %lo.
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Represent previous bools and these ones with flags in a single byte
per operand.
llvm-svn: 2860
2002-07-10 21:45:04 +00:00
6c013a9689
Moved class MachineCodeForBasicBlock to MachineCodeForBasicBlock.{cpp,h}.
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An (explicit or implicit) operand may now be both a def and a use.
Also add a set of regs used by each instruction.
dump() no longer takes an optional argument, which doesn't work in gdb.
llvm-svn: 2821
2002-07-08 22:38:45 +00:00
d79d2c3892
Improve printing during dumps.
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llvm-svn: 2311
2002-04-25 04:31:18 +00:00
95f65b6f84
s/method/function
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llvm-svn: 2177
2002-04-08 22:01:15 +00:00
307916c008
Bug fix in setting CC register.
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Also use distinct names for the three types of SetMachineOperand
to avoid painful overloading problems and errors.
llvm-svn: 1904
2002-03-18 03:35:24 +00:00
4cec147d4e
* Prune #includes
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* Remove MachineCodeFor(Method|VMInstr) code to their own .cpp files
llvm-svn: 1649
2002-02-03 07:46:01 +00:00
7f74a56e24
Changes to build successfully with GCC 3.02
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llvm-svn: 1503
2002-01-20 22:54:45 +00:00
2413b160ec
Renamed inst_const_iterator -> const_inst_iterator
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Renamed op_const_iterator -> const_op_iterator
Renamed PointerType::getValueType() -> PointerType::getElementType()
llvm-svn: 1408
2001-12-04 00:03:30 +00:00
ec62f24009
Added naming to inserted phi copy values - for easy debugging
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llvm-svn: 1325
2001-11-15 20:46:40 +00:00
fbb8a64749
Modify AllocateLocalVar method to take a size argument.
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llvm-svn: 1318
2001-11-15 15:22:26 +00:00
64f7567391
Small changed to printing a machine operand - It the operand is a def, it prints
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a star after it - only for debugging
llvm-svn: 1309
2001-11-14 20:05:23 +00:00
4b9c46da24
Bug fix in offset alignment computations: don't subtract the padding
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value from size *before* subtracting size from offset!
llvm-svn: 1283
2001-11-12 23:26:23 +00:00
6e004c0818
Improved printing routines.
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llvm-svn: 1263
2001-11-12 14:19:47 +00:00
3b02a35a80
Adjust all stack variable offsets to be aligned by size.
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llvm-svn: 1261
2001-11-12 05:17:23 +00:00
1d5c6e0939
Fix errors in computing downgrowing offsets, and in
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computing size of extra outgoing args.
llvm-svn: 1256
2001-11-11 21:23:33 +00:00
c53037205b
Major overhaul of stack frame management.
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llvm-svn: 1185
2001-11-08 04:47:06 +00:00
59a13288a6
Make reg. numbers signed ints.
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llvm-svn: 1137
2001-11-05 03:56:02 +00:00
cc80b02834
Added class MachineCodeForMethod.
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llvm-svn: 947
2001-10-22 13:51:33 +00:00
59e864eb92
Added implict operand printing for operator( ostream, MachineInstr&)
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llvm-svn: 912
2001-10-18 22:40:02 +00:00
6d19dc9080
1. Add a bottom-up pass on BURG trees that is used to fix constant operands.
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Needs to be bottom up because constant values may be forward-substituted
to their uses (i.e., into the parent in the BURG tree).
2. Move most of the constant-fixup code into machine-indepedent file
InstrSelectionSupport.cpp.
llvm-svn: 859
2001-10-17 23:57:50 +00:00
c36a504cfe
Moved code generation support routines to InstrSelectionSupport.cpp.
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llvm-svn: 717
2001-10-10 20:49:07 +00:00
3856934386
Convert more code to use new style casts
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Eliminate old style casts from value.h
llvm-svn: 696
2001-10-01 20:11:19 +00:00
e44abbb99d
Improved dump for disp type operand.
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llvm-svn: 679
2001-09-30 23:44:19 +00:00
bb81dae651
Minor changes.
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llvm-svn: 613
2001-09-18 12:56:28 +00:00
bae3812a95
added setRegForValue to MachineOperand class
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llvm-svn: 591
2001-09-15 19:07:45 +00:00
706ee8e5ec
Eliminate MainTreeNode function
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llvm-svn: 550
2001-09-11 23:22:43 +00:00
acfa507663
Fix a bug I introduced (assertion failed: Unknown operand type), and convert to predicate style for type checks
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llvm-svn: 531
2001-09-10 19:43:38 +00:00
e4fe7bc4a5
Implement the subset of the GetConstantValueAsSignedInt function that is needed, locally.
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llvm-svn: 524
2001-09-09 23:01:32 +00:00
c49f5f35db
Fix problems with freeing memory twice
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llvm-svn: 520
2001-09-09 22:26:29 +00:00
57de997eff
Fix build breakage. :(
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llvm-svn: 511
2001-09-09 19:52:23 +00:00
23fcc08d38
The header file for a translation unit should always be included first
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System headers should be last
llvm-svn: 475
2001-09-07 17:18:30 +00:00
5f72f42aee
Moved function PrintMachineInstructions here.
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llvm-svn: 392
2001-08-28 23:02:39 +00:00
1700068262
Always set isDef for operand in position resultPos.
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llvm-svn: 357
2001-08-13 16:32:45 +00:00
6dec5fe042
Changed SetMachineOpernad calls in Set3OperandsFromInstr so that the
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result position is a def (i.e., added true to the end of call) -- Ruchira
llvm-svn: 356
2001-08-13 16:26:28 +00:00
c82322c526
*** empty log message ***
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llvm-svn: 351
2001-08-07 21:01:23 +00:00
4ac2975f5a
added a default isDef arg to SetMachineOperand method - Ruchira
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llvm-svn: 350
2001-08-07 20:16:52 +00:00
ff7070bbb9
Allow machine instructions with variable numbers of arguments.
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This is used only by Phi for now.
llvm-svn: 336
2001-07-31 21:49:28 +00:00
bff682dfac
Eliminate separate enum for operand register type.
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Use union for alternative data for different operand types.
Add iterator over Value* operands in a MachineInstr.
llvm-svn: 307
2001-07-28 04:06:37 +00:00
78a307b170
Eliminated the Unique class in favor of NonCopyable and NonCopyableV
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llvm-svn: 280
2001-07-23 18:26:21 +00:00
b299068101
Eliminate lots of unnecessary #includes and forward decls
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there are probably more to kill
llvm-svn: 261
2001-07-21 23:24:48 +00:00
dd511760d9
Renamed include/llvm/Codegen to include/llvm/CodeGen
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llvm-svn: 253
2001-07-21 20:58:30 +00:00
ab9e557102
Instruction selection via pattern matching on instruction trees using BURG.
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llvm-svn: 231
2001-07-21 12:41:50 +00:00
Evan Cheng