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5 Commits

Author SHA1 Message Date
Dmitry Preobrazhensky e5147247b8 [AMDGPU][MC] Fix for Bug 28211 + LIT tests 
- corrected DS_GWS_* opcodes (see VI_Shader_Programming#16.pdf for detailed description)
  - address operand is not used
  - several opcodes have data operand
  - all opcodes have offset modifier
- DS_AND_SRC2_B32: corrected typo in mnemo
- DS_WRAP_RTN_F32 replaced with DS_WRAP_RTN_B32
- added CI/VI opcodes:
  - DS_CONDXCHG32_RTN_B64
  - DS_GWS_SEMA_RELEASE_ALL
- added VI opcodes:
  - DS_CONSUME
  - DS_APPEND
  - DS_ORDERED_COUNT

Differential Revision: https://reviews.llvm.org/D31707

llvm-svn: 299767
 2017-04-07 13:07:13 +00:00
Artem Tamazov 751985a757 [AMDGPU][mc] Fix ds_min/max[_rtn]_f32 - extra source operand removed. 
Fixes Bug 28215. Lit tests updated.

Differential Revision: https://reviews.llvm.org/D25837

llvm-svn: 284825
 2016-10-21 14:49:22 +00:00
Valery Pykhtin 902db3101b [AMDGPU] refactor DS instruction definitions. NFC. 
Differential revision: https://reviews.llvm.org/D22522

llvm-svn: 277344
 2016-08-01 14:21:30 +00:00
Valery Pykhtin 68853ab2c5 [AMDGPU] fix ds_swizzle_b32 opcode for VI (bz 28371) 
Differential Revision: http://reviews.llvm.org/D22049

llvm-svn: 274852
 2016-07-08 15:12:46 +00:00
Valery Pykhtin c4546ec0cf [AMDGPU] add VI disassembler tests. NFC. 
Autogenerated from the corresponding assembler tests with a few FIXME added (will fix soon).

Differential Revision: http://reviews.llvm.org/D18249

llvm-svn: 263729
 2016-03-17 17:56:33 +00:00