Commit Graph

423 Commits

Author SHA1 Message Date
Pavel Labath 6ec13991f5 Fix floating point register reads x86_64 linux on targets with no AVX support
Summary:
On for 64-bit targets, the correct register set to read the fxsave are is
NT_PRFPREG (only 32-bit targets need NT_PRXFPREG, presumably for historic
reasons). Reference:
<https://github.com/torvalds/linux/blob/v4.8/arch/x86/kernel/ptrace.c#L1261>.

Reviewers: tberghammer, valentinagiusti

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D27161

llvm-svn: 288038
2016-11-28 15:51:47 +00:00
Pavel Labath 3f8c78168e Merge Linux and FreeBSD arm64 register contexts
Summary:
This is a test-the-water change about possibilities of reducing duplication in
the register context definitions.

I've named the new class RegisterInfoPOSIX, as RegisterContextPOSIX was already
taken :(.  The two files were identical except for a fix by Tamas in D12636,
which was applied to the Linux version only, which fixed a discrepancy between
the definitions of fpsr and fpcr on one hand, and all other floating point
register definitions on the other.

Linux test suite still passes after this change. For freebsd, make the floating
point register behavior consistent, but I don't know whether it will be
consistently fixed, or consistently broken. By eyeballing the code, I have a
feeling that a similar fix to D12636 will be required in
RegisterContextPOSIXProcessMonitor_arm64::ReadRegister, but I can't be sure as I
have no way to test it (the assert in that function should fire upon accessing
the registers if it is wrong though).

Reviewers: emaste, clayborg

Subscribers: aemerson, rengolin, beanz, mgorny, modocache, dmikulin, lldb-commits

Differential Revision: https://reviews.llvm.org/D25947

llvm-svn: 287916
2016-11-25 10:28:09 +00:00
Mehdi Amini 665be50e37 Revert unwanted changes in lldb when updating llvm::Error()
My script updated lldb::Errors, and I failed to fix it entirely
before pushing. This restore everything in lldb as it was before
r286561.

llvm-svn: 286565
2016-11-11 05:07:57 +00:00
Mehdi Amini 41af43092c Make the Error class constructor protected
This is forcing to use Error::success(), which is in a wide majority
of cases a lot more readable.

Differential Revision: https://reviews.llvm.org/D26481

llvm-svn: 286561
2016-11-11 04:28:40 +00:00
Malcolm Parsons 771ef6d4f1 Fix Clang-tidy readability-redundant-string-cstr warnings
Reviewers: zturner, labath

Subscribers: tberghammer, danalbert, lldb-commits
    
Differential Revision: https://reviews.llvm.org/D26233

llvm-svn: 285855
2016-11-02 20:34:10 +00:00
Stephane Sezer 8004a57d79 Remove executable bit on a source file
llvm-svn: 285658
2016-11-01 00:21:57 +00:00
Pavel Labath 42eb6908e0 Don't set a software stepping breakpoint at 0 on arm or mips.
Summary:
Check whether the setting the breakpoint failed during instruction emulation. If
it did, the next pc is likely in unmapped memory, and the inferior will crash
anyway after the next instruction. Do not return an error in this case, but just
continue stepping.
Reenabled the crash during step test for android/linux.

Reviewers: labath

Subscribers: aemerson, rengolin, tberghammer, danalbert, srhines, lldb-commits

Differential Revision: https://reviews.llvm.org/D25926
Author: Jason Majors <jmajors@google.com>

llvm-svn: 285187
2016-10-26 11:13:56 +00:00
Pavel Labath 16706dcbd4 Add the new arm64 sub-register definitions to NativeRegisterContextLinux
It's quite sad that we have to edit so many files just to add a register. I am
going to investigate how to merge these definitions somehow, but for now this
should at least get arm64 linux working again.

llvm-svn: 284970
2016-10-24 12:59:20 +00:00
Omair Javaid 05ac4c445c Fix ARM/AArch64 Step-Over watchpoint issue remove provision for duplicate watchpoints
This patch fixes ARM/AArch64 watchpoint bug which was taking inferior out of control while stepping over watchpoints.
Also adds a test case that tests above problem.

Differential revision: https://reviews.llvm.org/D25057

llvm-svn: 284706
2016-10-20 09:07:26 +00:00
Nitesh Jain 47a2c55447 [LLDB][MIPS] fix Floating point register read/write for big endian
Reviewers: clayborg, labath, jaydeep

Subscribers: bhushan, slthakur, lldb-commits

Differential Revision: https://reviews.llvm.org/D24603

llvm-svn: 284003
2016-10-12 10:53:57 +00:00
Nitesh Jain a160ae8a04 [LLDB][MIPS] Fix register read/write for 32 bit big endian system
Reviewers: clayborg, labath

Subscribers: jaydeep, bhushan, mohit.bhakkad, slthakur, llvm-commits

Differential Revision: https://reviews.llvm.org/D24124

llvm-svn: 283728
2016-10-10 09:02:41 +00:00
Valentina Giusti 6f8c1f8da7 Add bound violation handling for Intel(R) Memory Protection Extensions (Intel(R) MPX)
Summary:
This patch adds support for handling the SIGSEGV signal with 'si_code ==
SEGV_BNDERR', which is thrown when a bound violation is caught by the
Intel(R) MPX technology.

Differential Revision: https://reviews.llvm.org/D25329

llvm-svn: 283474
2016-10-06 18:05:12 +00:00
Valentina Giusti 58db5bb20e Refactor NativeRegisterContextLinux_x86_64 code.
This patch refactors the way the XState type is checked and, in order to
simplify the code, it removes the usage of the 'cpuid' instruction: just checking
if the ptrace calls done throuhg ReadFPR is enough to verify both if there is
HW support and if there is kernel support. Also the XCR0 bits are enough to check if
there is both HW and kernel support for AVX and MPX.

Differential Revision: https://reviews.llvm.org/D24764

llvm-svn: 282072
2016-09-21 13:33:01 +00:00
Valentina Giusti 97e57e9b39 Use 'enum class' instead of 'enum' in NativeRegisterContextLinux_x86_x64.
Reviewers: labath, clayborg, zturner

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D24578

llvm-svn: 281528
2016-09-14 20:12:12 +00:00
Valentina Giusti 5f957b54c8 Use Intel CPU flags to determine target supported features.
Summary:
This patch uses the instruction CPUID to verify that FXSAVE, XSAVE, AVX
and MPX are supported by the target hardware. In case the HW supports XSAVE,
and at least one of the extended register sets, it further checks if the
target software has the kernel support for such features, by verifying that
their XSAVE part is correctly managed.

Differential Revision: https://reviews.llvm.org/D24559

llvm-svn: 281507
2016-09-14 17:27:48 +00:00
Valentina Giusti cda0ae46ac Fix for rL280668, Intel(R) Memory Protection Extensions (Intel(R) MPX) support.
Summary: Signed-off-by: Valentina Giusti <valentina.giusti@intel.com>

Reviewers: dvlahovski, granata.enrico, clayborg, labath

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D24255

llvm-svn: 280942
2016-09-08 14:16:45 +00:00
Kate Stone b9c1b51e45 *** This commit represents a complete reformatting of the LLDB source code
*** to conform to clang-format’s LLVM style.  This kind of mass change has
*** two obvious implications:

Firstly, merging this particular commit into a downstream fork may be a huge
effort.  Alternatively, it may be worth merging all changes up to this commit,
performing the same reformatting operation locally, and then discarding the
merge for this particular commit.  The commands used to accomplish this
reformatting were as follows (with current working directory as the root of
the repository):

    find . \( -iname "*.c" -or -iname "*.cpp" -or -iname "*.h" -or -iname "*.mm" \) -exec clang-format -i {} +
    find . -iname "*.py" -exec autopep8 --in-place --aggressive --aggressive {} + ;

The version of clang-format used was 3.9.0, and autopep8 was 1.2.4.

Secondly, “blame” style tools will generally point to this commit instead of
a meaningful prior commit.  There are alternatives available that will attempt
to look through this change and find the appropriate prior commit.  YMMV.

llvm-svn: 280751
2016-09-06 20:57:50 +00:00
Dimitar Vlahovski ee44a92df6 Revert "Intel(R) Memory Protection Extensions (Intel(R) MPX) support."
This reverts commit rL280668 because the register tests fail on i386
Linux.

I investigated a little bit what causes the failure - there are missing
registers when running 'register read -a'.
This is the output I got at the bottom:
"""
...
Memory Protection Extensions:
      bnd0 = {0x0000000000000000 0x0000000000000000}
      bnd1 = {0x0000000000000000 0x0000000000000000}
      bnd2 = {0x0000000000000000 0x0000000000000000}
      bnd3 = {0x0000000000000000 0x0000000000000000}

unknown:
2 registers were unavailable.
"""

Also looking at the packets exchanged between the client and server:
"""
...
history[308] tid=0x7338 <  19> send packet: $qRegisterInfo4a#d7
history[309] tid=0x7338 < 130> read packet:
$name:bnd0;bitsize:128;offset:1032;encoding:vector;format:vector-uint64;set:Memory
Protection Extensions;ehframe:101;dwarf:101;#48
history[310] tid=0x7338 <  19> send packet: $qRegisterInfo4b#d8
history[311] tid=0x7338 < 130> read packet:
$name:bnd1;bitsize:128;offset:1048;encoding:vector;format:vector-uint64;set:Memory
Protection Extensions;ehframe:102;dwarf:102;#52
history[312] tid=0x7338 <  19> send packet: $qRegisterInfo4c#d9
history[313] tid=0x7338 < 130> read packet:
$name:bnd2;bitsize:128;offset:1064;encoding:vector;format:vector-uint64;set:Memory
Protection Extensions;ehframe:103;dwarf:103;#53
history[314] tid=0x7338 <  19> send packet: $qRegisterInfo4d#da
history[315] tid=0x7338 < 130> read packet:
$name:bnd3;bitsize:128;offset:1080;encoding:vector;format:vector-uint64;set:Memory
Protection Extensions;ehframe:104;dwarf:104;#54
history[316] tid=0x7338 <  19> send packet: $qRegisterInfo4e#db
history[317] tid=0x7338 <  76> read packet:
$name:bndcfgu;bitsize:64;offset:1096;encoding:vector;format:vector-uint8;#99
history[318] tid=0x7338 <  19> send packet: $qRegisterInfo4f#dc
history[319] tid=0x7338 <  78> read packet:
$name:bndstatus;bitsize:64;offset:1104;encoding:vector;format:vector-uint8;#8e
...
"""

The bndcfgu and bndstatus registers don't have the 'Memory Protections
Extension' set. I looked at the code and it seems that that is set
correctly.

So I'm not sure what's the problem or where does it come from.

Also there is a second failure related to something like this in the
tests:
"""
registerSet.GetName().lower()
"""

For some reason the registerSet.GetName() returns None.

llvm-svn: 280703
2016-09-06 11:00:37 +00:00
Valentina Giusti f105abbc0d Intel(R) Memory Protection Extensions (Intel(R) MPX) support.
Summary:

The Intel(R) Memory Protection Extensions (Intel(R) MPX) associates pointers
to bounds, against which the software can check memory references to
prevent out of bound memory access.

This patch allows accessing the MPX registers:
  * bnd0-3: 128-bit registers to hold the bound values,
  * bndcfgu, bndstatus: 64-bit configuration registers,

This patch also adds read/write tests for the MPX registers in the register
command tests and adds a new subdirectory for MPX specific tests.

Signed-off-by: Valentina Giusti <valentina.giusti@intel.com>

Reviewers: labath, granata.enrico, lldb-commits, clayborg

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D24187

llvm-svn: 280668
2016-09-05 17:43:10 +00:00
Todd Fiala e77fce0a50 [NFC] Darwin llgs support from Week of Code
This code represents the Week of Code work I did on bringing up
lldb-server LLGS support for Darwin.  It does not include the
Xcode project changes needed, as we don't want to throw that switch
until more support is implemented (i.e. this change is inert, no
build systems use it yet.  I've verified on Ubuntu 16.04, macOS
Xcode and macOS cmake builds).

This change does some minimal refactoring of code that is shared
with the Linux LLGS portion, moving it from NativeProcessLinux into
NativeProcessProtocol.  That code is also used by NativeProcessDarwin.

Current state on Darwin:
* Process launching is implemented.  (Attach is not).
  Launching on devices has not yet been tested (FBS/BKS might
  need a bit of work).
* Inferior waitpid monitoring and communication of exit status
  via MainLoop callback is implemented.
* Memory read/write, breakpoints, thread register context, etc.
  are not yet implemented.  This impacts process stop/resume, as
  the initial launch suspended immediately starts the process
  up and running because it doesn't know it is supposed to remain
  stopped.
* I implemented the equivalent of MachThreadList as
  NativeThreadListDarwin, in anticipation that we might want to
  factor out common parts into NativeThreadList{Protocol} and share
  some code here.  After writing it, though, the fallout from merging
  Mach Task/Process into a single concept plus some other minor
  changes makes the whole NativeThreadListDarwin concept nothing more
  than dead weight.  I am likely going to get rid of this class and
  just manage it directly in NativeProcessDarwin, much like I did
  for NativeProcessLinux.
* There is a stub-out call for starting a STDIO thread.  That will
  go away and adopt the MainLoop pselect-based IOObject reading.

I am developing the fully-integrated changes in the following repo,
which contains the necessary Xcode bits and the glue that enables
lldb-debugserver on a macOS system:

  https://github.com/tfiala/lldb/tree/llgs-darwin

This change also breaks out a few of the lldb-server tests into
their own directory, and adds some $qHostInfo tests (not sure why
I didn't write those tests back when I initially implemented that
on the Linux side).

llvm-svn: 280604
2016-09-04 00:18:56 +00:00
Pavel Labath b9739d4090 Revert r280137 and 280139 and subsequent build fixes
The rewrite of StringExtractor::GetHexMaxU32 changes functionality in a way which makes
lldb-server crash. The crash (assert) happens when parsing the "qRegisterInfo0" packet, because
the function tries to drop_front more bytes than the packet contains. It's not clear to me
whether we should consider this a bug in the caller or the callee, but it any case, it worked
before, so I am reverting this until we can figure out what the proper interface should be.

llvm-svn: 280207
2016-08-31 08:43:37 +00:00
Pavel Labath 1e3b086749 Revert r280200 and put it a proper fix
PeekChar returns a character, we want the whole string there.

llvm-svn: 280204
2016-08-31 07:49:37 +00:00
Sylvestre Ledru 2c07a069b8 Update the Linux code to reflect the changes done by zturner in r280139
llvm-svn: 280200
2016-08-31 07:16:56 +00:00
Pavel Labath c923a3dc00 Remove SYS_tgkill from Android.h
instead, use __NR_tgkill directly, which seems to be the preferred form in the codebase anyway.

llvm-svn: 277999
2016-08-08 12:40:11 +00:00
Tamas Berghammer d7d69f8083 Support loading files even when incorrect file name specified by the linker
"Incorrect" file name seen on Android whene the main executable is
called "app_process32" (or 64) but the linker specifies the package
name (e.g. com.android.calculator2). Additionally it can be present
in case of some linker bugs.

This CL adds logic to try to fetch the correct file name from the proc
file system based on the base address sepcified by the linker in case
we are failed to load the module by name.

Differential revision: http://reviews.llvm.org/D22219

llvm-svn: 276411
2016-07-22 12:55:35 +00:00
Pavel Labath 5ad891f719 Unify process launching code on linux
Summary:
We've had two copies of code for launching processes:
- one in NativeProcessLinux, used for launching debugged processes
- one in ProcessLauncherAndroid, used on android for launching all other kinds of processes

These have over time acquired support for various launch options, but neither supported all of
them. I now replace them with a single implementation ProcessLauncherLinux, which supports all
the options the individual versions supported and set it to be used to launch all processes on
linux.

This also works around the ETXTBSY issue on android when the process is started from the platform
instance, as that used to go through the version which did not contain the workaround.

Reviewers: tberghammer

Subscribers: tberghammer, danalbert, srhines, lldb-commits

Differential Revision: https://reviews.llvm.org/D22457

llvm-svn: 276288
2016-07-21 14:54:03 +00:00
Nitesh Jain de69d40686 [LLVM][MIPS] Revert support for FRE.
Reviewers: jaydeep

Subscribers: bhushan, mohit.bhakkad, slthakur, llvm-commits
llvm-svn: 275785
2016-07-18 12:37:44 +00:00
Pavel Labath 4abe5d69ea [NPL] Simplify process launch code
Summary:
This removes one level of indirection, which was just packing and repacking launch args into
different structures. NFC.

Reviewers: tberghammer

Subscribers: lldb-commits

Differential Revision: https://reviews.llvm.org/D22357

llvm-svn: 275544
2016-07-15 10:18:15 +00:00
Pavel Labath 3be0a3a173 [NPL] Increase ETXTBSY workaround sleep
10ms does not seem to be enough all the time, go to 50.

llvm-svn: 275175
2016-07-12 15:13:11 +00:00
Tamas Berghammer c73301bbe3 Change the /proc/<pid>/maps to not assert on incorrect input
If LLDB reads some incorrect input form /proc/<pid>/maps then it
should report an error instead of assert-ing as we don't want to
crash in case of an incorrect maps file.

Differential revision: http://reviews.llvm.org/D22211

llvm-svn: 275060
2016-07-11 13:43:27 +00:00
Pavel Labath ca92aed5dc [LLGS] Work around an adb bug on Android <=M
On android M it can happen that we get a ETXTBSY, when we try to launch the inferior. Sleeping
and retrying should help us get more stable results.

llvm-svn: 274763
2016-07-07 15:46:00 +00:00
Howard Hellyer ad00756301 Implement GetMemoryRegions() for Linux and Mac OSX core files.
Summary:
This patch fills in the implementation of GetMemoryRegions() on the Linux and Mac OS core file implementations of lldb_private::Process (ProcessElfCore::GetMemoryRegions and ProcessMachCore::GetMemoryRegions.) The GetMemoryRegions API was added under: http://reviews.llvm.org/D20565

The patch re-uses the m_core_range_infos list that was recently added to implement GetMemoryRegionInfo in both ProcessElfCore and ProcessMachCore to ensure the returned regions match the regions returned by Process::GetMemoryRegionInfo(addr_t load_addr, MemoryRegionInfo &region_info).

Reviewers: clayborg

Subscribers: labath, lldb-commits

Differential Revision: http://reviews.llvm.org/D21751

llvm-svn: 274741
2016-07-07 08:21:28 +00:00
Pavel Labath 0c4f01d44b [LLGS] Log more precise errors during inferior launch
Summary:
We are seeing infrequent failures to launch the inferior process on android. The failing call
seems to be execve(). This adds more logging to see the actual error reported by the call.

Reviewers: tberghammer

Subscribers: tberghammer, lldb-commits, danalbert

Differential Revision: http://reviews.llvm.org/D22039

llvm-svn: 274624
2016-07-06 13:18:50 +00:00
Omair Javaid 62661473c2 Improve watchpoint error reporting specially for arm/aarch64 targets
Differential revision: http://reviews.llvm.org/D21164

llvm-svn: 273869
2016-06-27 12:35:41 +00:00
Omair Javaid c6dc90ef87 Allow unaligned byte/word selection watchpoints for arm- linux/android targets.
Differential revision: http://reviews.llvm.org/D21516

llvm-svn: 273863
2016-06-27 11:18:23 +00:00
Omair Javaid 43507f573d Allow installing watchpoints at less than 8-byte alligned addresses for AArch64 targets
This patch allows LLDB for AArch64 to watch all bytes, words or double words individually on non 8-byte alligned addresses.

This patch also adds tests to verify this functionality.

Differential revision: http://reviews.llvm.org/D21280

llvm-svn: 272916
2016-06-16 16:41:22 +00:00
Pavel Labath 2a86b555e1 Remove Platform usages from NativeProcessLinux
Summary:
This removes the last usage of the Platform plugin in NPL. It was being
used for determining the architecture of the debugged process. I replace
the call that went through the Platform plugin with a lower level call
on the ObjectFile directly.

Reviewers: tberghammer

Subscribers: uweigand, nitesh.jain, omjavaid, lldb-commits

Differential Revision: http://reviews.llvm.org/D21324

llvm-svn: 272686
2016-06-14 17:30:52 +00:00
Pavel Labath 57a77118ba Remove Mutex from NativeProcessLinux
NPL now assumes it is running from a single thread now, so its thread-safety is untested
anyway (and if that assumption is broken, we'll have bigger problems (due to ptrace restrictions)
than a couple of missing mutexes).

llvm-svn: 269640
2016-05-16 09:18:30 +00:00
Ulrich Weigand bb00d0b6b2 Support Linux on SystemZ as platform
This patch adds support for Linux on SystemZ:
- A new ArchSpec value of eCore_s390x_generic
- A new directory Plugins/ABI/SysV-s390x providing an ABI implementation
- Register context support
- Native Linux support including watchpoint support
- ELF core file support
- Misc. support throughout the code base (e.g. breakpoint opcodes)
- Test case updates to support the platform

This should provide complete support for debugging the SystemZ platform.
Not yet supported are optional features like transaction support (zEC12)
or SIMD vector support (z13).

There is no instruction emulation, since our ABI requires that all code
provide correct DWARF CFI at all PC locations in .eh_frame to support
unwinding (i.e. -fasynchronous-unwind-tables is on by default).

The implementation follows existing platforms in a mostly straightforward
manner.  A couple of things that are different:

- We do not use PTRACE_PEEKUSER / PTRACE_POKEUSER to access single registers,
  since some registers (access register) reside at offsets in the user area
  that are multiples of 4, but the PTRACE_PEEKUSER interface only allows
  accessing aligned 8-byte blocks in the user area.  Instead, we use a s390
  specific ptrace interface PTRACE_PEEKUSR_AREA / PTRACE_POKEUSR_AREA that
  allows accessing a whole block of the user area in one go, so in effect
  allowing to treat parts of the user area as register sets.

- SystemZ hardware does not provide any means to implement read watchpoints,
  only write watchpoints.  In fact, we can only support a *single* write
  watchpoint (but this can span a range of arbitrary size).  In LLDB this
  means we support only a single watchpoint.  I've set all test cases that
  require read watchpoints (or multiple watchpoints) to expected failure
  on the platform.  [ Note that there were two test cases that install
  a read/write watchpoint even though they nowhere rely on the "read"
  property.  I've changed those to simply use plain write watchpoints. ]

Differential Revision: http://reviews.llvm.org/D18978

llvm-svn: 266308
2016-04-14 14:28:34 +00:00
Saleem Abdulrasool dd4799c28e Process: fix the build with certain kernel versions
The structure definitions are not provided, but we perform a sizeof operation of
them which causes a build failure.  Include `asm/ptrace.h` to get the structure
definitions.

llvm-svn: 266042
2016-04-12 05:40:51 +00:00
Pavel Labath 605b51b84e Work around a stepping bug in arm64 android M
Summary:
On arm64, linux<=4.4 and Android<=M there is a bug, which prevents single-stepping from working when
the system comes back from suspend, because of incorrectly initialized CPUs. This did not really
affect Android<M, because it did not use software suspend, but it is a problem for M, which uses
suspend (doze) quite extensively.  Fortunately, it seems that the first CPU is not affected by
this bug, so this commit implements a workaround by forcing the inferior to execute on the first
cpu whenever we are doing single stepping.

While inside, I have moved the implementations of Resume() and SingleStep() to the thread class
(instead of process).

Reviewers: tberghammer, ovyalov

Subscribers: aemerson, rengolin, tberghammer, danalbert, srhines, lldb-commits

Differential Revision: http://reviews.llvm.org/D17509

llvm-svn: 261636
2016-02-23 13:56:30 +00:00
Pavel Labath 7326c01aaa [linux] Remove all traces of signalfd(2)
Summary:
Signalfd is not used in the code anymore, and given that the same functionality can be achieved
with the new MainLoop class, it's unlikely we will need it in the future. Remove all traces of
it.

Reviewers: tberghammer, ovyalov

Subscribers: tberghammer, danalbert, srhines, lldb-commits

Differential Revision: http://reviews.llvm.org/D17510

llvm-svn: 261631
2016-02-23 12:26:08 +00:00
Tamas Berghammer be379e1590 Revert "Use BKPT instead of UDF for arm/thumb breakpoints"
This reverts commit 293c18e067d663e0fe93e6f3d800c2a4bfada2b0.

The BKPT instruction generates SIGBUS instead of SIGTRAP in the Linux
kernel on Nexus 6 - 5.1.1 (kernel version 3.10.40). Revert the CL
until we can figure out how can we hanble the SIGBUS or how to get
back a SIGTRAP using the BKPT instruction.

llvm-svn: 260969
2016-02-16 15:14:36 +00:00
Tamas Berghammer 1b6dacbb86 Use BKPT instead of UDF for arm/thumb breakpoints
The UDF instruction is deprecated in armv7 and in case of thumb2
instructions set it don't work well together with the IT instruction.

Differential revision: http://reviews.llvm.org/D16853

llvm-svn: 260367
2016-02-10 10:42:00 +00:00
Eugene Zelenko c33088f41e Remove autoconf support from source directories.
Differential revision: http://reviews.llvm.org/D16662

llvm-svn: 259098
2016-01-28 22:05:24 +00:00
Tamas Berghammer 239132f452 Try to fix the mips64 build after rL257447
llvm-svn: 257469
2016-01-12 10:41:43 +00:00
Mohit K. Bhakkad 64322c0331 [LLDB][MIPS] Fix ReadRegisterValue for registers with constant 32 bit size regardless of ABI
Reviewers: clayborg, tberghammer.
Subscribers: jaydeep, bhushan, sagar, nitesh.jain, lldb-commits.
Differential Revision: http://reviews.llvm.org/D16060

llvm-svn: 257447
2016-01-12 05:55:03 +00:00
Tamas Berghammer e85e6021f0 Make the aarch64 lldb-server capable of debugging arm32 applications
Differential revision: http://reviews.llvm.org/D15533

llvm-svn: 257322
2016-01-11 10:39:09 +00:00
Omair Javaid a7d7f7cf33 Fix for undefined behavior while updating PC value on arm-linux
Differential revision: http://reviews.llvm.org/D15877

llvm-svn: 256847
2016-01-05 16:56:13 +00:00
Sagar Thakur 307a3ba3b3 [LLDB][MIPS] Make register read/write to set/get the size of register according to abi.
Summary:
For O32 abi register size should be 4 bytes.
For N32 and N64 abi register size should be 8 bytes.
This patch will make register read/write to set/get the size of register according to abi.

Reviewers: clayborg, tberghammer
Subscribers: lldb-commits, nitesh.jain, mohit.bhakkad, bhushan, jaydeep
Differential: http://reviews.llvm.org/D15884
llvm-svn: 256834
2016-01-05 14:03:45 +00:00