9f75a55329
finegrainify namespacification, fix 80col prob
...
llvm-svn: 11445
2004-02-14 06:00:36 +00:00
d6a39eaa70
Urg, right. These need an input value...
...
llvm-svn: 11443
2004-02-14 04:47:23 +00:00
2f49d5bb35
Codegen llvm.memset into rep stos[bwd]. Simplify code for llvm.memcpy
...
llvm-svn: 11442
2004-02-14 04:46:05 +00:00
8bed37595d
add 'rep stos[bwd]' instructions
...
llvm-svn: 11441
2004-02-14 04:45:37 +00:00
5a92240270
Use newly added next() and prior() utility functions.
...
llvm-svn: 11430
2004-02-14 01:18:34 +00:00
7b5f374a18
There is no need to emit a shift if the size is constant, which is common
...
llvm-svn: 11420
2004-02-13 23:36:47 +00:00
8cdd0215bf
Remove getAllocatedRegNum(). Use getReg() instead.
...
llvm-svn: 11393
2004-02-13 21:01:20 +00:00
8dc99feeaf
Add support for the rep movs[bwd] instructions, and emit them when code
...
generating the llvm.memcpy intrinsic.
llvm-svn: 11351
2004-02-12 17:53:22 +00:00
537805f315
Change interface so that we can add to the end of a basic block
...
without getting an assertion from ilist that we are dereferencing
ilist<T>::end().
llvm-svn: 11345
2004-02-12 08:11:04 +00:00
80da865f77
Change MachineBasicBlock's vector of MachineInstr pointers into an
...
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.
llvm-svn: 11340
2004-02-12 02:27:10 +00:00
0d10bf8d72
s/getOpCode/getOpcode
...
llvm-svn: 11332
2004-02-11 19:26:28 +00:00
b21ec54e61
Add #include
...
llvm-svn: 11285
2004-02-10 21:18:55 +00:00
8d0dc12c3e
Remove uses of MachineOperand::isVirtualRegister
...
llvm-svn: 11281
2004-02-10 20:55:47 +00:00
92252f42c3
Don't use MachineOperator::is(Phys|Virt)Register
...
llvm-svn: 11276
2004-02-10 20:31:28 +00:00
259e98ed27
Tighten up checks
...
llvm-svn: 11274
2004-02-10 20:25:13 +00:00
ac6db755c3
Adjust to the changed StructType interface. In particular, getElementTypes() is gone.
...
llvm-svn: 11228
2004-02-09 04:37:31 +00:00
56f9b190e1
Add a new (hidden) option that is useful for profiling.
...
llvm-svn: 11218
2004-02-09 01:47:10 +00:00
327426411e
Modify the two address instruction pass to remove the duplicate
...
operand of the instruction and thus simplify the register allocation.
llvm-svn: 11124
2004-02-04 22:17:40 +00:00
94b5c3cb91
Take away the default iostream argument of createMachineFunctionPrinterPass(),
...
at Chris's request.
llvm-svn: 11120
2004-02-04 21:41:01 +00:00
dbf4b42fde
IMULri* instructions do not require their first two registers operands
...
to be the same (IOW they are not two address instructions).
llvm-svn: 11117
2004-02-04 17:21:04 +00:00
d1b1992495
Generate ftst instructions for comparison against zero
...
llvm-svn: 11098
2004-02-03 18:54:04 +00:00
3c8c72c54f
Add the ftst instruction
...
llvm-svn: 11095
2004-02-03 07:27:50 +00:00
8161306139
Add support for one argument OneArgFP instructions
...
llvm-svn: 11094
2004-02-03 07:27:34 +00:00
63b61e8739
No need to declare implicit uses/defs of ST0
...
llvm-svn: 11081
2004-02-02 19:57:45 +00:00
30d26ac561
Generate the fchs instruction to negate a floating point number
...
llvm-svn: 11078
2004-02-02 19:31:38 +00:00
7af8ad6444
Add support for OneArgFPRW instructions, fix a couple of typeos
...
llvm-svn: 11077
2004-02-02 19:23:15 +00:00
298fdd7eb1
Codegen -0.0 correctly. Do not use fldz! This is another -0.0 == +0.0 problem, arg.
...
llvm-svn: 11070
2004-02-02 18:56:30 +00:00
aeb8a80c71
FpMOV is also a move instruction.
...
llvm-svn: 11055
2004-02-01 08:22:16 +00:00
112902772a
Add some comments sketching out how this is to work eventually.
...
llvm-svn: 11026
2004-01-30 22:25:18 +00:00
201c487ad2
Add a new flag, which is only used for symmetry.
...
llvm-svn: 11025
2004-01-30 22:24:18 +00:00
4710add9dd
Add (currently disabled) support to the instruction selector to only insert
...
FP_REG_KILL instructions at the end of blocks involved with critical edges.
Fix a bug where FP_REG_KILL instructions weren't inserted in fall through
unconditional branches. Perhaps this will fix some linscan problems?
llvm-svn: 11019
2004-01-30 22:13:44 +00:00
ac2b198ec5
Eliminate the isStringCompatible function, using ConstantArray::isString.
...
It's not clear why the code was looking for signed chars < 0, but it can't
matter to the assembler anyway, so the check goes away.
llvm-svn: 10853
2004-01-14 17:14:42 +00:00
975c8bde79
Output mov %REG = 0 instead of xor %REG, %REG, %REG to clear a
...
register so that LiveVariable analysis is not confused.
llvm-svn: 10773
2004-01-12 07:22:45 +00:00
5d236005b0
Clean up a lot of the code I added yesterday by exposing the IntrinsicLowering
...
implementation from the TargetMachine directly.
llvm-svn: 10636
2003-12-28 21:23:38 +00:00
52564b2071
Add TargetInstrInfo::isMoveInstr() to support coalescing in register
...
allocation.
llvm-svn: 10633
2003-12-28 17:35:08 +00:00
10cac58d23
Whoops, don't try to lower non intrinsic calls
...
llvm-svn: 10632
2003-12-28 09:53:23 +00:00
c45a033b42
implement support for the intrinsic lowering functionality
...
llvm-svn: 10629
2003-12-28 09:47:19 +00:00
2103574b32
Move FP_REG_KILL closer to the return instruction.
...
llvm-svn: 10567
2003-12-21 16:47:43 +00:00
27437e3318
Move FP_REG_KILL closer to the actual branch instruction.
...
llvm-svn: 10563
2003-12-20 17:28:15 +00:00
68cff6bf4d
Remove floating point killer pass. This is now implemented in the
...
instruction selector by adding a new pseudo-instruction
FP_REG_KILL. This instruction implicitly defines all x86 fp registers
and is a terminator so that passes which add machine code at the end
of basic blocks (like phi elimination) do not add instructions between
it and the branch or return instruction.
llvm-svn: 10562
2003-12-20 16:22:59 +00:00
452597611f
Finally, _actually delete the machine code_ for a function, after it has
...
been emitted. Also, since the FPK pass is causing memory access violations,
disable it.
llvm-svn: 10559
2003-12-20 10:20:19 +00:00
af4304f807
Fix memory leak in the stackifier, due to the machinebasicblocks not holding
...
instructions on an ilist
llvm-svn: 10556
2003-12-20 10:12:17 +00:00
d46cd68695
Finegrainify namespacification
...
Minor cleanups to killer pass
llvm-svn: 10555
2003-12-20 09:58:55 +00:00
ddec71c3b6
A minor cleanup for better encapsulation
...
llvm-svn: 10545
2003-12-20 02:03:14 +00:00
833c3c2597
Rip JIT specific stuff out of TargetMachine, as per PR176
...
llvm-svn: 10542
2003-12-20 01:22:19 +00:00
aaba4639f8
Change interface of MachineOperand as follows:
...
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
b) add isUse(), isDef()
c) rename opHiBits32() to isHiBits32(),
opLoBits32() to isLoBits32(),
opHiBits64() to isHiBits64(),
opLoBits64() to isLoBits64().
This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.
llvm-svn: 10461
2003-12-14 13:24:17 +00:00
fbeb3b02c3
Change preserve all claim to just preserve live variables and phielimination.
...
llvm-svn: 10460
2003-12-14 10:14:23 +00:00
904cd6d48c
Add a floating point killer pass. This pass runs before register
...
allocaton on the X86 to add information to the machine code denoting
that our floating point stackifier cannot handle virtual point
register that are alive across basic blocks. This pass adds an
implicit def of all virtual floating point register at the end of each
basic block.
llvm-svn: 10446
2003-12-13 05:36:22 +00:00
c6efb11f02
Modified cast so that it converts the int to a long before casting to
...
a pointer. This evades a warning emitted by GCC when we cast from
unsigned int (32 bit) to void * (64 bit) on SparcV9.
llvm-svn: 10435
2003-12-12 19:57:48 +00:00
2e7416cb04
Implement the TargetMachine::getJITStubForFunction method for X86, finegrainify
...
namespacification.
llvm-svn: 10430
2003-12-12 07:11:18 +00:00
6d760d7cb3
Add an option to enable the SSA based peephole optimizer.
...
Eventually this pass will provide substantially better code in the interim between when we
have a crappy isel and nice isel. Unfortunately doing so requires fixing the backend to
actually SUPPORT all of the fancy addressing modes that we now generate, and writing a DCE
pass for machine code. Each of these is a fairly substantial job, so this will remain disabled
for the immediate future. :(
llvm-svn: 10276
2003-12-01 05:18:30 +00:00
a913723309
Add a new SSA-based peephole optimizer which includes copy propagation and
...
folding of instructions into addressing modes. This creates lots of dead
instructions, which are currently not deleted. It also creates a lot of
instructions that the X86 backend currently cannot handle. :(
llvm-svn: 10275
2003-12-01 05:15:28 +00:00
128937bbe2
generalize the instruction types permitted a bit
...
llvm-svn: 10274
2003-12-01 05:13:56 +00:00
d8218923ae
Finegrainify namespacification
...
llvm-svn: 10270
2003-11-30 06:13:25 +00:00
84c0efc946
Support constant casting constant pointers to ints/uints, and/or
...
the other way around, instead of failing a large, tumor-like assertion.
llvm-svn: 10171
2003-11-22 07:18:25 +00:00
9ba9225b35
Constant shift expressions, meet InstSelectSimple. Yow!!
...
llvm-svn: 10170
2003-11-22 06:49:41 +00:00
e42b8fd298
Stub for constant shift expr support.
...
llvm-svn: 10168
2003-11-22 05:18:35 +00:00
8c09ecf0c9
Fix PR123
...
llvm-svn: 10069
2003-11-18 17:47:05 +00:00
960707c335
Put all LLVM code into the llvm namespace, as per bug 109.
...
llvm-svn: 9903
2003-11-11 22:41:34 +00:00
395aef6bbe
Hopefully fix the objdir != srcdir issue
...
llvm-svn: 9761
2003-11-07 00:34:33 +00:00
72a4db8b92
Fix warnings building on sparc
...
llvm-svn: 9758
2003-11-06 21:30:05 +00:00
e5b358c829
We know exactly what the value of $< is, so instead of using `basename $<` to
...
get just the filename and not the full path, just use the filename directly.
llvm-svn: 9730
2003-11-05 06:43:36 +00:00
9118a426d3
Change all machine basic block modifier functions in MRegisterInfo to
...
return the number of instructions added to/removed from the basic block
passed as their first argument.
Note: This is only needed because we use a std::vector instead of an
ilist to keep MachineBasicBlock instructions. Inserting an instruction
to a MachineBasicBlock invalidates all iterators to the basic
block. The return value can be used to update an index to the machine
basic block instruction vector and circumvent the iterator elimination
problem but this is really not needed if we move to a better
representation.
llvm-svn: 9704
2003-11-04 22:57:09 +00:00
47dfa641c3
Fix problems in previous changes. This fixes several regressions last night.
...
llvm-svn: 9694
2003-11-04 16:04:32 +00:00
b71c3f7430
Significantly simplify constant emission by unifying the stuff which used to build up
...
strings with the stuff that used to print to an ostream directly. We now NEVER build
up big strings, only to print them once they are formed.
llvm-svn: 9686
2003-11-03 20:19:49 +00:00
469e404370
Incorporate printSingleConstantValue into its single caller
...
llvm-svn: 9684
2003-11-03 19:44:05 +00:00
72e516f0d1
* Reformat some code
...
* Emit bools as 1/0 instead of true/false, fixing compilation of eon and
PR 83 & Jello/2003-11-03-GlobalBool.llx
llvm-svn: 9683
2003-11-03 19:33:45 +00:00
37f4a4c184
Delete unused EmitByteSwap method
...
Implement mul/div/rem constant expressions
llvm-svn: 9424
2003-10-23 17:21:43 +00:00
998cabe4ff
* Order includes according to style guide
...
* Convert tabs to spaces
* Make code fit within 80 columns
llvm-svn: 9416
2003-10-23 16:22:08 +00:00
53d8490186
Converted tabs to spaces.
...
llvm-svn: 9360
2003-10-22 03:10:26 +00:00
29265fe981
Added LLVM copyright header.
...
llvm-svn: 9321
2003-10-21 15:17:13 +00:00
4436c49787
Added LLVM copyright notice to Makefiles.
...
llvm-svn: 9312
2003-10-20 22:26:57 +00:00
482202a601
Added LLVM project notice to the top of every C++ source file.
...
Header files will be on the way.
llvm-svn: 9298
2003-10-20 19:43:21 +00:00
ca1789d3f5
Minor leftover fixups from replaceMachineCodeForFunction () change.
...
llvm-svn: 9295
2003-10-20 17:59:09 +00:00
67a5a865ae
Make replaceMachineCodeForFunction return void.
...
llvm-svn: 9288
2003-10-20 15:15:17 +00:00
6acb1bedb1
Emit x86 instructions for: A = B op C, where A and B are 16-bit registers,
...
C is a constant which can be sign-extended from 8 bits without value loss,
and op is one of: add, sub, imul, and, or, xor.
This allows the JIT to emit the one byte version of the constant instead of
the two or 4 byte version. Because these instructions are very common, this
can save a LOT of code space. For example, I sampled two benchmarks, 176.gcc
and 254.gap.
BM Old New Reduction
176.gcc 2673621 2548962 4.89%
254.gap 498261 475104 4.87%
Note that while the percentage is not spectacular, this did eliminate
124.6 _KILOBYTES_ of codespace from gcc. Not bad.
Note that this doesn't effect the llc version at all, because the assembler
already does this optimization.
llvm-svn: 9284
2003-10-20 05:53:31 +00:00
369246d855
Further cleanups and simplifications
...
llvm-svn: 9282
2003-10-20 04:48:06 +00:00
358e7c3edb
Eliminate code for pointer size and endianness emulation.
...
llvm-svn: 9281
2003-10-20 04:11:23 +00:00
42856eb1bd
The Grammar Police was here.
...
llvm-svn: 9280
2003-10-20 04:03:10 +00:00
97e1b55723
* Rename X86::IMULr16 -> X86::IMULrr16
...
* Implement R1 = R2 * C where R1 and R2 are 32 or 16 bits. This avoids an
extra copy into a register, reducing register pressure.
llvm-svn: 9278
2003-10-20 03:42:58 +00:00
bf87734fa0
* Multiplications by 2^X are turned into shifts. This factors code out of the
...
getelementptr code path for use by other code paths (like malloc and alloca).
* Optimize comparisons with zero
* Generate neg, not, inc, and dec instructions, when possible.
This gives some code size wins, which might translate into performance. We'll
see tommorow in the nightly tester.
llvm-svn: 9267
2003-10-19 21:09:10 +00:00
55a8ef0cc8
Add some new instructions. Wheee
...
llvm-svn: 9266
2003-10-19 19:25:35 +00:00
406ac8e741
.string adds an implicit zero at the end. This is not what we wanted.
...
This fixes PR#44.
llvm-svn: 9252
2003-10-19 02:51:01 +00:00
ee898b35a1
Fix bug: Jello/2003-10-18-PHINode-ConstantExpr-CondCode-Failure.llx
...
This also fixes miscompilation of 176.gcc.
llvm-svn: 9249
2003-10-19 00:26:11 +00:00
80a308c920
Add support for the new varargs intrinsics
...
llvm-svn: 9224
2003-10-18 05:56:40 +00:00
c42d7951f2
You can't just blat the address into memory, you have to blat its
...
displacement.
llvm-svn: 9210
2003-10-17 21:47:25 +00:00
1a7668a9fd
Implement replaceMachineCodeForFunction() for x86.
...
llvm-svn: 9204
2003-10-17 18:27:46 +00:00
240fc39b07
Add prototype for replaceMachineCodeForFunction().
...
llvm-svn: 9202
2003-10-17 18:27:25 +00:00
c05684ad22
Fix typo in comment.
...
llvm-svn: 9187
2003-10-16 23:45:05 +00:00
068ad84038
Add support for 'weak' linkage.
...
llvm-svn: 9171
2003-10-16 18:29:00 +00:00
f95d9b99b3
Decrease usage of use_size()
...
llvm-svn: 9135
2003-10-15 16:48:29 +00:00
fdfe370406
Output a contorted sequence of instructions to make sure that we don't access
...
off the bottom of the stack. This fixes PR#41
llvm-svn: 9114
2003-10-14 19:09:05 +00:00
97c7a8ed1a
Disable the leaf function optimization, which is apparently not legal on
...
X86/linux. :( The problem is that a signal delivered while the function
is executing could clobber the functions stack. This is a partial fix
for PR41.
llvm-svn: 9113
2003-10-14 18:52:41 +00:00
8b2bd4ed47
Fix spelling.
...
llvm-svn: 9027
2003-10-10 17:57:28 +00:00
4547ab19b0
Add # of printed instructions statistic to both the SPARC and X86 LLC backends.
...
llvm-svn: 8892
2003-10-06 15:41:21 +00:00
37225efa97
Instead of hacking in custom support for Invoke/Unwind, use the LowerInvoke pass
...
llvm-svn: 8871
2003-10-05 19:15:47 +00:00
5facafaabe
Moved enum and command-line option in separate file. Also added function that returns the user selected register allocator to the caller.
...
llvm-svn: 8819
2003-10-02 16:57:49 +00:00
8207a2c079
Change llc command line for register allocators
...
llvm-svn: 8815
2003-10-02 06:13:19 +00:00
3dfcbf1317
Revert previous change. For some reason this went into the main branch
...
llvm-svn: 8805
2003-10-01 19:40:13 +00:00
568e4386e8
Added command line option for linear scan allocator
...
llvm-svn: 8804
2003-10-01 19:38:10 +00:00
632cccf646
Be a little more specific about what is begin generated. Only print
...
command line if VERBOSE=1
llvm-svn: 8453
2003-09-10 19:52:54 +00:00
59068a0d71
Only emit inter-field-padding if the amount of padding is != 0
...
llvm-svn: 8452
2003-09-10 19:52:24 +00:00
ded9899d2d
Updated to find source files using VPATH. This makes writing build rules
...
much cleaner and easier.
Labeled .td as a suffix for tblgen files in Makefile.rules.
Modified build rules so that source files generated during the build are placed
in the build directory and not the source directory (and not in a Debug
directory). This makes the system cleaner and allows us to have a read-only
source tree.
llvm-svn: 8424
2003-09-09 20:57:03 +00:00
230cffbeb3
* Simplify printConstantValueOnly by moving the tail padding stuff directly
...
into the struct case.
* Extend printConstantValueOnly to print .zero's if the initializer is zero
* Delete dead isConstantFunctionPointerRef function
* Emit the appropriate assembly for the various linkage types!
llvm-svn: 8417
2003-09-09 16:23:36 +00:00
04ecefe232
Eliminate support for the llvm.unwind intrinisic, using the Unwind instruction instead
...
llvm-svn: 8411
2003-09-08 19:44:26 +00:00
9c58cf6d03
Add support for the unwind instruction
...
llvm-svn: 8408
2003-09-08 18:54:55 +00:00
0d1a26ddc2
Checkin of autoconf-style object root.
...
Adjusted Makefile to work with new autoconf-style object root.
Specifically, use the new -I option of tblgen to find include files.
llvm-svn: 8379
2003-09-06 14:50:22 +00:00
d189277f32
OptInfo is no longer required
...
llvm-svn: 8312
2003-09-01 20:41:07 +00:00
147b66cd2b
Add support for the llvm.unwind intrinsic, which we codegen to just do an abort
...
until we implement unwinding.
Add support for the invoke instruction, which codegens just like a call with
a branch after it.
The end effect of this change is that programs using the invoke instruction,
but never unwinding, will work fine. Programs that unwind will abort until
we get unwind support.
llvm-svn: 8187
2003-08-28 21:23:43 +00:00
4fd144acc8
Targets should configure themselves based on a Module, not some wierd flags
...
llvm-svn: 8132
2003-08-24 19:49:48 +00:00
2a3b4e5bc7
Implement: Jello/test-constantexpr.ll
...
llvm-svn: 8127
2003-08-24 19:19:47 +00:00
43450cb075
Change all #include'd files to be :: rules instead of : rules
...
llvm-svn: 8019
2003-08-21 20:37:17 +00:00
a592cac43c
Add support for the sig(set|long)jmp intrinsics
...
llvm-svn: 7951
2003-08-18 16:06:09 +00:00
7eb05a170a
Spell `necessary' correctly.
...
llvm-svn: 7944
2003-08-18 14:43:39 +00:00
4b422520ca
Fix ABI issue: Longs really do need to be only 4 byte aligned on X86.
...
This bug caused miscompilation of programs using 'struct stat', but only if
compiled with support for 64-bit filesystems. This could in theory effect
other things, but only if the LLVM code shared data structures with native code.
llvm-svn: 7928
2003-08-17 23:20:40 +00:00
3830ba4cd8
Adjust to new API, add expandCall stub
...
llvm-svn: 7873
2003-08-15 04:51:59 +00:00
7235d86507
Add support for unconditional branches and for emitting JE instructions
...
llvm-svn: 7872
2003-08-15 04:50:49 +00:00
ed474bb329
X86 static backend: smacked
...
Function at a time: smacked
Who you gonna call!!! :-)
llvm-svn: 7826
2003-08-13 19:02:09 +00:00
89207943a1
Factory methods for FunctionPasses now return type FunctionPass *.
...
llvm-svn: 7823
2003-08-13 18:18:15 +00:00
845b5af4d4
addPassesToJITCompile and addPassesToEmitMachineCode now take a
...
FunctionPassManager, to support function-at-a-time compilation and
emission of code.
llvm-svn: 7821
2003-08-13 18:17:27 +00:00
02cbe2824c
addPassesToJITCompile now takes a FunctionPassManager, to support
...
function-at-a-time compilation and emission of code.
Separate addPassesToEmitAssembly from addPassesToJITCompile, because
the latter requires you to use FunctionPasses, and the former might
diverge anyway.
llvm-svn: 7817
2003-08-13 18:15:52 +00:00
1a6f2b83ab
Factory methods for FunctionPasses now return type FunctionPass *.
...
Correct one of the functions' comments.
llvm-svn: 7816
2003-08-13 18:15:29 +00:00
1600c4a70c
Factory methods for FunctionPasses now return type FunctionPass *.
...
Revert (to v1.55) one of the hunks of Chris's change that messed up the
%-register workaround.
llvm-svn: 7815
2003-08-13 18:15:15 +00:00
dd306efa11
Just incorporating some notes I wrote for myself into a place where they won't
...
get lost...
llvm-svn: 7798
2003-08-13 00:30:48 +00:00
7606fa0d41
Add basic support for 16 and 32 bit function arguments!
...
llvm-svn: 7755
2003-08-11 21:30:00 +00:00
1a2e6f7917
Sort #includes, eliminate #include of "llvm/Type.h" which was redundant
...
llvm-svn: 7746
2003-08-11 20:06:16 +00:00
262c832aea
Cygwin apparently works with %'s on registers!
...
llvm-svn: 7745
2003-08-11 20:04:57 +00:00
1ae8eb0021
Whoops, accidental checkin. :(
...
llvm-svn: 7743
2003-08-11 19:35:46 +00:00
9a59f58d90
Add a new -enable-cygwin-compatible-output argument, which make the output more
...
consumably by the cygwin assembler. This is really just a nasty hack until we
get real target triple support.
llvm-svn: 7742
2003-08-11 19:35:26 +00:00
12b32533cc
Print % signs before register names; turn off "noprefix" mode in gas output.
...
Fixes test case test/Programs/LLVMSource/2003-08-03-ReservedWordGlobal.ll.
Also: Refactor implicit-uses printing into its own method.
Remove a couple of unused variables.
llvm-svn: 7737
2003-08-11 19:05:46 +00:00
2923637f63
Add (ret int) expander so that we can at least write testcases
...
llvm-svn: 7730
2003-08-11 15:48:00 +00:00
1117639691
Converted tabs to spaces.
...
llvm-svn: 7728
2003-08-11 15:38:50 +00:00
1024b0ef59
Removed `-debug' so that spurious printouts of patterns are not seen at
...
compilation time.
llvm-svn: 7727
2003-08-11 15:30:20 +00:00
7fed97d00a
Add patterns for multiply, and, or, and xor
...
llvm-svn: 7725
2003-08-11 15:23:25 +00:00
e5b80dfdf1
Until the pattern matching instruction selector is finished, enable debug output from it
...
llvm-svn: 7722
2003-08-11 15:11:01 +00:00
e61db425e8
Add support for a pattern matching instruction selector. This is still in
...
the early implementation phases, so it is disabled by default
llvm-svn: 7719
2003-08-11 14:59:22 +00:00
8706805dae
This register is never used, disable it.
...
llvm-svn: 7661
2003-08-07 04:49:16 +00:00
fb2054c40b
Completely eliminate the isVoid TSFlag, shifting over all other fields
...
llvm-svn: 7636
2003-08-06 15:32:20 +00:00
19d25b3c41
add a pattern for RET, immediates no longer need to be explicitly typed
...
llvm-svn: 7635
2003-08-06 15:31:35 +00:00
1d6ba3e359
Factor shared code
...
llvm-svn: 7600
2003-08-05 16:34:44 +00:00
7c257321c7
This is the real fix for the previous register allocator problem.
...
Physical registers should not float around.
llvm-svn: 7587
2003-08-05 00:48:47 +00:00
148747e162
Add patterns for (mov R, R) (mov R, I) and subtracts. The moves are to enable
...
testing, the subtracts are because I was in the neighborhood.
llvm-svn: 7581
2003-08-04 21:18:19 +00:00
44cdcf013f
Change comments into something that TableGen can read!
...
llvm-svn: 7580
2003-08-04 21:08:29 +00:00
6aa90493a3
Rename register classes to be upper case to make it obvious that they are X86
...
specific in the tree patterns
llvm-svn: 7578
2003-08-04 20:58:29 +00:00
22c550e442
There is nothing special about noops anymore
...
llvm-svn: 7568
2003-08-04 05:11:37 +00:00
2551080937
transition to using let instead of set
...
llvm-svn: 7564
2003-08-04 04:59:56 +00:00
796684b8c7
Fix Bug: test/Regression/Jello/2003-08-03-CallArgLiveRanges.llx
...
llvm-svn: 7558
2003-08-04 02:12:48 +00:00
fdd6784e1d
Simplify some constant expressions
...
llvm-svn: 7556
2003-08-04 01:04:59 +00:00
876353b107
Remove illegal, unsupported escapes. This fixes program: Ptrdist-bc
...
llvm-svn: 7552
2003-08-03 23:42:17 +00:00
5dcb654662
* Sort #includes, remove dupliates
...
* Use .zero to emit padding between struct elements
* Emit .comm symbols when we can, this dramatically reduces the amount of gunk we have to print
* Print global variable identifiers next to initializer more nicely.
llvm-svn: 7551
2003-08-03 23:37:09 +00:00
0b2c347eac
Specify custom name for registers to get the ()'s in the name.
...
llvm-svn: 7547
2003-08-03 22:12:47 +00:00
bb8bdc04a7
Start using tablegen'd instruction enum list
...
llvm-svn: 7542
2003-08-03 21:57:05 +00:00
637eebbfc1
Resort tables
...
llvm-svn: 7541
2003-08-03 21:56:36 +00:00
df14300577
Lump the base opcode in with the X86 TargetSpecific flags
...
llvm-svn: 7540
2003-08-03 21:56:22 +00:00
05e2f385a7
* Start using tablegen'd instruction descriptions
...
* Fix bug in the createNOP method, which was not marking the operands of the
generated XCHG as useanddef. I don't think this method is actually used,
so it wasn't breaking anything, but it should be fixed anyway...
llvm-svn: 7539
2003-08-03 21:55:55 +00:00
553f6c1e1d
Start using tablegenerated instruction descriptions
...
llvm-svn: 7538
2003-08-03 21:54:59 +00:00
59a4a91703
Add new TableGen instruction definitions
...
llvm-svn: 7537
2003-08-03 21:54:21 +00:00
1d4d4f0d8b
Remove the old .def file, it is now obsolete
...
llvm-svn: 7536
2003-08-03 21:54:06 +00:00
3663901941
Set debug types
...
llvm-svn: 7532
2003-08-03 21:14:38 +00:00
a8c3cff30f
Add Target class for X86 target
...
llvm-svn: 7523
2003-08-03 18:19:37 +00:00
aad0d9c6ef
The RegisterInfo class is obsolete
...
llvm-svn: 7522
2003-08-03 18:18:48 +00:00
e1453c3afc
Tell CVS to ignore all .inc files
...
llvm-svn: 7513
2003-08-03 15:50:17 +00:00
8b31688bb1
Switch over to tablegen generated header files
...
llvm-svn: 7512
2003-08-03 15:48:55 +00:00
a4741a94ff
Switch over to TableGen generated register file description
...
llvm-svn: 7511
2003-08-03 15:48:14 +00:00
5da8e80c46
Initial checkin of X86.td file
...
llvm-svn: 7510
2003-08-03 15:47:49 +00:00
731953bc5c
Initial checkin of X86 Register File description
...
llvm-svn: 7509
2003-08-03 15:47:25 +00:00
b6bcc0689c
Fix typeos in comments
...
llvm-svn: 7505
2003-08-03 13:50:14 +00:00
1007f033d4
Move DEBUG to Debug.h
...
llvm-svn: 7497
2003-08-01 22:21:34 +00:00
238dadc37c
This method is long dead
...
llvm-svn: 7460
2003-08-01 03:48:42 +00:00
a0e679e299
Remove more obsolete comments
...
llvm-svn: 7455
2003-07-31 17:56:05 +00:00
d02051b512
Changed pointer to the JIT code to its current location, under LLI.
...
llvm-svn: 7454
2003-07-31 17:50:35 +00:00
a2d9f40693
I think local symbols in X86 GAS have to start with .L, not just
...
.; so I have changed the basic block markers to start with .L. I also
broke up a >80char line.
llvm-svn: 7452
2003-07-31 17:38:52 +00:00
ea6aac412d
Use target specific interface instead of forcing it to be target-generic
...
llvm-svn: 7413
2003-07-30 05:33:48 +00:00
bbc8db5266
Move "register flags" definition the type of registers to be fully fledged
...
value types
llvm-svn: 7377
2003-07-29 05:14:16 +00:00
a2e2f5cc45
Rename function to be more consistent with filename
...
llvm-svn: 7352
2003-07-26 23:49:58 +00:00
e1b4e68396
We don't modify the LLVM rep, remain const correct
...
llvm-svn: 7345
2003-07-26 23:06:00 +00:00
ba21b33499
If the pass changes _anything_ it must return true
...
llvm-svn: 7344
2003-07-26 23:05:37 +00:00
46f8b71376
Use unified CWriter-X86/Printer name mangler. Do not bother using
...
SlotCalculator in CWriter. (Unfortunately, all this means a lot of
X86/Printer's methods have to be de-constified again. Oh well.)
llvm-svn: 7299
2003-07-24 20:20:44 +00:00
0054c3b5b3
It doesn't appear that we need to #include these.
...
llvm-svn: 7291
2003-07-24 17:48:53 +00:00
391f69b0ff
Constify most methods. We could have constified doInitialization and
...
doFinalization too except that would have made them shadow, not override,
the parent class :-P.
Allow *any* constant cast expression between pointers and longs,
or vice-versa, or any widening (not just same-size) conversion that
isLosslesslyConvertibleTo approves. This fixes oopack.
llvm-svn: 7288
2003-07-24 17:30:45 +00:00
a92dce471b
Printer.cpp: Ditch addRequired/getAnalysis, because they leave
...
Printer::doFinalization() out in the cold. Now we pass in a TargetMachine
to Printer's constructor and get the TargetData from the TargetMachine.
Don't pass TargetMachine or MRegisterInfo objects around in the Printer.
Constify TargetData references.
X86.h: Update comment and prototype of createX86CodePrinterPass().
X86TargetMachine.cpp: Update callers of createX86CodePrinterPass().
llvm-svn: 7275
2003-07-23 20:25:08 +00:00
c3998cb090
Add, rewrite, and/or reformat many comments.
...
Stop passing ostreams around: we already have one perfectly good ostream
and we can all share it.
Stop stashing a pointer to TargetData in the Pass object, because that will
lead to a crash if there are no functions in the module (ouch!) Instead,
use addRequired() and getAnalysis(), like we always should have done.
Move the check for ConstantExpr up before the check for isPrimitiveType,
because we need to be able to catch e.g. ubyte (cast bool false to ubyte),
whose type is primitive but which is nevertheless a ConstantExpr, by calling
our specialized handler instead of the AsmWriter. This would result in
assembler errors when we would try to output something like ".byte (cast
bool false to ubyte)".
GC some unused variable declarations.
llvm-svn: 7265
2003-07-23 18:37:06 +00:00
6077c3195f
Simplify code by using ConstantInt::getRawValue instead of checking to see
...
whether the constant is signed or unsigned, then casting
llvm-svn: 7252
2003-07-23 15:22:26 +00:00
26bb3c1df6
Please, save your applause^H^H^H^H^H^H^H^Hflames for the end...
...
Avoid a fall-through in the (stubby) treatment of the longjmp intrinsic
call which causes llc & lli to core-dump.
Add a sort-of treatment of cast double to ulong. I am not really sure
what a user should expect to see upon casting a negative FP value to
unsigned long long. But with what is given here, I was able to write
a program that could cast -123.456 to ulong and back and get -123.0,
which seems like a step in the right direction. GCC seems to give you
0. I don't know if I'd consider that useful.
These cases were coming up in GNU coreutils-5.0.
llvm-svn: 7205
2003-07-18 20:23:43 +00:00
ac7c5a5241
Use getClassB for load and store; we don't want to abort when we
...
try to load or store through a bool*.
llvm-svn: 7195
2003-07-17 21:30:06 +00:00
b99d684839
If we have a constant pointer reference to a function, we were printing
...
out the entire llvm disassembly for the function at global constant-output
time, which caused the assembler to barf in 164.gzip. This fixes that
particular problem (though 164.gzip has other problems with X86 llc.)
llvm-svn: 7168
2003-07-11 21:57:01 +00:00
5b04987a4c
Fix some serious floating-point bugs (fixes test cases such as Oscar,
...
Fhourstones, McCat-vor, and many others...)
Printer.cpp: Print implicit uses for AddRegFrm instructions. Break gas
bug workarounds up into separate stanzas of code for each bug. Add new
workarounds for fild and fistp.
X86InstrInfo.def: Add O_ST0 implicit uses for more FP instrs where they
obviously apply. Also add PrintImplUses flags for FP instrs where they
are necessary for gas to understand the output.
llvm-svn: 7165
2003-07-11 18:18:35 +00:00
c48e3fdffd
Insert workaround for GAS bug in assembling FLD/FSTP XWORD PTR [...]
...
instructions, by outputting them as bytes.
llvm-svn: 7115
2003-07-07 18:34:20 +00:00
3ef61afb76
Merged in autoconf branch. This provides configuration via the autoconf
...
system.
llvm-svn: 7014
2003-06-30 21:59:07 +00:00
53426e6526
Setjmp should always return zero if we don't implement longjmp. This avoids
...
leaving trash in the register, fixing anagram
llvm-svn: 7013
2003-06-30 19:35:54 +00:00
7ac937e011
Until there is a setjmp/longjmp transformation pass, codegen setjmp as a noop
...
and longjmp as an abort!
llvm-svn: 6977
2003-06-29 16:42:32 +00:00
c1e4ee0f50
Nice tasty llc fixes. These should fix LLC for x86 for everything in
...
SingleSource except oopack and Oscar. (Sorry, Oscar.)
include/llvm/Target/TargetInstrInfo.h: Remove virtual print method. Add
accessors for ImplicitUses/Defs.
lib/Target/TargetInstrInfo.cpp: Remove virtual print method. If you
really wanted this, just use MI->print(O, TM); instead...
lib/Target/X86:
FloatingPoint.cpp: ...like this.
X86InstrInfo.h: Remove virtual print method. Define the PrintImplUses
target-specific flag bit.
X86InstrInfo.def: Add the PrintImplUses flag to all the instructions
which implicitly use CL, because the assembler needs to see the CL in
order to generate the right instruction.
Printer.cpp: Ditch fnIndex at Chris's request. Now we use CurrentFnName
to name constants in the constant pool for each function instead. This
avoids keeping state between runOnMachineFunction() invocations, which
is a no-no. Having MangledGlobals be global is a bogon I'd like to get
rid of too, but making it a static member of Printer causes link errors
(why???).
Make NumberForBB into a member of Printer instead of a global, too.
Make printOp and printMemReference into methods of Printer.
X86InstrInfo::print is now Printer::printMachineInstruction, because
TargetInstrInfo::print is history. (Because of this, we have to qualify
the names of some TargetInstrInfo methods we call.)
Print out the ImplicitUses field of any instruction we print that has
the PrintImplUses bit set.
llvm-svn: 6924
2003-06-27 00:00:48 +00:00
4ab222142f
Number constants from constant pool as CPIf_i where f is the function index
...
and i is the constant pool index.
llvm-svn: 6920
2003-06-26 18:02:30 +00:00
dda8abec9b
Integrate the C writer's name mangler.
...
llvm-svn: 6908
2003-06-25 22:00:39 +00:00
25e766aca5
First draft of X86 LLC backend. This should be OK for small programs like
...
Shootout, but it has some issues with bigger programs. Work in progress.
llvm-svn: 6907
2003-06-25 18:01:07 +00:00
53b843fc04
Do not use the inefficient, fixed function, CBW, CDQ, ... instructions
...
llvm-svn: 6844
2003-06-22 03:31:18 +00:00
6e1ec2394f
Minor simplification to 64-bit instsel
...
llvm-svn: 6831
2003-06-21 18:15:27 +00:00
22f54501be
For 16 and 32-bit multiplies, use the IMUL instruction instead of the MUL instruction.
...
This allows us to not force the use of the EAX/AX registers!
llvm-svn: 6830
2003-06-21 17:16:58 +00:00
2a67e0cf02
Add IMULr16 & IMULr32 instructions
...
llvm-svn: 6829
2003-06-21 17:13:35 +00:00
df1230ecf2
Generate code for LONG indexes to getelementptr instructions more efficiently
...
llvm-svn: 6828
2003-06-21 16:01:24 +00:00
272c8871d7
Fix output bug: Intel asm comment character is #, not ;.
...
llvm-svn: 6792
2003-06-19 19:58:32 +00:00
2181d1f1a2
RECAPITALIZE all the names of pseudo-instructions, and add a comment explaining
...
the convention.
:-)
llvm-svn: 6791
2003-06-19 19:41:13 +00:00
f6de19a095
Rename many instructions to their Intel asm-compatible names. This
...
involves removing the [bwl] suffixes from instruction names, as well
as some other distinguishing marks (32/64/80 on fp insns, _i suffixes, etc.)
Lowercase all instr. names as well for consistency's sake.
llvm-svn: 6790
2003-06-19 19:34:44 +00:00
259fdbc230
Add Initialization and Finalization methods for the Printer pass,
...
to print various things on a module-by-module basis (currently, only the
former is used).
Don't print < > around names. The assembler can't take it.
Print pseudoinstructions only as comments. The poor little assembler can't
take that, either.
llvm-svn: 6789
2003-06-19 19:32:32 +00:00
ac94bab876
lib/Target/X86/X86TargetMachine.{cpp,h}: Add initial version
...
(non-working) of llc guts for X86, and add a prototype for it.
llvm-svn: 6779
2003-06-18 21:43:21 +00:00
7a719ed20c
Isolate machine-dependent use of <alloca.h> in "Support/Alloca.h",
...
so that we can easily change its use to be conditional on the result of
an autoconf test later.
llvm-svn: 6723
2003-06-16 21:54:01 +00:00
11ecb1d8ca
Fix warnings on Sparc
...
llvm-svn: 6658
2003-06-06 18:25:33 +00:00
65d29b87e3
Add statistic for # machine instrs emitted
...
Add GROSS HACK to get CompilationCallback to work when compiled in release mode
llvm-svn: 6646
2003-06-06 04:00:05 +00:00
f6db070e65
Implement generation of cmp R, C to not use an extra register
...
llvm-svn: 6627
2003-06-05 19:30:30 +00:00
06250116a8
Special case simple binary operator X op C
...
This avoid generating a register to hold C, which in turn speeds up the
register allocator by a lot: ~9% on 164.gzip and ~17% on 256.bzip2. This
also speeds up other passes. This also speeds up execution of the program
marginally, and makes the asm much easier to read. :)
llvm-svn: 6626
2003-06-05 18:28:55 +00:00
1b84b0b928
Add instructions for (add|sub|and|or|xor)ri(8|16|32)
...
llvm-svn: 6625
2003-06-05 18:25:08 +00:00
fd2a8f5868
Remove usage of typedef
...
llvm-svn: 6583
2003-06-03 15:41:58 +00:00
0addbab5e2
Add namespace comments for doxygen
...
llvm-svn: 6581
2003-06-03 15:31:23 +00:00
f9162dc713
Eliminated a compiler warning due to casting to a different-sized datatype.
...
llvm-svn: 6531
2003-06-02 04:13:58 +00:00
29848417f3
Renamed MachineCodeEmitter.cpp -> X86CodeEmitter.cpp as it conflicts with the
...
target-independent lib/CodeGen/MachineCodeEmitter.cpp; preserved CVS history.
llvm-svn: 6528
2003-06-02 03:28:00 +00:00
3bb2a00849
Move X86 specific code out of the JIT into the X86 backend
...
llvm-svn: 6516
2003-06-01 23:23:50 +00:00
4536fcd57b
* Implement cast (long|ulong) to bool
...
* Fix cast of (short|ushort|int|uint) to bool to work right
llvm-svn: 6510
2003-06-01 03:38:24 +00:00
bf37f7de1b
Add RR forms of test instruction
...
llvm-svn: 6509
2003-06-01 03:37:46 +00:00
372086c87b
Add support for shl and shr for 64 bit integer types
...
llvm-svn: 6499
2003-06-01 01:56:54 +00:00
ea447da8a8
Add definitions for TEST instructions
...
llvm-svn: 6498
2003-06-01 01:56:39 +00:00
70f158330c
Add new cmovne32 instruction
...
llvm-svn: 6496
2003-06-01 00:05:15 +00:00
631006ba48
Renamed opIsDef to opIsDefOnly.
...
llvm-svn: 6340
2003-05-27 00:03:17 +00:00
e2402c65d0
Reword to remove reference to how things worked in the past.
...
llvm-svn: 6323
2003-05-24 01:08:43 +00:00
d21a02ad58
Implement the TargetInstrInfo's createNOPinstr() and isNOPinstr() interface.
...
llvm-svn: 6320
2003-05-24 00:09:50 +00:00
9c105cd27f
Clean up #includes
...
llvm-svn: 6173
2003-05-13 20:21:19 +00:00
3fa7b77ddf
Make abort more explicit
...
llvm-svn: 6151
2003-05-12 21:16:26 +00:00
d4e5409f35
Remove the assertion failure of course... doh
...
llvm-svn: 6150
2003-05-12 20:39:39 +00:00
5069283493
Implement casts from unsigned integers to floating point
...
llvm-svn: 6148
2003-05-12 20:36:13 +00:00
6c906adb73
Make error messages more useful than jsut an abort
...
llvm-svn: 6146
2003-05-12 20:16:58 +00:00
786bd8849a
Do not insert multiple initializations for the same value in a PHI node
...
llvm-svn: 6113
2003-05-12 14:22:21 +00:00
74b65ee219
This blank line has GOT to go.
...
llvm-svn: 6057
2003-05-09 03:28:13 +00:00
93c8eddd75
Add support for Add, Sub, And, Or, & Xor constant exprs
...
llvm-svn: 6049
2003-05-08 20:49:25 +00:00
b257aab658
Add support for variable argument functions!
...
llvm-svn: 6046
2003-05-08 19:44:13 +00:00
d964c3b9fd
IMPLICIT_DEF was not the beautiful elegant solution I thought it was going
...
to be. In fact, it made stuff worse. :(
llvm-svn: 6013
2003-05-07 19:21:28 +00:00
37ffac92d5
Emit pseudo instructions to indicate that some registers are live on entrance
...
and exit of the function. This fixes bug: Jello/2003-05-06-LivenessClobber.llx
and the Fhourstones benchmark
llvm-svn: 6010
2003-05-06 21:32:22 +00:00
4b1e02df8f
Don't have a cow with new pseudo instructions
...
llvm-svn: 6009
2003-05-06 21:31:47 +00:00
8788d6e122
Add two new pseudo instructions
...
llvm-svn: 6008
2003-05-06 21:31:31 +00:00
effa5ba1ac
The Hyphenation-Adding Committee is now in session.
...
llvm-svn: 5986
2003-05-03 02:18:17 +00:00
4f6cdbdf81
Remove two fields from TargetData which are target specific.
...
llvm-svn: 5963
2003-04-26 20:11:09 +00:00
2a2338f1ba
Fix bogus assert
...
llvm-svn: 5949
2003-04-25 21:58:54 +00:00
afdf01ef62
Fix compatibility bug: X86 aligns doubles to 4 bytes, not 8!
...
llvm-svn: 5935
2003-04-25 06:05:57 +00:00
ec6f16eae6
Fix iterator invalidation problem with cast instructions
...
llvm-svn: 5876
2003-04-23 17:57:48 +00:00
2670371c9a
Implement the constantexpr CAST instruction correctly
...
llvm-svn: 5875
2003-04-23 17:22:12 +00:00
524608ab79
Add support for the Switch instruction by running the lowerSwitch pass first
...
llvm-svn: 5867
2003-04-23 16:24:55 +00:00
dd4745241f
It's "necessary"...
...
llvm-svn: 5848
2003-04-22 20:20:11 +00:00
e569e992d8
It's "necessary" to spell "necessarily" correctly.
...
llvm-svn: 5833
2003-04-22 17:54:23 +00:00
5b348718df
Add support for a simple constantexpr: cast of one ptr type to another
...
llvm-svn: 5829
2003-04-21 21:33:44 +00:00
30f40d94cc
Rename -no-* to -disable-*
...
llvm-svn: 5642
2003-02-26 20:00:41 +00:00
76e9f774dd
Don't emit unneccesary branch instructions!
...
llvm-svn: 5328
2003-01-16 18:07:23 +00:00
4769c1bef8
Fix problem with invalidated iterator
...
llvm-svn: 5327
2003-01-16 18:07:13 +00:00
2f983fcce3
Implement optimization folding setcc into branch.
...
llvm-svn: 5324
2003-01-16 16:43:00 +00:00
8c59d64041
Add more flavors of branch instructions
...
llvm-svn: 5323
2003-01-16 16:42:45 +00:00
b2809dc6b5
Implement code to keep the stack pointer aligned to an 8 byte boundary.
...
This improves the performance of the power benchmark by a few percent.
This will be neccesary for SSE code, which requires 16 byte alignment of
the stack.
llvm-svn: 5320
2003-01-16 02:20:12 +00:00
9e75444c8b
Handle frame offset due to return address pushed on the stack
...
llvm-svn: 5319
2003-01-15 22:57:35 +00:00
33be2a23ee
X86 backend should never use addMReg
...
llvm-svn: 5288
2003-01-15 00:04:14 +00:00
b4d58d7f9e
Rename MachineInstrInfo -> TargetInstrInfo
...
llvm-svn: 5272
2003-01-14 22:00:31 +00:00
cf53bcf8e4
New files
...
llvm-svn: 5260
2003-01-13 01:01:59 +00:00
962d5befb3
* No longer need lowerallocation pass
...
* Add X86 Stackifier pass
* Add peephole optimizer pass
llvm-svn: 5233
2003-01-13 00:51:23 +00:00
c39dc9e648
rename FP -> fp*
...
llvm-svn: 5232
2003-01-13 00:50:46 +00:00
06e07162fc
* Move frame and constant pool indexes to first argument of memory reference
...
so we can put an offset in there as well...
* Fix long/ulong stuff
llvm-svn: 5231
2003-01-13 00:50:33 +00:00
9fe3518dc0
* Some instructions take 64 bit integers, add an Arg type for it
...
* Add flags for different types of FP pseudo instrs
llvm-svn: 5230
2003-01-13 00:49:24 +00:00
5cc425a8e1
* Function calls clobber fp registers
...
* Use new M_TERMINATOR_FLAG flag
* Add ::Void flag on several instructions so def-use info is correct!
* Implement MANY FP instructions
* Finalize pseudo FP instructions
* Add set of Pseudo FP instruction description flags
* Add support for MOVim instrs
* Add support for 64 bit support instrs, like adc sbb, etc
* Add conditional move
llvm-svn: 5229
2003-01-13 00:48:46 +00:00
7878563ff9
Add support for frame and constant pool references
...
llvm-svn: 5228
2003-01-13 00:45:53 +00:00
61e1195e89
Move passes out to Passes.h
...
llvm-svn: 5227
2003-01-13 00:45:29 +00:00
888a8084b6
Add speculation
...
llvm-svn: 5226
2003-01-13 00:35:08 +00:00
956e8379f9
* Implement rudimentary output of the constant pool
...
* Implement support for MRMS?m instructions
* Add Arg64 support
* Add support for frame indexes and constant pool indexes
*
llvm-svn: 5225
2003-01-13 00:35:03 +00:00
d4ba62218e
* Add support for FP registers ST*
...
* Add support for the constant pool & constant pool indices
* Add support for MRMS?m instructions
* Fix FP Prefix emission
* Add support for global addresses and external symbols
llvm-svn: 5224
2003-01-13 00:33:59 +00:00
6c0daf795a
* Adjust to use new interfaces, eliminating CurReg stuff
...
* Support arbitrary FP constants
* Fix bugs in frame layout for function calls and incoming arguments
* Insert copies for constant arguments to PHI nodes into the BOTTOM of
predecessor blocks, not the top.
* Implement _floating point_ support: setcc, return, load, store, cast
* Fix several bugs in the cast instruction
* Abstract out call emission and load/store for FP
* Implement malloc/free without previous lowering pass.
* Make use of new forms of MachineOperand
* Implement _long_ support!
* Fix many bugs in FP support
* Change branch from je/jne to je/jmp
* Simplify code generated for GEP instructions
llvm-svn: 5223
2003-01-13 00:32:26 +00:00
f9781b59ab
More renamings of Target/Machine*Info to Target/Target*Info
...
llvm-svn: 5204
2002-12-29 03:13:05 +00:00
42d59219c7
Rename MachineOptInfo to TargetoptInfo
...
Rename MachineCacheInfo to TargetCacheInfo
llvm-svn: 5203
2002-12-29 02:50:35 +00:00
26c23467c5
Rename FunctionFrameInfo to MachineFrameInfo
...
llvm-svn: 5201
2002-12-28 21:08:28 +00:00
871e591e34
Rename MachineFrameInfo to TargetFrameInfo.h
...
llvm-svn: 5199
2002-12-28 21:00:25 +00:00
362b26c37e
Implement the TargetFrameInfo interface
...
llvm-svn: 5189
2002-12-28 20:33:52 +00:00
9a81e69439
* Initialize new FrameInfo member
...
* most pass ctors no longer take TM arguments
* New prolog/epilog insertion pass
llvm-svn: 5188
2002-12-28 20:33:32 +00:00
e6fb194716
Changes to match new MRegisterInfo api
...
llvm-svn: 5187
2002-12-28 20:32:54 +00:00
1d79b4ce86
*** Implement frame pointer elimination on X86!
...
* Include contents of X86RegisterClasses.cpp into here
* Adjustments to register api to work with new frame manager
* Eliminate moveImm2Reg, getFramePointer, and getStackPointer
* Cleanup and simplify prolog/epilog code generation
* Prolog/epilog are MUCH more efficient now.
llvm-svn: 5186
2002-12-28 20:32:28 +00:00
9a9739e517
Contents merged with X86RegisterInfo.cpp
...
llvm-svn: 5185
2002-12-28 20:30:15 +00:00
59a20d7b6d
* Remove implementations of previously pure virtual functions that are not any longer.
...
llvm-svn: 5184
2002-12-28 20:29:41 +00:00
365ede3748
* Minor reformatting
...
* Remove some size suffixes [bwl]
* Add new ADJCALLSTACKDOWN & ADJCALLSTACKUP pseudo instrs
* Call instructions are M_CALL not M_BRANCH!
* Disable push and pop instructions
* Add new ANDri32 instr
llvm-svn: 5183
2002-12-28 20:29:14 +00:00
ef5a8f912c
New addFrameReference function
...
llvm-svn: 5182
2002-12-28 20:26:58 +00:00
4937643df9
* Most pass ctor functions don't take TM arguments anymore
...
* New createPrologEpilogCodeInserter() function
llvm-svn: 5181
2002-12-28 20:26:16 +00:00
1520c5ab2a
* Convert to a MachineFunctionPass
...
* Don't take a TM as a ctor parameter
* Print [X - Y] instead of [X + -Y] when possible
llvm-svn: 5180
2002-12-28 20:25:38 +00:00
d24f633394
* Convert to a MachineFunctionPass
...
* ctor doesn't take TM argument
* handle direct ESP references correctly!
llvm-svn: 5179
2002-12-28 20:24:48 +00:00
51553e0700
* Use the new Abstract Frame Manager to handle incoming arguments and
...
fixed size allocas
* Revamp call emission to work with new frame manager
llvm-svn: 5178
2002-12-28 20:24:02 +00:00
a76f456a60
* Simplify Value classes
...
* Add initial support for FP constants
* Add initial FP support for several instructions
llvm-svn: 5154
2002-12-25 05:13:53 +00:00
6ecc6a72c9
* Use new pseudo instr form for instructions
...
* Mark CALLpcrel as a RawFrm instruction as required
* Eliminate invalid BSWAP16 instruction
* Add xchg instructions
* Add initial support for FP instructions
llvm-svn: 5153
2002-12-25 05:11:46 +00:00
e98ca19112
Add FP instr prefix byte support
...
Add Pseudo instr class
llvm-svn: 5152
2002-12-25 05:09:59 +00:00
36703cd02a
Add support for FP prefixes
...
llvm-svn: 5151
2002-12-25 05:09:21 +00:00
7c10f4f5d4
Add printer support for Pseudo instructions
...
llvm-svn: 5150
2002-12-25 05:09:01 +00:00
c9f3bbb5d2
Initial support for FP registers
...
llvm-svn: 5149
2002-12-25 05:08:03 +00:00
dafa31658f
New simpler spill interface
...
llvm-svn: 5148
2002-12-25 05:07:09 +00:00
4997a840bc
Adjustments to match new simpler spill interface
...
llvm-svn: 5147
2002-12-25 05:06:43 +00:00
55aaff5590
Free machine code
...
llvm-svn: 5146
2002-12-25 05:06:21 +00:00
a32b4055be
Changes to allow for a configurable target machine that allows big endian and/or long pointer operation
...
llvm-svn: 5131
2002-12-24 00:04:01 +00:00
cfcd0603d0
Changes to compile with GCC 2.96
...
Changes to support configurable pointer size and endianness
llvm-svn: 5130
2002-12-24 00:03:11 +00:00
d8201972bf
Fix compilation on gcc 2.96
...
llvm-svn: 5116
2002-12-23 23:46:55 +00:00
871abd8187
Add definition for the bswap instruction
...
*** FIX: the encoding of the SUB instruction
llvm-svn: 5115
2002-12-23 23:46:31 +00:00
e218f7924c
Add support for the bswap instruction
...
llvm-svn: 5114
2002-12-23 23:46:00 +00:00
6e7c821dc0
Fix warning
...
llvm-svn: 5109
2002-12-20 04:13:28 +00:00
5526b21e93
CBW doesn't modify AL
...
llvm-svn: 5108
2002-12-20 04:13:11 +00:00
67e555d1ec
fix warning
...
llvm-svn: 5107
2002-12-20 04:12:48 +00:00
b437b7de1a
Don't force setCC instructions into AL
...
llvm-svn: 5104
2002-12-18 01:44:31 +00:00
b54343a64f
Add comments, switch uses/defs to match InstrInfo.def file
...
llvm-svn: 5102
2002-12-18 01:05:54 +00:00
fc9af85395
Add reg clobber list for direct calls
...
Represent empty use/def list as a null pointer
llvm-svn: 5101
2002-12-18 01:05:31 +00:00
4cb8af96b3
Update to use new interface for register info
...
llvm-svn: 5098
2002-12-17 04:19:17 +00:00
eaf58b03b2
Round number of bytes allocated on the stack up to a multiple of 4 so that the
...
stack remains aligned
llvm-svn: 5095
2002-12-17 03:15:26 +00:00
d9c6f2a6d3
Local register allocator is now stable enough for use, it passes all tests
...
llvm-svn: 5094
2002-12-17 02:51:15 +00:00
5afbc4c387
Register allocator is responsible for spilling callee saved regs
...
llvm-svn: 5092
2002-12-17 02:48:57 +00:00
2e6f17f136
Build add instructions of the correct form!
...
llvm-svn: 5090
2002-12-16 23:36:57 +00:00
e92fb346d3
Two fixes:
...
* Only load incoming arguments into virtual registers once at the
beginning of the function
* Assign different virtual registers to each reference to constants/globals
llvm-svn: 5088
2002-12-16 22:54:46 +00:00
c87fcde854
Fix prolog/epilog in the presence of alloca
...
llvm-svn: 5087
2002-12-16 22:29:30 +00:00
e92f1bb011
Make sure stack manipulation refers to ESP the right number of times
...
llvm-svn: 5086
2002-12-16 22:29:06 +00:00
5c59014a1b
Add some special cases to make common getelementptr cases easier to read/faster
...
llvm-svn: 5084
2002-12-16 19:32:50 +00:00
6b5ca53493
Finish implementation of alias list impl
...
llvm-svn: 5083
2002-12-16 19:31:48 +00:00
e0c25aaf99
Add mechanism to select register allocator to use
...
llvm-svn: 5079
2002-12-16 16:15:51 +00:00
d44d25323d
Try #2 to get alias set stuff to work
...
llvm-svn: 5077
2002-12-16 16:14:51 +00:00
9b83781030
Add comments
...
llvm-svn: 5076
2002-12-16 15:57:44 +00:00
36d6f4a303
Add info about register aliases, add prototype for createLocalRegisterAllocator
...
llvm-svn: 5075
2002-12-16 15:55:51 +00:00
4cf76c23e8
Add info about register file aliasing
...
llvm-svn: 5074
2002-12-16 15:55:25 +00:00
855b784523
Add information about register file aliasing
...
llvm-svn: 5073
2002-12-16 15:54:59 +00:00
e5bbc24516
Add call clobber info
...
llvm-svn: 5072
2002-12-16 15:54:42 +00:00
0b9f0b5faf
Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator
...
llvm-svn: 5071
2002-12-16 14:38:13 +00:00
6ebe959530
brg
...
Fix some bugs in use of MBB vs. BB and iterators that are invalidated before
we use them.
Reference targetClass by enum name, not by number.
llvm-svn: 5069
2002-12-16 04:23:29 +00:00
3c1b59ca59
Correct the setting of Def flags on registers that are modified!
...
llvm-svn: 5065
2002-12-15 22:38:47 +00:00
d06650ade1
Give passes nice names!
...
llvm-svn: 5059
2002-12-15 21:13:40 +00:00
e2533336f5
Simplify interfaces used by regalloc to insert code
...
llvm-svn: 5052
2002-12-15 20:06:35 +00:00
094fd5e758
Changes to make new TargetRegisterClass interface.
...
llvm-svn: 5050
2002-12-15 19:29:34 +00:00
0d1447d64a
* Simplify TargetRegisterClass implementations
...
* Change regclass iterators to use an extra level of pointers
llvm-svn: 5047
2002-12-15 18:40:36 +00:00
3263e5787f
Add support to cast from a bool type
...
Add support for boolean constants
add getClassB method
llvm-svn: 5034
2002-12-15 08:02:15 +00:00
ce35108606
Use MachineOperand::isFoo methods instead of our own global functions
...
llvm-svn: 5033
2002-12-15 08:01:39 +00:00
c4eb1ed23c
Implement indirect function calls
...
llvm-svn: 5024
2002-12-13 14:13:27 +00:00
ca8eb8af18
Make function code generation printing debug-only.
...
llvm-svn: 5023
2002-12-13 13:16:14 +00:00
a1cf9a7c0a
Fix bork in doMultiply
...
llvm-svn: 5021
2002-12-13 13:07:42 +00:00
f1874b0677
Add sanity checks
...
llvm-svn: 5020
2002-12-13 13:04:04 +00:00
3374ec7c1b
Cleaned up the code: factored out switch/case into a separate function, put
...
constants in an array for quick lookup. Stole the idea from elsewhere in
Jello.
llvm-svn: 5017
2002-12-13 12:00:06 +00:00
d4c5013c04
Insert phi code at top of block
...
llvm-svn: 5015
2002-12-13 11:52:34 +00:00
61edd534b4
lib/Target/X86/InstSelectSimple.cpp:
...
The MachineBasicBlock variable name patrol hereby fines Chris Lattner
one bag of nachos, for shadowing global names while his license to do so
was under suspension.
llvm-svn: 5014
2002-12-13 11:39:18 +00:00
0a37046358
Implement cast bool to X
...
llvm-svn: 5012
2002-12-13 11:31:59 +00:00
85b78b7372
Rename all BMI MachineBasicBlock operands to MBB.
...
Try to mess around with emitGEPOperation's elementSizeReg to make it work,
again.
llvm-svn: 5011
2002-12-13 11:22:48 +00:00
825be9ad5d
Finish up iterator stuph
...
llvm-svn: 5009
2002-12-13 10:50:40 +00:00
121ae7d3a7
Treat longs as ints => pretend they're all 32-bit values and squeeze them into
...
32-bit registers.
llvm-svn: 5008
2002-12-13 10:43:09 +00:00
e189edf272
Code gen phi's correctly
...
llvm-svn: 5004
2002-12-13 10:09:43 +00:00
2889d2e50c
Print X86 PHI nodes in a sane manner
...
llvm-svn: 5003
2002-12-13 09:59:26 +00:00
78401cbb3c
Added moveReg2Reg() and moveImm2Reg() to accomodate moving data around due to
...
PHI nodes.
llvm-svn: 5001
2002-12-13 09:54:12 +00:00
eaeacc5872
lib/Target/X86/InstSelectSimple.cpp: Start counting arguments with 2,
...
because arguments start two stack slots off of EBP. Break out of the
for loop once the argument is found. Increment the counter at the end
of the loop instead of the beginning. Use addRegOffset and compute
the scale * index part at compile time instead of using the fancy
load instruction. Just because an instruction set has wacky addressing
modes doesn't mean we ought to use them (at least, if you believe Dave
Patterson).
lib/Target/X86/X86InstrBuilder.h: Add some comments.
test/Regression/Jello/test-loadstore.ll: Let main return int 0.
llvm-svn: 4999
2002-12-13 09:28:50 +00:00
44876fdee4
InstSelectSimple.cpp: Give promote32 a comment. Add initial
...
implementation of getReg() for arguments.
MachineCodeEmitter.cpp: Fix using EBP with index, scale and no
displacement (whew!) due to Chris.
Printer.cpp: Fix printing out index and scale in memory references.
llvm-svn: 4998
2002-12-13 07:56:18 +00:00
179519bf77
Implement getelementptr constant exprs
...
Implement ConstantPointerRefs
Treat long/ulongs as if they were integers. A hack, but an effective one
llvm-svn: 4995
2002-12-13 06:56:29 +00:00
4e2c30d894
brg
...
InstSelectSimple.cpp: Add stub implementation of visitFreeInst.
Add comments that mention how we are failing to implement malloc/free.
Add initial implementation of visitAllocaInst.
X86TargetMachine.cpp: Include llvm/Transforms/Scalar.h.
Add LowerAllocations pass before instruction selection.
jello/Makefile: Add scalaropts.a.
llvm-svn: 4994
2002-12-13 06:46:31 +00:00
e791322602
Emit the right form of mod/rm mod field
...
llvm-svn: 4986
2002-12-13 05:05:05 +00:00
e600a4ebe8
Nicify a bit
...
llvm-svn: 4985
2002-12-13 05:04:37 +00:00
82f1580ee8
Fix encoding of CBW instruction
...
llvm-svn: 4983
2002-12-13 04:41:31 +00:00
862f3ef8bc
Moves now select correct opcode based on the data size.
...
llvm-svn: 4981
2002-12-13 04:24:53 +00:00
1176170c16
Remove extranous #include
...
llvm-svn: 4980
2002-12-13 04:12:24 +00:00
ec0bc92146
Rename MemArg* to Arg*
...
llvm-svn: 4979
2002-12-13 03:51:55 +00:00
343e4b1810
Make mem size an assert
...
Add mem size flags to all instructions using an imm
llvm-svn: 4978
2002-12-13 03:50:13 +00:00
2ef75daf78
This is supposed to provide correct size for datatypes. Supposedly.
...
llvm-svn: 4977
2002-12-13 02:13:15 +00:00
7b21678aed
Added the flag to mark instructions which are really 2-address instructions in
...
X86, but would be 3-address in any normail architecture.
llvm-svn: 4974
2002-12-12 23:19:11 +00:00
5e91d38ecb
This checkin is brought to you by the brian gaeke allnighter fund.
...
(lib/Target/X86) InstSelectSimple.cpp:
Include llvm/DerivedTypes.h and iostream.
Refactor visitMul out into a wrapper around doMultiply(), so that we
can do multiplications on temporary values when we are doing
getelementptrs.
Refactor part of getReg out into makeAnotherReg, so that we can create
registers willy-nilly to hold temporary values, when we are doing
getelementptrs.
Add stub implementations of visitMallocInst and visitAllocaInst.
Add initial implementation of visitGetElementPtrInst.
In copyConstantToRegister:
We throw a *lot* of our asserts here. So, when we want to throw an
assert, print out to stderr whatever expr or whatever constant made
us barf.
Support copying ConstantPointerNull to register, using a move immediate
of zero.
Rename FLDr4 and FLDr8 to FLDr32 and FLDr64, so that they match the meanings
of the numbers in the other instruction names. All uses modified.
Teach visitCallInst to extract byte- and short-class return values
from subregs of EAX. Add a FIXME note about how we would do it for
float-class return values.
Add a FIXME note about how we would cast float to int and back.
X86InstrInfo.def:
Rename FLDr4 and FLDr8 to FLDr32 and FLDr64, so that they match the meanings
of the numbers in the other instruction names. All uses modified.
(tools/jello) GlobalVars.cpp:
Include iostream.
If we have to emit a floating-point constant to memory, gamble and use
the same method as for ints.
If we have to emit a ConstantPointerNull to memory, try using a "void *"
and "NULL".
Otherwise, if we are going to throw an assert, print out whatever constant
made us barf, first.
llvm-svn: 4973
2002-12-12 15:33:40 +00:00
9cf5718665
Implement a lot of cast functionality (no FP or 64)
...
llvm-svn: 4944
2002-12-06 10:49:33 +00:00
a4a10fe88b
Target/X86/Printer.cpp: Add sizePtr function, and use it instead of
...
" <SIZE> PTR " string when emitting assembly.
Target/X86/X86InstrInfo.def: Tidy up a bit:
Squashed everything down to 118 chars wide, wrapping lines so that
comment is at the same point on each line. Rename "NoImpRegs" as
"NoIR". (most instructions have NoImpRegs twice on a line, so this
saves 10 columns).
Also, annotate various instructions with flags for size of memory operand.
(MemArg16, MemArg32, MemArg64, etc.)
Target/X86/X86InstrInfo.h: Define flags for size of memory operand.
(MemArg16, MemArg32, MemArg64, etc.)
llvm-svn: 4932
2002-12-05 08:30:40 +00:00
83e62f14dd
Implemented functions for emitting prologues and epilogues;
...
removed EBP from the list of callee-saved registers (it isn't one).
llvm-svn: 4929
2002-12-04 23:57:03 +00:00
ab2ffedb38
Added push and pop instructions.
...
llvm-svn: 4928
2002-12-04 23:56:26 +00:00
e21336000b
Fix handling of function calls that return void
...
llvm-svn: 4925
2002-12-04 23:50:28 +00:00
4859c65d48
Implement initial support for return values from call instructions
...
llvm-svn: 4924
2002-12-04 23:45:28 +00:00
81c7a3a84c
Adjust the stack pointer after a function call, proportional to the number of
...
arguments pushed onto the stack.
llvm-svn: 4922
2002-12-04 19:22:53 +00:00
dfa9cfa67f
Added instructions to add/subtract imm32 to/from a reg32.
...
llvm-svn: 4921
2002-12-04 19:15:22 +00:00
fb8032dc84
Fix bogus assertion failures
...
llvm-svn: 4919
2002-12-04 17:32:52 +00:00
8d79e5c9d9
Avoid bad assertion
...
llvm-svn: 4918
2002-12-04 17:28:40 +00:00
82cc643401
Remove think-o assertion
...
llvm-svn: 4917
2002-12-04 17:18:30 +00:00
ccf17c6564
Avoid crashing on Arguments, just silently miscompile
...
llvm-svn: 4916
2002-12-04 17:15:34 +00:00
1af9bebcda
storeReg2RegOffset() and loadRegOffset2Reg() now take the iterator by value
...
instead of by reference, since they return the modified iterator.
llvm-svn: 4914
2002-12-04 17:14:13 +00:00
0d28502c32
Moved buildReg2RegClassMap() into from X86RegisterInfo to MRegisterInfo, since
...
it is target-independent.
llvm-svn: 4911
2002-12-04 16:47:04 +00:00
7b1ec5ed3a
Add a "Lazy Function Resolution in Jello" section
...
Remove some todo's
llvm-svn: 4910
2002-12-04 16:12:54 +00:00
bc98081090
Fix a bug I introduced in a previous change
...
llvm-svn: 4909
2002-12-04 06:56:56 +00:00
6425a502a6
Add support for referencing global variables/functions
...
llvm-svn: 4907
2002-12-04 06:45:19 +00:00
d9522256d3
Added support for callee- and caller-save registers.
...
llvm-svn: 4897
2002-12-03 23:11:21 +00:00
64261741c7
Fix broken ret opcode, grr...
...
llvm-svn: 4895
2002-12-03 22:50:02 +00:00
645b7548bf
Fix instsel for calls
...
llvm-svn: 4891
2002-12-03 20:30:12 +00:00
6a0874071b
Fix the build
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llvm-svn: 4884
2002-12-03 18:15:59 +00:00
b676857358
brg
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Add support for cast ... to bool in visitCastInst (it's a start, anyways...)
llvm-svn: 4883
2002-12-03 07:36:03 +00:00
8052f8006b
Split the machine code emitter completely out of the printer
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llvm-svn: 4882
2002-12-03 06:34:06 +00:00
0d80874f6c
* Move information about Implicit Defs/Uses into X86InstrInfo.def.
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* Expose information about implicit defs/uses of register through the
MachineInstrInfo.h file.
llvm-svn: 4877
2002-12-03 05:42:53 +00:00
5485c079d1
brg
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X86Implicit.cpp, X86Implicit.h: New files.
InstSelectSimple.cpp: Add some clarifications in visitCallInst comments.
llvm-svn: 4874
2002-12-03 00:51:09 +00:00
15fbd61664
More support for machine code emission: raw instructions
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llvm-svn: 4872
2002-12-02 21:56:18 +00:00
1207ccdbc1
Expose explicit type
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llvm-svn: 4871
2002-12-02 21:50:41 +00:00
db31bbad6b
Start implementing MachineCodeEmitter
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llvm-svn: 4870
2002-12-02 21:44:34 +00:00
58743b9f78
Eliminate OtherFrm
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llvm-svn: 4868
2002-12-02 21:40:58 +00:00
d5823603fa
Remove comment
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Remove handling of OtherFrm
llvm-svn: 4867
2002-12-02 21:40:46 +00:00
787a9de685
Initial support for machine code emission
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llvm-svn: 4866
2002-12-02 21:24:12 +00:00
aa15563510
Fix order of operands on a store from reg to [reg+offset].
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llvm-svn: 4857
2002-12-02 21:10:35 +00:00
08cd1edaa9
Add rawfrm flags
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llvm-svn: 4841
2002-12-01 23:25:59 +00:00
7dcb1436da
Don't add implicit regs
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llvm-svn: 4840
2002-12-01 23:24:58 +00:00
2ad3501d3f
brg
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InstSelectSimple.cpp: Refactor out conversion of byte, short -> int
from visitReturnInst() to new method, promote32().
Use it in both visitReturnInst() and visitCallInst().
llvm-svn: 4839
2002-11-30 11:57:28 +00:00
23953e0f8a
brg
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InstSelectSimple.cpp: First draft of visitCallInst method, handling
int/float args.
X86InstrInfo.def: Add entries for CALL with 32-bit pc relative arg, and
PUSH with 32-bit reg arg.
llvm-svn: 4838
2002-11-29 12:01:58 +00:00
4ba2cb110a
brg
...
InstSelectSimple.cpp: Add some comments that say what I'm going to do for
calls and casts.
llvm-svn: 4832
2002-11-26 10:43:30 +00:00
5014e38273
Oops. Got the MOVrm and MOVmr mixed up. Fixed. We can now print out
...
instructions correctly.
llvm-svn: 4830
2002-11-22 23:15:27 +00:00
55cf6bfae4
Enable the register allocator pass.
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llvm-svn: 4829
2002-11-22 22:45:07 +00:00
bde217d7a9
Added methods to read/write values to stack in .h, fixed implementation in
...
.cpp to return the iterator correctly.
llvm-svn: 4827
2002-11-22 22:43:47 +00:00
1a72c637fb
Added -*- C++ -*- mode to the comments.
...
llvm-svn: 4826
2002-11-22 22:42:50 +00:00
4ea94a4be0
Add a simple way to add memory locations of format [reg+offset]
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llvm-svn: 4825
2002-11-22 22:42:12 +00:00
aa91eae6af
lib/Target/X86/InstSelectSimple.cpp: Add visitCallInst, visitCastInst.
...
llvm-svn: 4821
2002-11-22 11:07:01 +00:00
e5330c4adf
Handle cmp Reg, 0 correctly
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llvm-svn: 4819
2002-11-21 23:30:00 +00:00
f435afc268
Printing support for more stuff
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llvm-svn: 4818
2002-11-21 22:49:46 +00:00
174a94007d
Don't add implicit operands
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llvm-svn: 4817
2002-11-21 22:49:20 +00:00
b35341ee25
Fix off by one bug
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llvm-svn: 4816
2002-11-21 22:48:15 +00:00
af7bd2c6b5
Add fixme
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llvm-svn: 4815
2002-11-21 22:48:01 +00:00
1c80d37765
Minor code cleanups
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llvm-svn: 4814
2002-11-21 21:04:50 +00:00
4fbd8a2f78
Implement printing of store instructions
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llvm-svn: 4813
2002-11-21 21:03:39 +00:00
61fafd35f5
The big change here is to handle printing/emission of X86II::MRMSrcMem
...
instructions. Right now the only users are load instructions, and Misha's
spill code
llvm-svn: 4812
2002-11-21 20:44:15 +00:00
cf7c225e06
Remove implicit information from instruction selector
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llvm-svn: 4811
2002-11-21 18:54:29 +00:00
e8885d949a
Add printing information for MUL and DIV
...
llvm-svn: 4810
2002-11-21 18:54:14 +00:00
5e50475adb
Fix a bug that prevented compilation of multiple functions
...
llvm-svn: 4809
2002-11-21 17:26:58 +00:00
7939ecc8eb
Remove opcode information for instructions that are completely defined now
...
llvm-svn: 4805
2002-11-21 17:12:55 +00:00
1f9530508b
Add printing support for sahf & setcc
...
llvm-svn: 4804
2002-11-21 17:10:57 +00:00
c868841ad6
Add printing support for /0 /1 type instructions
...
llvm-svn: 4803
2002-11-21 17:09:01 +00:00
a6eb52fcf7
Add support for /0 /1, etc type instructions
...
llvm-svn: 4802
2002-11-21 17:08:49 +00:00
41e2d4cdcf
Rename the SetCC X86 instructions to reflect the fact that they are the
...
register versions
llvm-svn: 4800
2002-11-21 16:19:42 +00:00
45ddd59da5
Simplify setcc code a bit
...
llvm-svn: 4799
2002-11-21 15:52:38 +00:00
177e928a46
Support Registers of the form (B8+ rd) for example
...
llvm-svn: 4798
2002-11-21 02:00:20 +00:00
3a3ac9d225
Dont' set flags
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llvm-svn: 4797
2002-11-21 01:59:50 +00:00
6985c19b61
Implement printing more, implement opcode output more
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llvm-svn: 4796
2002-11-21 01:33:44 +00:00
dfbfd81217
Huge diff do to reindeinting comments.
...
Basically just adds OpSize flags for instructions that need them.
llvm-svn: 4795
2002-11-21 01:33:28 +00:00
c48d0fa9a2
Add new prefix flag
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llvm-svn: 4794
2002-11-21 01:32:55 +00:00
f03132f014
Print another class of instructions correctly, giving us: xorl EDX, EDX
...
for example.
llvm-svn: 4793
2002-11-21 00:30:01 +00:00
95e6287734
Booleans are types too. And they get stored in bytes. And InstructionSelection
...
doesn't assert fail. And everyone's happy. Yay!
llvm-svn: 4792
2002-11-21 00:25:56 +00:00
53d2de923a
Add definitions for function headers from MRegisterInfo.h:
...
Some functions are in X86RegisterInfo.cpp, others, because of the data they
need, are in X86RegisterClasses.cpp, which also defines some register classes:
byte, short, and int.
llvm-svn: 4784
2002-11-20 18:59:43 +00:00
6e5d493e0f
Check not only for MO_VirtualRegister, but MO_MachineRegister as well when
...
printing out assembly. After all, we want the real thing too.
llvm-svn: 4783
2002-11-20 18:56:41 +00:00
eaaceb1210
Add mapping in MachineFunction from SSA regs to Register Classes. Also,
...
uncovered a bug where registers were not being put in a map if they were not
found...
llvm-svn: 4776
2002-11-20 00:58:23 +00:00
ade1143692
Sigh. Fixed some speling.
...
llvm-svn: 4775
2002-11-20 00:56:42 +00:00
310afc5f8c
Thanks to the R8, R16, and R32 macros, I can now deal with registers that
...
belong to different register classes easier.
llvm-svn: 4773
2002-11-20 00:47:40 +00:00
a648bc6674
Brian Gaeke says:
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lib/Target/X86/InstSelectSimple.cpp: Add a little something to
visitBranchInst which supports conditional branches.
lib/Target/X86/X86InstrInfo.def: Add defs of JNE, JE, CMPri8
llvm-svn: 4755
2002-11-19 09:08:47 +00:00
5812f06b30
Start trying to print instructions more correctly. For now we also print out the opcode for each instruction as well.
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llvm-svn: 4743
2002-11-18 06:56:51 +00:00
cf72e52df3
Expose base opcode
...
llvm-svn: 4742
2002-11-18 06:56:24 +00:00
0018e8d5fc
Start to add more information to instr.def
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llvm-svn: 4741
2002-11-18 05:37:11 +00:00
f2e00c62ab
Add instruction annotation about whether it has a 0x0F opcode prefix
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llvm-svn: 4740
2002-11-18 01:59:28 +00:00
c6f7457e90
Add more void flags
...
llvm-svn: 4739
2002-11-18 01:37:48 +00:00
dbdacac022
Set the void flag on instructions that should get it
...
llvm-svn: 4738
2002-11-18 01:34:36 +00:00
5fd53046b0
Arrange to have a TargetMachine available in X86InstrInfo::print
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llvm-svn: 4734
2002-11-17 23:20:37 +00:00
b79ccae887
Wow, I'm incapable of the simplest things today...
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llvm-svn: 4732
2002-11-17 23:05:21 +00:00
afce16dec8
Rename registers to follow the intel style of all caps
...
llvm-svn: 4731
2002-11-17 23:03:46 +00:00
9289d7d693
Reorganize printing interface a bit
...
llvm-svn: 4728
2002-11-17 22:53:13 +00:00
64c3bb99ed
Fix minor detail
...
llvm-svn: 4725
2002-11-17 22:33:26 +00:00
cb57e5ca17
Fix Mul/Div clobbers
...
llvm-svn: 4718
2002-11-17 21:56:38 +00:00
ecdb49d74a
Fix a few typos, implement load/store
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llvm-svn: 4716
2002-11-17 21:11:55 +00:00
c682b4a9ab
Add functions to buld X86 specific constructs
...
llvm-svn: 4714
2002-11-17 21:03:35 +00:00
6fd0ef303d
Add information about memory index representation
...
llvm-svn: 4712
2002-11-17 20:33:26 +00:00
e86f98e06c
Add load/store instructions
...
llvm-svn: 4711
2002-11-17 20:33:12 +00:00
09fddd97fb
Switch visitRet to use getClass()
...
llvm-svn: 4710
2002-11-17 20:07:45 +00:00
e74543584a
include/llvm/CodeGen/MachineInstrBuilder.h: Add addClobber() inline
...
convenience method. Fix typo in comment.
lib/Target/X86/InstSelectSimple.cpp: Explicitly specify some implicit uses.
Use MOVZX/MOVSX instead of MOV instructions with sign extend instructions.
Take out LEAVE instructions.
32-bit IDIV and DIV use CDQ, not CWQ (CWQ is a typo).
Fix typo in comment and remove some FIXME comments.
lib/Target/X86/Printer.cpp: Include X86InstrInfo.h and llvm/Function.h.
Add some simple code to Printer::runOnFunction to iterate over
MachineBasicBlocks and call X86InstrInfo::print().
lib/Target/X86/X86InstrInfo.def: Make some more instructions with
implicit defs "Void". Add more sign/zero extending "move" insns
(movsx, movzx).
lib/Target/X86/X86RegisterInfo.def: Add EFLAGS as a register.
llvm-svn: 4707
2002-11-14 22:32:30 +00:00
b2687880e2
InstSelectSimple.cpp: (visitReturnInst) Add return instructions with return
...
values.
X86InstrInfo.def: add LEAVE instruction.
llvm-svn: 4691
2002-11-11 19:37:09 +00:00
9cbe229704
Add instruction selection code and tests for setcc instructions
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llvm-svn: 4603
2002-11-07 17:59:21 +00:00
781986c436
Implement signed and unsigned division and remainder
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llvm-svn: 4508
2002-11-02 20:54:46 +00:00
d12e1bc777
Implement multiply operator
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llvm-svn: 4506
2002-11-02 20:28:58 +00:00
e823fb32f4
* Implement subtract
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* Merge add code into logical code
llvm-svn: 4503
2002-11-02 20:13:22 +00:00
dd873d2179
shuffle code around a bit, implement and, or, xor
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llvm-svn: 4502
2002-11-02 20:04:26 +00:00
abe3280ad9
Add PHI node support, add comment for branch function
...
llvm-svn: 4500
2002-11-02 19:45:49 +00:00
16af2d5aa8
Implement unconditional branching support
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llvm-svn: 4498
2002-11-02 19:27:56 +00:00
cfb187f6bb
* Fix nonconstant shift case
...
* Turn table into 2d table
llvm-svn: 4496
2002-11-02 01:41:55 +00:00
ff3d28f403
Use a more table driven approach to handling types. Seems to simplify the
...
code a bit
llvm-svn: 4493
2002-11-02 01:15:18 +00:00
63f4e752cd
Make switch statements denser, but only because of the follow-on patch
...
llvm-svn: 4492
2002-11-02 00:49:56 +00:00
122b73b7a6
* Remove dead variable
...
* Shift amount is always guaranteed to be 8 bits
llvm-svn: 4491
2002-11-02 00:44:25 +00:00
6e2d676829
InstSelectSimple.cpp: Include llvm/iOther.h for ShiftInst.
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Add ISel::visitShiftInst() to instruction select shift instructions.
Add a comment in visitAdd about how to do 64 bit adds.
X86InstrInfo.def: Add register-to-register move opcodes and shift opcodes.
llvm-svn: 4477
2002-10-31 23:03:59 +00:00
6c34c0baf5
Add lots more info
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llvm-svn: 4450
2002-10-30 06:04:46 +00:00
c9e1efd0f8
Make sure to set the destination register correctly
...
llvm-svn: 4444
2002-10-30 01:49:01 +00:00
87b84a6913
Set the destination register field based on the target specific flags
...
llvm-svn: 4442
2002-10-30 01:15:31 +00:00
60c59d5b4e
Add flag to specify when no value is produced by an instruction
...
llvm-svn: 4441
2002-10-30 01:09:34 +00:00
858a4a6595
Implement the new optional getRegisterInfo
...
llvm-svn: 4437
2002-10-30 00:56:18 +00:00
d7a855668d
Print machine code after instruction selection
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llvm-svn: 4434
2002-10-30 00:47:49 +00:00
e3ceb17d54
Make sure to pass the LLVM basic block in
...
llvm-svn: 4433
2002-10-30 00:47:40 +00:00
7ee171b717
Construct annotation, to make sure it's attached to function
...
llvm-svn: 4429
2002-10-29 23:40:58 +00:00
02a3d837c2
Convert backend to use passes, implement X86TargetMachine
...
llvm-svn: 4421
2002-10-29 22:37:54 +00:00
27d247978b
Rename X86InstructionInfo to X86InstrInfo
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llvm-svn: 4413
2002-10-29 21:05:24 +00:00
f57420ee17
Minor renaming
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llvm-svn: 4410
2002-10-29 20:48:56 +00:00
2990e9b6cd
Switch to generating machineinstr's instead of MInstructions
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llvm-svn: 4396
2002-10-29 17:43:55 +00:00
6c3f9c1b8f
Be compatible with sparc backend
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llvm-svn: 4395
2002-10-29 17:43:38 +00:00
16cbd41c21
Implement MachineInstrInfo interface
...
llvm-svn: 4394
2002-10-29 17:43:19 +00:00
f4b122dbc5
Switch to different flag set
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llvm-svn: 4393
2002-10-29 17:42:40 +00:00
1303f2f057
Initial stab at MachineInstr'ication
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llvm-svn: 4367
2002-10-28 23:55:19 +00:00
d5b45791a4
Fixed spelling and grammar.
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llvm-svn: 4353
2002-10-28 20:01:52 +00:00
52c2d10a19
Remove dead fixme
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llvm-svn: 4300
2002-10-27 21:23:43 +00:00
7d3e5dbf2b
Instruction select constant arguments correctly
...
llvm-svn: 4297
2002-10-27 21:16:59 +00:00
407582dc5a
Add instruction definitions for mov r, imm instructions
...
llvm-svn: 4296
2002-10-27 21:16:44 +00:00
d92fb0058b
Initial checkin of X86 backend.
...
We can instruction select exactly one instruction 'ret void'. Wow.
llvm-svn: 4284
2002-10-25 22:55:53 +00:00
Chris Lattner