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3 Commits

Author SHA1 Message Date
Alex Bradbury 7d6aa1f7ae [RISCV] Implement frame pointer elimination 
llvm-svn: 322839
 2018-01-18 11:34:02 +00:00
Alex Bradbury 0715d35ed5 [RISCV] Reserve an emergency spill slot for the register scavenger when necessary 
Although the register scavenger can often find a spare register, an emergency 
spill slot is needed to guarantee success. Reserve this slot in cases where 
the function is known to have a large stack (meaning the scavenger may be 
needed when forming stack addresses).

llvm-svn: 322269
 2018-01-11 11:17:19 +00:00
Alex Bradbury 9fea4881d0 [RISCV] Support stack frames and offsets up to 32-bits 
Differential Revision: https://reviews.llvm.org/D40807

llvm-svn: 322216
 2018-01-10 19:53:46 +00:00