llvm-project

Commit Graph

Author	SHA1	Message	Date
Matt Arsenault	3c5e4237c6	AMDGPU: Make some packed shuffles free VOP3P instructions can encode access to either half of the register. llvm-svn: 302730	2017-05-10 21:29:33 +00:00
Matt Arsenault	3dbeefa978	AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444	2017-03-21 21:39:51 +00:00
Matt Arsenault	59767cea79	AMDGPU: TTI: Make insertelement free. We don't want to have a cost to scalarizing operations. llvm-svn: 264364	2016-03-25 00:14:11 +00:00

Author

SHA1

Message

Date

Matt Arsenault

3c5e4237c6

AMDGPU: Make some packed shuffles free

VOP3P instructions can encode access to either
half of the register.

llvm-svn: 302730

2017-05-10 21:29:33 +00:00

Matt Arsenault

3dbeefa978

AMDGPU: Mark all unspecified CC functions in tests as amdgpu_kernel

Currently the default C calling convention functions are treated
the same as compute kernels. Make this explicit so the default
calling convention can be changed to a non-kernel.

Converted with perl -pi -e 's/define void/define amdgpu_kernel void/'
on the relevant test directories (and undoing in one place that actually
wanted a non-kernel).

llvm-svn: 298444

2017-03-21 21:39:51 +00:00

Matt Arsenault

59767cea79

AMDGPU: TTI: Make insertelement free.

We don't want to have a cost to scalarizing operations.

llvm-svn: 264364

2016-03-25 00:14:11 +00:00

3 Commits