llvm-project

Commit Graph

Author	SHA1	Message	Date
Matthias Braun	c045c557b0	Relax fast register allocator related test cases; NFC - Relex hard coded registers and stack frame sizes - Some test cleanups - Change phi-dbg.ll to match on mir output after phi elimination instead of going through the whole codegen pipeline. This is in preparation for https://reviews.llvm.org/D52010 I'm committing all the test changes upfront that work before and after independently. llvm-svn: 345532	2018-10-29 20:10:42 +00:00
Matthias Braun	0d4505c067	AArch64FastISel: Use cbz/cbnz to branch on i1 In the case of a conditional branch without a preceding cmp we used to emit a "and; cmp; b.eq/b.ne" sequence, use tbz/tbnz instead. Differential Revision: http://reviews.llvm.org/D15122 llvm-svn: 254621	2015-12-03 17:19:58 +00:00
Juergen Ributzka	f09c7a3d0f	[AArch64][FastISel] Always use AND before checking the branch flag. When we are not emitting the condition for the branch, because the condition is in another BB or SDAG did the selection for us, then we have to mask the flag in the register with AND. This is required when the condition comes from a truncate, because SDAG only truncates down to a legal size of i32. This fixes rdar://problem/22161062. llvm-svn: 244291	2015-08-06 22:44:15 +00:00

Author

SHA1

Message

Date

Matthias Braun

c045c557b0

Relax fast register allocator related test cases; NFC

- Relex hard coded registers and stack frame sizes
- Some test cleanups
- Change phi-dbg.ll to match on mir output after phi elimination instead
  of going through the whole codegen pipeline.

This is in preparation for https://reviews.llvm.org/D52010
I'm committing all the test changes upfront that work before and after
independently.

llvm-svn: 345532

2018-10-29 20:10:42 +00:00

Matthias Braun

0d4505c067

AArch64FastISel: Use cbz/cbnz to branch on i1

In the case of a conditional branch without a preceding cmp we used to emit
a "and; cmp; b.eq/b.ne" sequence, use tbz/tbnz instead.

Differential Revision: http://reviews.llvm.org/D15122

llvm-svn: 254621

2015-12-03 17:19:58 +00:00

Juergen Ributzka

f09c7a3d0f

[AArch64][FastISel] Always use AND before checking the branch flag.

When we are not emitting the condition for the branch, because the condition is
in another BB or SDAG did the selection for us, then we have to mask the flag in
the register with AND.

This is required when the condition comes from a truncate, because SDAG only
truncates down to a legal size of i32.

This fixes rdar://problem/22161062.

llvm-svn: 244291

2015-08-06 22:44:15 +00:00

3 Commits