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3 Commits

Author SHA1 Message Date
Simon Pilgrim 1e1fd9c761 [TargetLowering] Add ISD::OR + ISD::XOR handling to SimplifyDemandedVectorElts 
Differential Revision: https://reviews.llvm.org/D55600

llvm-svn: 349264
 2018-12-15 11:36:36 +00:00
Simon Pilgrim 125d9b0907 Regenerate knownbits test. NFCI. 
A future SimplifyDemandedBits patch will affect this code and I want to ensure the codegen diff is obvious.

llvm-svn: 348925
 2018-12-12 13:21:03 +00:00
Jonas Paulsson 138960770c [SystemZ] computeKnownBitsForTargetNode() / ComputeNumSignBitsForTargetNode() 
Improve/implement these methods to improve DAG combining. This mainly
concerns intrinsics.

Some constant operands to SystemZISD nodes have been marked Opaque to avoid
transforming back and forth between generic and target nodes infinitely.

Review: Ulrich Weigand
llvm-svn: 327765
 2018-03-17 08:32:12 +00:00