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9083 Commits

Author SHA1 Message Date
Chris Lattner 3ba293564a fold immediates into stores in simple cases, this produces diffs like 
this:

-	movl	$0, %eax
-	movl	%eax, _yy_n_chars
+	movl	$0, _yy_n_chars

llvm-svn: 57555
 2008-10-15 05:30:52 +00:00
Chris Lattner e388725aef fold compare of null pointer into compare with 0. 
llvm-svn: 57553
 2008-10-15 05:18:04 +00:00
Chris Lattner a0f9d4972f Some minor cleanups: 
1. Compute action in X86SelectSelect based on MVT instead of type.
2. Use TLI.getValueType(..) instead of MVT::getVT(..) because the former
   handles pointers and the later doesn't.
3. Don't pass TLI into isTypeLegal, since it already has access to it as 
   an ivar.

#2 gives fast isel some minor new functionality: handling load/stores of
pointers.

llvm-svn: 57552
 2008-10-15 05:07:36 +00:00
Chris Lattner 74e012839d Use switch on VT instead of Type* comparisons. 
llvm-svn: 57551
 2008-10-15 04:32:45 +00:00
Chris Lattner dc1c380f23 Use X86FastEmitCompare for FCMP_OEQ and FCMP_UNE: it doesn't 
change the generated code, but makes the code simpler.

llvm-svn: 57550
 2008-10-15 04:29:23 +00:00
Chris Lattner d46b9510b6 refactor compare emission out into a new X86FastEmitCompare method, 
which makes it easy to share the compare/imm folding logic with 'setcc'.
This shaves a bunch of instructions off the common select case, which
happens a lot in llvm-gcc.

llvm-svn: 57549
 2008-10-15 04:26:38 +00:00
Chris Lattner 88f4754f8f Fold immediates into compares when possible, producing "cmp $4, %eax" instead of 
loading 4 into a register and then doing the compare.

llvm-svn: 57548
 2008-10-15 04:13:29 +00:00
Chris Lattner 47bef25c01 more minor refactoring of X86SelectBranch, no functionality change. 
llvm-svn: 57547
 2008-10-15 04:02:26 +00:00
Chris Lattner 0ce717ac6b factor buildmi calls in X86SelectBranch 
llvm-svn: 57546
 2008-10-15 03:58:05 +00:00
Chris Lattner f32ce221e4 factor some more BuildMI's in X86SelectCmp 
llvm-svn: 57545
 2008-10-15 03:52:54 +00:00
Chris Lattner a3596db462 factor some BuildMI calls, no functionality change. 
llvm-svn: 57544
 2008-10-15 03:47:17 +00:00
Evan Cheng 3b0f5e4d61 - Add target lowering hooks that specify which setcc conditions are illegal, 
i.e. conditions that cannot be checked with a single instruction. For example,
SETONE and SETUEQ on x86.
- Teach legalizer to implement *illegal* setcc as a and / or of a number of
legal setcc nodes. For now, only implement FP conditions. e.g. SETONE is
implemented as SETO & SETNE, SETUEQ is SETUO | SETEQ.
- Move x86 target over.

llvm-svn: 57542
 2008-10-15 02:05:31 +00:00
Dan Gohman e7ced74558 FastISel support for exception-handling constructs. 
- Move the EH landing-pad code and adjust it so that it works
   with FastISel as well as with SDISel.
 - Add FastISel support for @llvm.eh.exception and
   @llvm.eh.selector.

llvm-svn: 57539
 2008-10-14 23:54:11 +00:00
Dale Johannesen 28106756af Accept -march=i586, because gcc does (a synonym 
for pentium).  Fixes
gcc.target/i386/20000720-1.c
gcc.target/i386/pr26826.c

llvm-svn: 57528
 2008-10-14 22:06:33 +00:00
Evan Cheng 07d53b1d33 Rename LoadX to LoadExt. 
llvm-svn: 57526
 2008-10-14 21:26:46 +00:00
Jim Grosbach b7c01f5f48 Update ARM Insn encoding to get endian-ness to match the documentation (31-0 left to right) 
llvm-svn: 57524
 2008-10-14 20:36:24 +00:00
Dan Gohman 9c4b7d5c4f Fix command-line option printing to print two spaces where needed, 
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.

llvm-svn: 57521
 2008-10-14 20:25:08 +00:00
Evan Cheng c36231b95e Fix indentation. 
llvm-svn: 57508
 2008-10-14 17:15:39 +00:00
Dan Gohman 56b6885104 When doing the very-late shift-and address-mode optimization, 
create a new DAG node to represent the new shift to keep the
DAG consistent, even though it'll almost always be folded into
the address.

If a user of the resulting address has multiple uses, the
nodes may get revisited by a later MatchAddress call, in which
case DAG inconsistencies do matter.

This fixes PR2849.

llvm-svn: 57465
 2008-10-13 20:52:04 +00:00
Anton Korobeynikov 46a9c01fff Update size of inst correctly with segment override. 
llvm-svn: 57414
 2008-10-12 10:30:11 +00:00
Chris Lattner 2753955fc0 Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as 
parameters instead of raw Constants.  This prevents the constants from
being selected by the isel pass, fixing PR2735.

llvm-svn: 57385
 2008-10-11 22:08:30 +00:00
Duncan Sands 23ee981e8e Fix comment typo. 
llvm-svn: 57381
 2008-10-11 19:34:24 +00:00
Anton Korobeynikov 2589777f3f Add ability to override segment (mostly for code emitter purposes). 
llvm-svn: 57380
 2008-10-11 19:09:15 +00:00
Dale Johannesen 05b54c2af4 Fix SSE4.1 roundss, roundsd. While the instructions have 
the same pattern as roundpd/roundps, the Intel compiler 
builtins do not:  rounds* has an extra operand.  Fixes
gcc.target/i386/sse4_1-rounds[sd]-[1234].c

llvm-svn: 57370
 2008-10-10 23:51:03 +00:00
Anton Korobeynikov 58deb69040 Fix a thinko and unbreak sparc default CC 
llvm-svn: 57368
 2008-10-10 21:47:37 +00:00
Anton Korobeynikov f8a4a0e959 Extend set of return registers on sparc until someone will implement MRV support there. At least, this will allow libgcc compile, however we are not ABI-compatible with stuff compiled with native gcc. 
llvm-svn: 57364
 2008-10-10 20:30:14 +00:00
Anton Korobeynikov b80b485264 Ignore extra 'r' modifier for now 
llvm-svn: 57363
 2008-10-10 20:29:50 +00:00
Anton Korobeynikov 76baad1ffc Use expand for smul_lohi for now 
llvm-svn: 57362
 2008-10-10 20:29:31 +00:00
Anton Korobeynikov 281cf247a5 Add rudimentary support for 'r' register operand 
llvm-svn: 57359
 2008-10-10 20:28:10 +00:00
Anton Korobeynikov b8736566c2 Cleanup 
llvm-svn: 57358
 2008-10-10 20:27:31 +00:00
Anton Korobeynikov 3db2173021 Add rudimentary asmprinter support for printing inline asm operands for sparc. 
llvm-svn: 57346
 2008-10-10 10:15:03 +00:00
Anton Korobeynikov 9aaaa4035e Add dummy 'm' inline asm constraint handler for Sparc. I'm not sure, whether it is correct, however :) 
llvm-svn: 57345
 2008-10-10 10:14:47 +00:00
Anton Korobeynikov 1f9487b916 Cleanup 
llvm-svn: 57344
 2008-10-10 10:14:15 +00:00
Dale Johannesen 4f0bd68cfe Add a "loses information" return value to APFloat::convert 
and APFloat::convertToInteger.  Restore return value to
IEEE754.  Adjust all users accordingly.

llvm-svn: 57329
 2008-10-09 23:00:39 +00:00
Dale Johannesen 54306fe499 Rename APFloat::convertToAPInt to bitcastToAPInt to 
make it clearer what the function does.  No functional
change.

llvm-svn: 57325
 2008-10-09 18:53:47 +00:00
Chris Lattner 1a84f86271 get CodeGen/Alpha/mul128.ll to work. 
llvm-svn: 57318
 2008-10-09 04:50:56 +00:00
Dale Johannesen 66e08292aa (re)Put const weak strings in appropriate section on Darwin. 
g++dg/abi/key2.C

llvm-svn: 57309
 2008-10-08 21:49:47 +00:00
Jim Grosbach d83529e8c4 Comment to be explicit that the enumeration values for CondCodes matter. 
llvm-svn: 57295
 2008-10-08 16:24:35 +00:00
Duncan Sands 32052e8272 Use template to distinguish between function variants. 
GCC 4.4.0 gives an error on the "int" declaration for example
saying that it has already been declared (using the "short"
one). Using templates here allow the compiler to distinguish
between the function to choose.

Also, "llvm/Support/DataTypes.h" was not included, leading to
error messages about not knowing "uint32_t" for example.

Patch by Samuel Tardieu.

llvm-svn: 57292
 2008-10-08 07:44:52 +00:00
Duncan Sands 26ff6f9c54 Add <cstdio> include where needed by gcc-4.4. 
Patch by Samuel Tardieu.

llvm-svn: 57291
 2008-10-08 07:23:46 +00:00
Dan Gohman b3ba449cfb Add MBB successors and physreg Uses in the same order that 
SDISel typically adds them in. This makes it a little easier
to compare FastISel output with SDISel output.

llvm-svn: 57266
 2008-10-07 22:10:33 +00:00
Dan Gohman d3917157d5 Instead of emitting an implicit use for the super-register of 
X86::CL that was used, emit an EXTRACT_SUBREG from the CL
super-register to CL. This more precisely describes how the
CL register is being used.

llvm-svn: 57264
 2008-10-07 21:50:36 +00:00
Jim Grosbach f311fe142c Unconditional branch instruction encoding fix. Needs to use ABI, not AXI, to get the proper opcode bits. 
llvm-svn: 57262
 2008-10-07 21:08:09 +00:00
Jim Grosbach b53acd8caa need ARM.h for ARMCC definition 
llvm-svn: 57261
 2008-10-07 21:01:51 +00:00
Owen Anderson 1d338fc6a4 Add an option to enable StrongPHIElimination, for ease of testing. 
llvm-svn: 57259
 2008-10-07 20:22:28 +00:00
Jim Grosbach c084e84028 Encode the conditional execution predicate when JITing. 
llvm-svn: 57258
 2008-10-07 19:05:35 +00:00
Dale Johannesen 422ef88f31 Model hardwired inputs & outputs of x86 8-bit divides correctly. 
Fixes local RA miscompilation of gcc.c-torture/execute/20020904-1.c -O0.

llvm-svn: 57257
 2008-10-07 18:54:28 +00:00
Jim Grosbach 2fb5c3938b Clarify naming and correct conditional so that CMP and CMN instructions get the Rn operand encoded properly 
llvm-svn: 57252
 2008-10-07 17:42:09 +00:00
Jim Grosbach 1d54d4f375 Fix Opcode values of CMP and CMN 
llvm-svn: 57251
 2008-10-07 17:40:46 +00:00
Anders Carlsson 1699ad9030 Certain patterns involving the "movss" instruction were marked as requiring SSE2, when in reality movss is an SSE1 instruction. 
llvm-svn: 57246
 2008-10-07 16:14:11 +00:00