07d53b1d33
Rename LoadX to LoadExt.
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llvm-svn: 57526
2008-10-14 21:26:46 +00:00
b7c01f5f48
Update ARM Insn encoding to get endian-ness to match the documentation (31-0 left to right)
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llvm-svn: 57524
2008-10-14 20:36:24 +00:00
9c4b7d5c4f
Fix command-line option printing to print two spaces where needed,
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instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.
llvm-svn: 57521
2008-10-14 20:25:08 +00:00
2753955fc0
Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as
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parameters instead of raw Constants. This prevents the constants from
being selected by the isel pass, fixing PR2735.
llvm-svn: 57385
2008-10-11 22:08:30 +00:00
d83529e8c4
Comment to be explicit that the enumeration values for CondCodes matter.
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llvm-svn: 57295
2008-10-08 16:24:35 +00:00
f311fe142c
Unconditional branch instruction encoding fix. Needs to use ABI, not AXI, to get the proper opcode bits.
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llvm-svn: 57262
2008-10-07 21:08:09 +00:00
b53acd8caa
need ARM.h for ARMCC definition
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llvm-svn: 57261
2008-10-07 21:01:51 +00:00
c084e84028
Encode the conditional execution predicate when JITing.
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llvm-svn: 57258
2008-10-07 19:05:35 +00:00
2fb5c3938b
Clarify naming and correct conditional so that CMP and CMN instructions get the Rn operand encoded properly
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llvm-svn: 57252
2008-10-07 17:42:09 +00:00
1d54d4f375
Fix Opcode values of CMP and CMN
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llvm-svn: 57251
2008-10-07 17:40:46 +00:00
d2aded08ac
Fix weird think-o and unbreak build on all gcc-3.4.x-based platforms (e.g. mingw)
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llvm-svn: 57106
2008-10-05 08:53:29 +00:00
2c836cf187
Avoid creating two TargetLowering objects for each target.
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Instead, just create one, and make sure everything that needs
it can access it. Previously most of the SelectionDAGISel
subclasses all had their own TargetLowering object, which was
redundant with the TargetLowering object in the TargetMachine
subclasses, except on Sparc, where SparcTargetMachine
didn't have a TargetLowering object. Change Sparc to work
more like the other targets here.
llvm-svn: 57016
2008-10-03 16:55:19 +00:00
332ad5e016
Indexing off by one resulted in errant encoding of source register for
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reg->reg moves.
llvm-svn: 57011
2008-10-03 15:53:56 +00:00
af929abc01
NeedStub/DoesntNeedStub logic was reversed, leading to not using a stub
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for global relocations that do need them (libc calls, for example).
llvm-svn: 57010
2008-10-03 15:52:42 +00:00
0d1e9a8e04
Switch the MachineOperand accessors back to the short names like
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isReg, etc., from isRegister, etc.
llvm-svn: 57006
2008-10-03 15:45:36 +00:00
3dc0a3bce3
Fix typo s/ther/there/
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llvm-svn: 56924
2008-10-01 18:16:49 +00:00
08d91178e9
Rename isWeakForLinker to mayBeOverridden. Use it
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instead of hasWeakLinkage in a bunch of optimization
passes.
llvm-svn: 56782
2008-09-29 11:25:42 +00:00
3774b2f292
Re-apply 56683 with fixes.
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llvm-svn: 56748
2008-09-27 01:56:22 +00:00
c966a737c5
Temporarily reverting r56683. This is causing a failure during the build of llvm-gcc:
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/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/xgcc -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.obj/./gcc/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/bin/ -B/Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/lib/ -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/include -isystem /Volumes/Gir/devel/llvm/clean/llvm-gcc.install/i386-apple-darwin9.5.0/sys-include -mmacosx-version-min=10.4 -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wwrite-strings -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fPIC -pipe -g -DHAVE_GTHR_DEFAULT -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED -I. -I. -I../../llvm-gcc.src/gcc -I../../llvm-gcc.src/gcc/. -I../../llvm-gcc.src/gcc/../include -I./../intl -I../../llvm-gcc.src/gcc/../libcpp/include -I../../llvm-gcc.src/gcc/../libdecnumber -I../libdecnumber -I/Volumes/Gir/devel/llvm/clean/llvm.obj/include -I/Volumes/Gir/devel/llvm/clean/llvm.src/include -fexceptions -fvisibility=hidden -DHIDE_EXPORTS -c ../../llvm-gcc.src/gcc/unwind-dw2-fde-darwin.c -o libgcc/./unwind-dw2-fde-darwin.o
Assertion failed: (TargetRegisterInfo::isVirtualRegister(regA) && TargetRegisterInfo::isVirtualRegister(regB) && "cannot update physical register live information"), function runOnMachineFunction, file /Volumes/Gir/devel/llvm/clean/llvm.src/lib/CodeGen/TwoAddressInstructionPass.cpp, line 311.
../../llvm-gcc.src/gcc/unwind-dw2.c:1527: internal compiler error: Abort trap
Please submit a full bug report,
with preprocessed source if appropriate.
See <URL:http://developer.apple.com/bugreporter > for instructions.
{standard input}:3521:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
{standard input}:3521:symbol: "_dwarf_reg_size_table" can't be undefined in a subtraction expression
{standard input}:3520:non-relocatable subtraction expression, "_dwarf_reg_size_table" minus "L20$pb"
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llvm-svn: 56703
2008-09-26 22:10:44 +00:00
d77cbe8947
Fix @llvm.frameaddress codegen. FP elimination optimization should be disabled when frame address is desired. Also add support for depth > 0.
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llvm-svn: 56683
2008-09-26 19:48:35 +00:00
0e32a2c935
Add "inreg" field to CallSDNode (doesn't increase
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its size). Adjust various lowering functions to
pass this info through from CallInst. Use it to
implement sseregparm returns on X86. Remove
X86_ssecall calling convention.
llvm-svn: 56677
2008-09-26 19:31:26 +00:00
cdc95498f5
CMake: Builds all targets.
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llvm-svn: 56641
2008-09-26 04:40:32 +00:00
87001fd6fd
Reapply 56585:56589 with proper fix for some gcc versions
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llvm-svn: 56621
2008-09-25 21:00:33 +00:00
84301390ae
Temporarily backing out 56585:56589 to unbreak the build.
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llvm-svn: 56607
2008-09-25 07:38:08 +00:00
a9163feefe
Get rid of virtual inheritance for ARM TAI
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llvm-svn: 56587
2008-09-24 22:22:27 +00:00
8e7b93938d
Get rid of ReadOnlySection duplicate
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llvm-svn: 56582
2008-09-24 22:20:27 +00:00
5906234c1d
Get rid of now unused {Four,Eight,Sixteen}ByteConstantSection
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llvm-svn: 56580
2008-09-24 22:18:54 +00:00
22db30548d
Get rid of duplicate char*/Section* stuff for TLS sections
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llvm-svn: 56577
2008-09-24 22:17:06 +00:00
7497762606
Get rid of duplicate char*/Section* DataSection
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llvm-svn: 56575
2008-09-24 22:16:16 +00:00
076e905b94
Move actual section printing stuff to AsmPrinter from TAI reducing heap traffic.
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llvm-svn: 56573
2008-09-24 22:14:23 +00:00
69ff51baa0
Drop obsolete hook and change all usage to new interface
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llvm-svn: 56572
2008-09-24 22:13:07 +00:00
ed1cf1a8f1
Fix these enums' starting values to reflect the way that
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instruction opcodes are now numbered. No functionality change.
llvm-svn: 56497
2008-09-23 18:42:32 +00:00
7a74e71489
Make log, log2, log10, exp, exp2 use Expand by
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default.
llvm-svn: 56471
2008-09-22 21:57:32 +00:00
933b392f65
Duh. Default to ARMCC::AL (always).
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llvm-svn: 56301
2008-09-18 07:28:19 +00:00
5e3ac187d9
Clean up.
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llvm-svn: 56300
2008-09-18 07:27:23 +00:00
bc0d0eccf3
Cosmetic.
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llvm-svn: 56299
2008-09-18 07:24:33 +00:00
7848cfcd77
Fix addrmode1 instruction encodings; fix bx_ret encoding.
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llvm-svn: 56277
2008-09-17 07:53:38 +00:00
937569afe3
Specify instruction encoding using range list to avoid endianess issues.
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llvm-svn: 56276
2008-09-17 07:16:21 +00:00
24c79f28b1
Reverting r56249. On further investigation, this functionality isn't needed.
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Apologies for the thrashing.
llvm-svn: 56251
2008-09-16 21:48:12 +00:00
8bc392fb1d
- Change "ExternalSymbolSDNode" to "SymbolSDNode".
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- Add linkage to SymbolSDNode (default to external).
- Change ISD::ExternalSymbol to ISD::Symbol.
- Change ISD::TargetExternalSymbol to ISD::TargetSymbol
These changes pave the way to allowing SymbolSDNodes with non-external linkage.
llvm-svn: 56249
2008-09-16 21:12:30 +00:00
38453eebdc
Remove isImm(), isReg(), and friends, in favor of
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isImmediate(), isRegister(), and friends, to avoid confusion
about having two different names with the same meaning. I'm
not attached to the longer names, and would be ok with
changing to the shorter names if others prefer it.
llvm-svn: 56189
2008-09-13 17:58:21 +00:00
a5804effed
Fix random abort.
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llvm-svn: 56184
2008-09-13 01:55:59 +00:00
d3fe174c53
Define CallSDNode, an SDNode subclass for use with ISD::CALL.
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Currently it just holds the calling convention and flags
for isVarArgs and isTailCall.
And it has several utility methods, which eliminate magic
5+2*i and similar index computations in several places.
CallSDNodes are not CSE'd. Teach UpdateNodeOperands to handle
nodes that are not CSE'd gracefully.
llvm-svn: 56183
2008-09-13 01:54:27 +00:00
380482ac46
Typo.
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llvm-svn: 56182
2008-09-13 01:44:01 +00:00
ba28161103
Rely on instruction format to determine so_reg operand for now.
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llvm-svn: 56181
2008-09-13 01:38:29 +00:00
12134701ec
Revert 56176. All those instruction formats are still needed.
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llvm-svn: 56180
2008-09-13 01:35:33 +00:00
db6571a2c7
Accidentially flipped the condition.
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llvm-svn: 56179
2008-09-13 01:29:57 +00:00
25a39094f8
Add debug dumps.
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llvm-svn: 56178
2008-09-13 01:15:21 +00:00
c5c74f36fd
Eliminate unnecessary instruction formats.
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llvm-svn: 56176
2008-09-12 23:15:39 +00:00
d1424c4eca
Addrmode 1 S bit can be dynamically set. Look for CPSR def.
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llvm-svn: 56172
2008-09-12 22:45:55 +00:00
Evan Cheng