7 Commits

Author	SHA1	Message	Date
David Green	5805521207	[ARM] Simplify VMOVRRD from extracts of buildvectors ... Under the softfp calling convention, we are often left with VMOVRRD(extract(bitcast(build_vector(a, b, c, d)))) for the return value of the function. These can be simplified to a,b or c,d directly, depending on the value of the extract. Big endian is a little different because the bitcast switches the lanes around, meaning we end up with b,a or d,c. Differential Revision: https://reviews.llvm.org/D94989	2021-02-01 16:09:25 +00:00
Simon Pilgrim	e4d12bb2d6	[DAGCombiner] Call SimplifyDemandedVectorElts from EXTRACT_VECTOR_ELT ... If we are only extracting vector elements via EXTRACT_VECTOR_ELT(s) we may be able to use SimplifyDemandedVectorElts to avoid unnecessary vector ops. Differential Revision: https://reviews.llvm.org/D49262 llvm-svn: 337258	2018-07-17 09:45:35 +00:00
Simon Pilgrim	a39389ebff	[ARM] Regenerated arg endian test ... As requested on D49262 llvm-svn: 336980	2018-07-13 09:16:56 +00:00
Justin Bogner	7833d9facb	test/CodeGen: Check that the correct register is used in a store ... This tightens up r208351 to ensure that a store is fed with the correct value. Thanks to Quentin Colombet for spotting this! llvm-svn: 208368	2014-05-08 22:45:07 +00:00
Justin Bogner	1de42075fc	Make a CodeGen test more robust against vector register selection ... llvm-svn: 208351	2014-05-08 18:53:56 +00:00
Saleem Abdulrasool	39a939d7d2	test: fix test on Windows ... When building on Windows, the default target is Windows. Windows on ARM does not support ARM mode compilation, resulting in test failures. Simply specify a triple to ensure that we are testing the correct behaviour. llvm-svn: 208340	2014-05-08 17:11:29 +00:00
Christian Pirker	b5728191c2	ARM big endian function argument passing ... llvm-svn: 208316	2014-05-08 14:06:24 +00:00