3d9407f4eb
Revert commit 131534 since it seems to have broken several buildbots.
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Original log entry:
Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
code in one place.
llvm-svn: 131536
2011-05-18 14:57:56 +00:00
c5c27ede55
Refactor getActionType and getTypeToTransformTo ; place all of the 'decision'
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code in one place.
llvm-svn: 131534
2011-05-18 12:26:38 +00:00
e9692808b7
Make fast-isel miss counting in -stats and -fast-isel-verbose take terminators into account; since there are many fewer isel misses with recent changes, misses caused by terminators are more significant.
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llvm-svn: 131502
2011-05-17 23:02:10 +00:00
abffc991dc
Misc. code cleanups.
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llvm-svn: 131497
2011-05-17 22:22:52 +00:00
4298df6d86
Misc. code cleanups.
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llvm-svn: 131495
2011-05-17 22:20:36 +00:00
d282f46c6b
Delete unused variables.
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llvm-svn: 131430
2011-05-16 22:19:54 +00:00
d4d12d14b5
Trim #includes.
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llvm-svn: 131429
2011-05-16 22:14:50 +00:00
ae9b1685a8
Fix whitespace and 80-column violations.
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llvm-svn: 131428
2011-05-16 22:09:53 +00:00
e85c0dde7a
Track how many insns fast-isel successfully selects as well as how many it
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misses.
llvm-svn: 131426
2011-05-16 21:51:07 +00:00
8e60ff11db
Preserve debug info for unused zero extended boolean argument.
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Radar 9422775.
llvm-svn: 131422
2011-05-16 21:24:05 +00:00
a4d4a0162d
Make fast-isel work correctly s/uadd.with.overflow intrinsics.
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llvm-svn: 131420
2011-05-16 21:06:17 +00:00
4c08bb450a
Fix silly typo.
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llvm-svn: 131419
2011-05-16 20:34:53 +00:00
9ac944774f
Basic fast-isel of extractvalue. Not too helpful on its own, given the IR clang generates for cases like this, but it should become more useful soon.
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llvm-svn: 131417
2011-05-16 20:27:46 +00:00
2050af838d
Don't do tail calls in a function that call setjmp. The stack might be
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corrupted when setjmp returns again.
llvm-svn: 131399
2011-05-16 03:05:33 +00:00
8f1e11cde9
Fix a FIXME by moving the fast-isel implementation of the objectsize intrinsic from the x86 code to the generic code.
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llvm-svn: 131332
2011-05-14 00:47:51 +00:00
e53b7d1a11
Make codegen able to handle values of empty types. This is one way
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to fix PR9900. I will keep it open until sable is able to comment on it.
llvm-svn: 131294
2011-05-13 15:18:06 +00:00
aa02c0847d
Since I can't reproduce the failures from 131261, re-trying with a
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simplified version. <rdar://problem/9298790>
llvm-svn: 131274
2011-05-13 00:51:54 +00:00
8d57d8ea64
Revert 131266 and 131261 due to buildbot complaints.
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rdar://problem/9298790
llvm-svn: 131269
2011-05-13 00:15:17 +00:00
89f1b47e3a
Non-fast-isel followup to 129634; correctly handle branches controlled
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by non-CMP expressions. The executable test case (129821) would test
this as well, if we had an "-O0 -disable-arm-fast-isel" LLVM-GCC
tester. Alas, the ARM assembly would be very difficult to check with
FileCheck.
The thumb2-cbnz.ll test is affected; it generates larger code (tst.w
vs. cmp #0 ), but I believe the new version is correct.
rdar://problem/9298790
llvm-svn: 131261
2011-05-12 23:36:41 +00:00
8a7beb80f0
Fixes a bug in the DAGCombiner. LoadSDNodes have two values (data, chain).
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If there is a store after the load node, then there is a chain, which means
that there is another user. Thus, asking hasOneUser would fail. Instead we
ask hasNUsesOfValue on the 'data' value.
llvm-svn: 131183
2011-05-11 14:40:50 +00:00
50117f8186
Give the 'eh.sjlj.dispatchsetup' intrinsic call the value coming from the setjmp
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intrinsic call. This prevents it from being reordered so that it appears
*before* the setjmp intrinsic (thus making it completely useless).
<rdar://problem/9409683>
llvm-svn: 131174
2011-05-11 01:11:55 +00:00
768de0a0f8
Disable my little CopyToReg argument hack with fast-isel. rdar://problem/9413587 .
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llvm-svn: 131156
2011-05-10 21:50:58 +00:00
999fa3bf1f
Correctly walk through nested and adjacent CALLSEQ_START nodes. No
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test case; I've only seen this on a release branch, and I can't get it
to reproduce on trunk. rdar://problem/7662569
llvm-svn: 131152
2011-05-10 21:20:03 +00:00
4480428474
Look through struct wrapped types for inline asm statments.
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Patch by Evan Cheng.
llvm-svn: 131093
2011-05-09 20:04:43 +00:00
6be291a2cd
Indent properly, no functionality change.
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llvm-svn: 131082
2011-05-09 08:03:33 +00:00
d26fc5e013
80 col violations.
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llvm-svn: 131015
2011-05-06 20:52:23 +00:00
2518f8376d
Make the logic for determining function alignment more explicit. No functionality change.
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llvm-svn: 131012
2011-05-06 20:34:06 +00:00
7a78f66145
Use array_lengthof. No functional change.
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llvm-svn: 131008
2011-05-06 19:50:10 +00:00
68b6b0efb0
Allow FastISel of three-register-operand instructions.
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llvm-svn: 130934
2011-05-05 17:59:04 +00:00
441a01a2b8
Avoid extra vreg copies for arguments passed in registers. Specifically, this can make MachineCSE more effective in some cases (especially in small functions). PR8361 / part of rdar://problem/8259436 .
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llvm-svn: 130928
2011-05-05 16:53:34 +00:00
fd8c6adffb
Small syntax cleanup; we don't need to #define constants in C++. No functionality change intended.
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llvm-svn: 130926
2011-05-05 16:25:23 +00:00
66fd073974
Other parts of the SelectionDAG framework assume that targets use their pointer type for vector indices. Make the vector unrolling code respect that.
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llvm-svn: 130733
2011-05-02 22:25:45 +00:00
4105ed1523
Make FastEmit_ri_ try a bit harder to succeed for supported operations; FastEmit_i can fail for non-Thumb2 ARM. Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM.
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llvm-svn: 130560
2011-04-29 23:34:52 +00:00
33c133919a
Fix a silly mistake in r130338.
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llvm-svn: 130360
2011-04-28 00:42:03 +00:00
406c471b69
Make the fast-isel code for literal 0.0 a bit shorter/faster, since 0.0 is common. rdar://problem/9303592 .
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llvm-svn: 130338
2011-04-27 22:41:55 +00:00
121d27e9e4
Remove unused function.
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llvm-svn: 130337
2011-04-27 22:21:02 +00:00
1355bbdd11
Be careful about scheduling nodes above previous calls. It increase usages of
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more callee-saved registers and introduce copies. Only allows it if scheduling
a node above calls would end up lessen register pressure.
Call operands also has added ABI restrictions for register allocation, so be
extra careful with hoisting them above calls.
rdar://9329627
llvm-svn: 130245
2011-04-26 21:31:35 +00:00
7da91aee83
Fast-isel support for simple inline asms.
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llvm-svn: 130205
2011-04-26 17:18:34 +00:00
2f64754031
Fix typo
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llvm-svn: 130190
2011-04-26 04:57:37 +00:00
734f2218ac
A dbg.declare may not be in entry block, even if it is referring to an incoming argument. However, It is appropriate to emit DBG_VALUE referring to this incoming argument in entry block in MachineFunction.
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llvm-svn: 130129
2011-04-25 16:33:52 +00:00
1a180156b6
Remove unused STL header includes.
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llvm-svn: 130068
2011-04-23 19:53:52 +00:00
dd450b86cf
Teach FastISel to deal with instructions that have two immediate operands.
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llvm-svn: 130033
2011-04-22 23:38:06 +00:00
6d277517d1
Recommit the fix for rdar://9289512 with a couple tweaks to
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fix bugs exposed by the gcc dejagnu testsuite:
1. The load may actually be used by a dead instruction, which
would cause an assert.
2. The load may not be used by the current chain of instructions,
and we could move it past a side-effecting instruction. Change
how we process uses to define the problem away.
llvm-svn: 130018
2011-04-22 21:59:37 +00:00
341c11da3b
DAGCombine: fold "(zext x) == C" into "x == (trunc C)" if the trunc is lossless.
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On x86 this allows to fold a load into the cmp, greatly reducing register pressure.
movzbl (%rdi), %eax
cmpl $47, %eax
->
cmpb $47, (%rdi)
This shaves 8k off gcc.o on i386. I'll leave applying the patch in README.txt to Chris :)
llvm-svn: 130005
2011-04-22 18:47:44 +00:00
6309828206
Revert r1296656, "Fix rdar://9289512 - not folding load into compare at -O0...",
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which broke a couple GCC test suite tests at -O0.
llvm-svn: 129914
2011-04-21 16:14:46 +00:00
bcaedb5ce0
Rewrite the expander for umulo/smulo to remember to sign extend the input
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manually and pass all (now) 4 arguments to the mul libcall. Add a new
ExpandLibCall for just this (copied gratuitously from type legalization).
Fixes rdar://9292577
llvm-svn: 129842
2011-04-20 01:19:45 +00:00
468086d5e1
Delete unnecessary variable. <rdar://problem/7662569>
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llvm-svn: 129796
2011-04-19 20:09:38 +00:00
bcd09b3a7f
SelectBasicBlock is rather slow even when it doesn't do anything; skip the
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unnecessary work where possible.
llvm-svn: 129763
2011-04-19 17:01:08 +00:00
0b68c1219f
Support nested CALLSEQ_BEGIN/END; necessary for ARM byval support. <rdar://problem/7662569>
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llvm-svn: 129761
2011-04-19 16:16:58 +00:00
91328b317b
Implement support for x86 fastisel of small fixed-sized memcpys, which are generated
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en-mass for C++ PODs. On my c++ test file, this cuts the fast isel rejects by 10x
and shrinks the generated .s file by 5%
llvm-svn: 129755
2011-04-19 05:52:03 +00:00
Duncan Sands