Commit Graph

48 Commits

Author SHA1 Message Date
Johnny Chen 8e8f1c133a Cleaned up the for-disassembly-only entries in the arm instruction table so that
the memory barrier variants (other than 'SY' full system domain read and write)
are treated as one instruction with option operand.

llvm-svn: 110951
2010-08-12 20:46:17 +00:00
Bob Wilson add513112a Move the ARM SSAT and USAT optional shift amount operand out of the
instruction opcode.  This also fixes part of PR7792.

llvm-svn: 110875
2010-08-11 23:10:46 +00:00
Bob Wilson 97886d59d1 ARM "rrx" shift operands do not have an immediate. PR7790.
llvm-svn: 110292
2010-08-05 00:34:42 +00:00
Bob Wilson 0b9aafddc5 Remove restriction on NEON alignment values. Some of the NEON ld/st
instructions use different values (e.g., 2-byte or 4-byte alignment).
Also fix ARMInstPrinter to print these alignments as bits instead of bytes.

llvm-svn: 108386
2010-07-14 23:54:43 +00:00
Bob Wilson c1c6f4796e Move NEON "modified immediate" encode/decode into ARMAddressingModes.h to
avoid replicated code.

llvm-svn: 108227
2010-07-13 04:44:34 +00:00
Bob Wilson 771d04b969 Fix incorrect asm-printing of some NEON immediates. Fix weak testcase so
that it checks the immediate values, not just the instructions opcodes.
Radar 8110263.

llvm-svn: 107487
2010-07-02 17:23:44 +00:00
Bob Wilson 6eae520de9 Add instruction encoding for the Neon VMOV immediate instruction. This changes
the machine instruction representation of the immediate value to be encoded
into an integer with similar fields as the actual VMOV instruction.  This makes
things easier for the disassembler, since it can just stuff the bits into the
immediate operand, but harder for the asm printer since it has to decode the
value to be printed.  Testcase for the encoding will follow later when MC has
more support for ARM.

llvm-svn: 105836
2010-06-11 21:34:50 +00:00
Jakob Stoklund Olesen 6c47d6423c Switch ARMRegisterInfo.td to use SubRegIndex and eliminate the parallel enums
from ARMRegisterInfo.h

llvm-svn: 104508
2010-05-24 16:54:32 +00:00
Rafael Espindola b69c7b76f1 Add support for movi32 of global values to the new (MC) asm printer.
llvm-svn: 103576
2010-05-12 05:16:34 +00:00
Johnny Chen b90b6f1a35 Fixed a bug in DisassembleN1RegModImmFrm() where a break stmt was missing for a
case.  Also, the 0xFF hex literal involved in the shift for ESize64 should be
suffixed "ul" to preserve the shift result.

Implemented printHex*ImmOperand() by copying from ARMAsmPrinter.cpp and added a
test case for DisassembleN1RegModImmFrm()/printHex64ImmOperand().

llvm-svn: 101557
2010-04-16 22:40:20 +00:00
Johnny Chen 2b7aba10c2 In the same spirit of r101524, which removed the assert() from printAddrMode2OffsetOperand(),
this patch removes the assert() from printAddrMode3OffsetOperand() and adds a test case.

llvm-svn: 101529
2010-04-16 19:57:21 +00:00
Johnny Chen 88599a42bb Remove the assert() from printAddrMode2OffsetOperand(). "#0 and #-0" are
considered legal instructions.

Refs: A8.6.51 LDC, LDC2 (immediate) -- page A8-107, A8.6.58 LDR (immediate, ARM)
-- page A8-121, and A8.6.194 STR (immediate, ARM) -- page A8-395.

llvm-svn: 101524
2010-04-16 19:10:52 +00:00
Bob Wilson af7674cbd4 Replace r101053 with a fix for getSOImmValRotate() so that it will correctly
recognize all the valid rotated immediates.  This fixes the disassembler
issue and will also help codegen for some unusual constant values.

llvm-svn: 101114
2010-04-13 02:11:48 +00:00
Johnny Chen fc93503c59 Fixed a crasher in arm disassembler within ARMInstPrinter.cpp after calling
ARM_AM::getSoImmVal(V) with a legitimate so_imm value: #245 rotate right by 2.
Introduce ARM_AM::getSOImmValOneOrNoRotate(unsigned Arg) which is called from
ARMInstPrinter.cpp's printSOImm() function, replacing ARM_AM::getSOImmVal(V).

[12:44:43] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ gdb Debug/bin/llvm-mc
GNU gdb 6.3.50-20050815 (Apple version gdb-1346) (Fri Sep 18 20:40:51 UTC 2009)
Copyright 2004 Free Software Foundation, Inc.
GDB is free software, covered by the GNU General Public License, and you are
welcome to change it and/or distribute copies of it under certain conditions.
Type "show copying" to see the conditions.
There is absolutely no warranty for GDB.  Type "show warranty" for details.
This GDB was configured as "x86_64-apple-darwin"...Reading symbols for shared libraries ... done

(gdb) set args  -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble
(gdb) r
Starting program: /Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble
Reading symbols for shared libraries ++. done
0xf5 0x71 0xf0 0x53
Opcode=201 Name=MVNi Format=ARM_FORMAT_DPFRM(4)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 0: 1: 0: 1| 0: 0: 1: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 1: 1: 1| 0: 0: 0: 1| 1: 1: 1: 1| 0: 1: 0: 1|
-------------------------------------------------------------------------------------------------

	mvnpls	r7, Assertion failed: (V != -1 && "Not a valid so_imm value!"), function printSOImm, file ARMInstPrinter.cpp, line 229.

Program received signal SIGABRT, Aborted.
0x00007fff88c65886 in __kill ()
(gdb) bt
#0  0x00007fff88c65886 in __kill ()
#1  0x00007fff88d05eae in abort ()
#2  0x00007fff88cf2ef0 in __assert_rtn ()
#3  0x000000010020e422 in printSOImm (O=@0x1010bdf80, V=-1, VerboseAsm=false, MAI=0x1020106d0) at ARMInstPrinter.cpp:229
#4  0x000000010020e5fe in llvm::ARMInstPrinter::printSOImmOperand (this=0x1020107e0, MI=0x7fff5fbfee70, OpNum=1, O=@0x1010bdf80) at ARMInstPrinter.cpp:254
#5  0x00000001001ffbc0 in llvm::ARMInstPrinter::printInstruction (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMGenAsmWriter.inc:3236
#6  0x000000010020c27c in llvm::ARMInstPrinter::printInst (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMInstPrinter.cpp:182
#7  0x000000010003cbff in PrintInsts (DisAsm=@0x10200f4e0, Printer=@0x1020107e0, Bytes=@0x7fff5fbff060, SM=@0x7fff5fbff078) at Disassembler.cpp:65
#8  0x000000010003c8b4 in llvm::Disassembler::disassemble (T=@0x1010c13c0, Triple=@0x1010b6798, Buffer=@0x102010690) at Disassembler.cpp:153
#9  0x000000010004095c in DisassembleInput (ProgName=0x7fff5fbff3f0 "/Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc") at llvm-mc.cpp:347
#10 0x000000010003eefb in main (argc=4, argv=0x7fff5fbff298) at llvm-mc.cpp:374
(gdb) q
The program is running.  Exit anyway? (y or n) y
[13:36:26] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ 

llvm-svn: 101053
2010-04-12 18:46:53 +00:00
Chris Lattner 7012916275 fix an ugly wart in the MCInstPrinter api where the
raw_ostream to print an instruction to had to be specified
at MCInstPrinter construction time instead of being able
to pick at each call to printInstruction.

llvm-svn: 100307
2010-04-04 05:04:31 +00:00
Chris Lattner 76c564b1bb change a ton of code to not implicitly use the "O" raw_ostream
member of AsmPrinter.  Instead, pass it in explicitly.

llvm-svn: 100306
2010-04-04 04:47:45 +00:00
Bob Wilson ae08a736d6 Re-commit r98683 ("remove redundant writeback flag from ARM address mode 6")
with changes to add a separate optional register update argument.  Change all
the NEON instructions with address register writeback to use it.

llvm-svn: 99095
2010-03-20 22:13:40 +00:00
Daniel Dunbar 857955243e Fix -Asserts warnings.
llvm-svn: 98928
2010-03-19 03:18:23 +00:00
Johnny Chen 8f3004cff2 Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
instructions to help disassembly.

We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>.  See, for example, A8.6.57/58/60.

And modified test cases to not expect '+' in +reg or #+num.  For example,

; CHECK:       ldr.w	r9, [r7, #28]

llvm-svn: 98745
2010-03-17 17:52:21 +00:00
Bob Wilson c7ba918b84 Revert 98683. It is breaking something in the disassembler.
llvm-svn: 98692
2010-03-16 23:01:13 +00:00
Bob Wilson c953bca10b Remove redundant writeback flag from ARM address mode 6. Also remove the
optional register update argument, which is currently unused -- when we add
support for that, it can just be a separate operand.

llvm-svn: 98683
2010-03-16 21:44:40 +00:00
Bob Wilson 466d1e3dc2 Remove redundant writeback flag in ARM addressing mode 5.
llvm-svn: 98648
2010-03-16 18:38:09 +00:00
Bob Wilson d6243b49d4 Remove the writeback flag from ARM's address mode 4. Now that we have separate
instructions for ld/st with writeback, the flag is completely redundant.

llvm-svn: 98643
2010-03-16 17:46:45 +00:00
Bob Wilson ceda0780f9 Fix unused variable warnings.
llvm-svn: 98642
2010-03-16 17:44:45 +00:00
Bob Wilson 1b4e8cc69c --- Reverse-merging r98637 into '.':
U    test/CodeGen/ARM/tls2.ll
U    test/CodeGen/ARM/arm-negative-stride.ll
U    test/CodeGen/ARM/2009-10-30.ll
U    test/CodeGen/ARM/globals.ll
U    test/CodeGen/ARM/str_pre-2.ll
U    test/CodeGen/ARM/ldrd.ll
U    test/CodeGen/ARM/2009-10-27-double-align.ll
U    test/CodeGen/Thumb2/thumb2-strb.ll
U    test/CodeGen/Thumb2/ldr-str-imm12.ll
U    test/CodeGen/Thumb2/thumb2-strh.ll
U    test/CodeGen/Thumb2/thumb2-ldr.ll
U    test/CodeGen/Thumb2/thumb2-str_pre.ll
U    test/CodeGen/Thumb2/thumb2-str.ll
U    test/CodeGen/Thumb2/thumb2-ldrh.ll
U    utils/TableGen/TableGen.cpp
U    utils/TableGen/DisassemblerEmitter.cpp
D    utils/TableGen/RISCDisassemblerEmitter.h
D    utils/TableGen/RISCDisassemblerEmitter.cpp
U    Makefile.rules
U    lib/Target/ARM/ARMInstrNEON.td
U    lib/Target/ARM/Makefile
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
D    lib/Target/ARM/Disassembler
U    lib/Target/ARM/ARMInstrFormats.td
U    lib/Target/ARM/ARMAddressingModes.h
U    lib/Target/ARM/Thumb2ITBlockPass.cpp

llvm-svn: 98640
2010-03-16 16:59:47 +00:00
Johnny Chen 3d9327bd06 Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend
(RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
instructions to help disassembly.

We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>.  See, for example, A8.6.57/58/60.

And modified test cases to not expect '+' in +reg or #+num.  For example,

; CHECK:       ldr.w	r9, [r7, #28]

llvm-svn: 98637
2010-03-16 16:36:54 +00:00
Bob Wilson 298a83ecfe Stop using the old pre-UAL syntax for LDM/STM instruction suffixes.
This does not move entirely to UAL syntax, since the default "increment after"
suffix is empty but we still use "IA" for that.

llvm-svn: 98635
2010-03-16 16:19:07 +00:00
Johnny Chen 0dae1cbf1c AL is an optional mnemonic extension for always, except in IT instructions.
Add printMandatoryPredicateOperand() PrintMethod for IT predicate printing.

Ref: A8.3 Conditional execution
llvm-svn: 97571
2010-03-02 17:57:15 +00:00
Chris Lattner 41ad1905c9 sink handling of target-independent machine instrs (other
than DEBUG_VALUE :(  ) into the target indep AsmPrinter.cpp
file.   This allows elimination of the 
NO_ASM_WRITER_BOILERPLATE hack among other things.

llvm-svn: 95177
2010-02-03 01:00:52 +00:00
Johnny Chen ab2b1a7aeb Implemented ARMInstPrinter::printThumbS4ImmOperand().
llvm-svn: 94457
2010-01-25 22:13:10 +00:00
Chris Lattner c8f7717808 remove the MAI argument to MCExpr::print and switch overthing to use << when printing them.
llvm-svn: 93699
2010-01-18 00:37:40 +00:00
Evan Cheng b18525937c More consistent thumb1 asm printing.
llvm-svn: 89328
2009-11-19 06:57:41 +00:00
Jim Grosbach d7cf55cd0e Use Unified Assembly Syntax for the ARM backend.
llvm-svn: 86494
2009-11-09 00:11:35 +00:00
Daniel Dunbar a470eac6a1 Fix -Asserts warning.
llvm-svn: 84687
2009-10-20 22:10:05 +00:00
Chris Lattner 9351e4f4b2 implement some more easy hooks.
llvm-svn: 84614
2009-10-20 06:22:33 +00:00
Chris Lattner 60d5131653 Implement some hooks, make printOperand abort if unknown modifiers are
present.

llvm-svn: 84613
2009-10-20 06:15:28 +00:00
Chris Lattner 85ab670644 add supprort for the 'sbit' operand, MOVi apparently has one.
llvm-svn: 84577
2009-10-20 00:46:11 +00:00
Chris Lattner 19c52201bd add support for instruction predicates.
llvm-svn: 84575
2009-10-20 00:42:49 +00:00
Chris Lattner 2f69ed8f4c implement printSORegOperand, add lowering for the nasty and despicable MOVi2pieces :)
llvm-svn: 84573
2009-10-20 00:40:56 +00:00
Chris Lattner bd531262f8 handle addmode4 modifiers, fix a fixme in printRegisterList
by ignoring all implicit regs when lowering.

llvm-svn: 84566
2009-10-19 23:31:43 +00:00
Chris Lattner 186c6b0834 lower the ARM::CONSTPOOL_ENTRY pseudo op, giving us constant pool entries
like:

@ BB#1:
	.align	2
LCPI1_0:
	.long	L_.str-(LPC0+8)

Note that proper indentation of the label :)

llvm-svn: 84558
2009-10-19 22:33:05 +00:00
Chris Lattner add5749ac8 add MCInstLower support for lowering ARM::PICADD, a pseudo op for pic stuffola.
llvm-svn: 84553
2009-10-19 22:23:04 +00:00
Chris Lattner ef2979b1da add register list and hacked up addrmode #4 support, we now get this:
_main:
	stmsp! sp!, {r7, lr}
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, [sp]
	ldr r0, LCPI1_0
	bl _printf
	ldr r0, [sp]
	mov sp, r7
	ldmsp! sp!, {r7, pc}

Note the unhappy ldm/stm because of modifiers being ignored.

llvm-svn: 84546
2009-10-19 22:09:23 +00:00
Chris Lattner 7ddfdc4133 add addrmode2 support, getting us up to:
_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, [sp]
	ldr r0, LCPI1_0
	bl _printf
	ldr r0, [sp]
	mov sp, r7
	ldm , 

llvm-svn: 84543
2009-10-19 21:57:05 +00:00
Chris Lattner 889a6217fa add jump tables, constant pools and some trivial global
lowering stuff.  We can now compile hello world to:

_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, 
	ldr r0, 
	bl _printf
	ldr r0, 
	mov sp, r7
	ldm , 

Almost looks like arm code :)

llvm-svn: 84542
2009-10-19 21:53:00 +00:00
Chris Lattner 89d47205b5 add printing support for SOImm operands, getting us to:
_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, 

llvm-svn: 84535
2009-10-19 21:21:39 +00:00
Chris Lattner 93e3ef6536 wire up some basic printOperand goodness, giving us stuff like this before
we abort:

_main:
	stm , 
	mov r7, sp
	sub sp, sp, 
	mov r0, 
	str r0, 

llvm-svn: 84532
2009-10-19 20:59:55 +00:00
Chris Lattner a290778859 stub out a minimal ARMInstPrinter.
llvm-svn: 84527
2009-10-19 19:56:26 +00:00