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71 Commits

Author SHA1 Message Date
Simon Pilgrim 313dc85ce0 [X86][SSE] Auto upgrade PADDS/PSUBS intrinsics to SADD_SAT/SSUB_SAT generic intrinsics (clang) 
This emits SADD_SAT/SSUB_SAT generic intrinsics for the SSE signed saturated math intrinsics.

LLVM counterpart: https://reviews.llvm.org/D55894

Differential Revision: https://reviews.llvm.org/D55890

llvm-svn: 349743
 2018-12-20 11:53:45 +00:00
Simon Pilgrim a7b30b4a58 [X86][SSE] Auto upgrade PADDUS/PSUBUS intrinsics to UADD_SAT/USUB_SAT generic intrinsics (clang) 
Sibling patch to D55855, this emits UADD_SAT/USUB_SAT generic intrinsics for the SSE saturated math intrinsics instead of expanding to a IR code sequence that could be difficult to reassemble.

Differential Revision: https://reviews.llvm.org/D55879

llvm-svn: 349631
 2018-12-19 14:43:47 +00:00
Craig Topper eae26bf737 [X86] Add more intrinsics to match icc. 
This adds
_mm_loadu_epi8, _mm256_loadu_epi8, _mm512_loadu_epi8
_mm_loadu_epi16, _mm256_loadu_epi16, _mm512_loadu_epi16
_mm_storeu_epi8, _mm256_storeu_epi8, _mm512_storeu_epi8
_mm_storeu_epi16, _mm256_storeu_epi16, _mm512_storeu_epi16

llvm-svn: 344862
 2018-10-20 19:28:52 +00:00
Tomasz Krupa e8cf972d86 [X86] Lowering addus/subus intrinsics to native IR 
Summary: This is the patch that lowers x86 intrinsics to native IR in order to enable optimizations.

Reviewers: craig.topper, spatel, RKSimon

Reviewed By: craig.topper

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D46892

llvm-svn: 339651
 2018-08-14 08:01:38 +00:00
Mikhail Dvoretckii d1bf9ef0c7 [X86] Lowering integer truncation intrinsics to native IR 
This patch lowers the _mm[256|512]_cvtepi{64|32|16}_epi{32|16|8} intrinsics to
native IR in cases where the result's length is less than 128 bits.

The resulting IR for 256-bit inputs is folded into VPMOV instructions, while for
128-bit inputs the vpshufb (or, in the 64-to-32-bit case, vinsertps)
instructions are generated instead

Differential Revision: https://reviews.llvm.org/D48712

llvm-svn: 336643
 2018-07-10 08:22:44 +00:00
Craig Topper 0029470dde [X86] Correct the width of mask arguments in intrinsic headers and tests. 
All of these found by grepping through IR from the builtin tests for extra trunc and zext/sext instructions that shouldn't have been there.

Some of these were real bugs where we lost bits from the user input:
_mm512_mask_broadcast_f32x8
_mm512_maskz_broadcast_f32x8
_mm512_mask_broadcast_i32x8
_mm512_maskz_broadcast_i32x8
_mm256_mask_cvtusepi16_storeu_epi8

llvm-svn: 336042
 2018-06-30 06:05:17 +00:00
Craig Topper 91bbe98757 [X86] Remove masking from dbpsadbw builtins, use select builtin instead. 
llvm-svn: 334385
 2018-06-11 06:18:29 +00:00
Craig Topper 03de166ccd [X86] Add builtins for pshufd, pshuflw, and pshufhw to enable target feature and immediate range checking. 
llvm-svn: 334265
 2018-06-08 06:13:16 +00:00
Craig Topper 68a272d501 [X86] Merge the 3 different flavors of masked vpermi2var/vpermt2var builtins to a single version without masking. Use select builtins with appropriate operand instead. 
llvm-svn: 333387
 2018-05-29 03:26:38 +00:00
Craig Topper 55b4067350 [X86] Remove mask arguments from permvar builtins/intrinsics. Use a select in IR instead. 
Someday maybe we'll use selects for all the builtins.

llvm-svn: 332825
 2018-05-20 23:34:10 +00:00
Craig Topper 25de41cfbc [X86] Use __builtin_convertvector to replace some of the avx512 truncate builtins. 
As long as the destination type is a 256 or 128 bit vector with the same number of elements we can use __builtin_convertvector to directly generate trunc IR instruction which will be handled natively by the backend.

Differential Revision: https://reviews.llvm.org/D46742

llvm-svn: 332266
 2018-05-14 17:50:40 +00:00
Chandler Carruth 16429acacb [x86] Revert r330322 (& r330323): Lowering x86 adds/addus/subs/subus intrinsics 
The LLVM commit introduces a crash in LLVM's instruction selection.

I filed http://llvm.org/PR37260 with the test case.

llvm-svn: 330997
 2018-04-26 21:46:01 +00:00
Alexander Ivchenko d96ddccdb4 Lowering x86 adds/addus/subs/subus intrinsics (clang) 
This is the patch that lowers x86 intrinsics to native IR
in order to enable optimizations.

Patch by tkrupa

Differential Revision: https://reviews.llvm.org/D44786

llvm-svn: 330323
 2018-04-19 12:15:11 +00:00
Craig Topper de91dff5d4 [X86] Replace cvt*2mask intrinsics with native IR using 'icmp slt X, zeroinitializer. 
llvm-svn: 322038
 2018-01-08 22:37:56 +00:00
Uriel Korach 5b2b71d909 [X86] test/testn intrinsics lowering to IR. clang side 
Change Header files of the intrinsics for lowering test and testn intrinsics to IR code.
Removed test and testn builtins from clang

Differential Revision: https://reviews.llvm.org/D38737

llvm-svn: 318035
 2017-11-13 12:50:52 +00:00
Jina Nahias 3ad702a1ed Lowering Mask Set1 intrinsics to LLVM IR 
This patch, together with a matching llvm patch (https://reviews.llvm.org/D37669), implements the lowering of X86 mask set1 intrinsics to IR.

Differential Revision: https://reviews.llvm.org/D37668

llvm-svn: 313624
 2017-09-19 11:00:27 +00:00
Uriel Korach 3fba3c3b0c [X86] [PATCH] [intrinsics] Lowering X86 ABS intrinsics to IR. (clang) 
This patch, together with a matching llvm patch (https://reviews.llvm.org/D37693), implements the lowering of X86 ABS intrinsics to IR.

Differential Revision: https://reviews.llvm.org/D37694

llvm-svn: 313133
 2017-09-13 09:02:02 +00:00
Yael Tsafrir 23e7733230 [X86] Lower _mm[256|512]_[mask[z]]_avg_epu[8|16] intrinsics to native llvm IR 
Differential Revision: https://reviews.llvm.org/D37562

llvm-svn: 313011
 2017-09-12 07:46:32 +00:00
Michael Zuckerman 13bcf4944a Fix problem with test. 
llvm-svn: 299442
 2017-04-04 15:44:06 +00:00
Michael Zuckerman 755a13db3d [X86][Clang] Converting __mm{|256|512}_movm_epi{8|16|32|64} LLVMIR call into generic intrinsics. 
This patch is a part two of two reviews, one for the clang and the other for LLVM. 
In this patch, I covered the clang side, by introducing the intrinsic to the front end. 
This is done by creating a generic replacement.

Differential Revision: https://reviews.llvm.org/D31394a

llvm-svn: 299431
 2017-04-04 13:29:53 +00:00
Craig Topper 37bf5c6a3f [AVX-512] Replace masked 16-bit element variable shift builtins with new unmasked versions and selects. 
llvm-svn: 287313
 2016-11-18 05:04:51 +00:00
Craig Topper 66b2fd1209 [AVX-512] Remove many of the masked 128/256-bit shift builtins and replace them with unmasked builtins and selects. 
llvm-svn: 285539
 2016-10-31 04:30:51 +00:00
Craig Topper 312ff9d19d [AVX-512] Remove masked 128/256-bit builtins for vpmaddwd and vpmaddubsw. Replace with unmasked builtins and select. 
llvm-svn: 285516
 2016-10-30 07:11:34 +00:00
Craig Topper 4caf76bee2 [AVX-512] Remove 128/256-bit masked pmulhrsw/pmulhuw/pmulhw builtins and use unmasked builtins and select instead. 
llvm-svn: 285505
 2016-10-29 19:02:14 +00:00
Craig Topper eee7c0520c [AVX-512] Replace masked 128/256-bit byte, word, and dword min/max builtins with selects and the older unmasked builtins. 
llvm-svn: 284954
 2016-10-23 23:57:30 +00:00
Craig Topper 4ef879ac2c [AVX-512] Remove masked 128/256-bit packss/packus builtins and replace with selects and the older unmasked builtins. 
llvm-svn: 284935
 2016-10-23 07:35:39 +00:00
Craig Topper 4d63dfc286 [AVX-512] Replace masked 128/256-bit pavg builtins and replace with select and older unmasked builtins. 
llvm-svn: 284929
 2016-10-22 21:24:56 +00:00
Craig Topper 622c63614d [AVX-512] Replace masked 128/256-bit saturating add/sub builtins with select and older unmasked builtins. 
llvm-svn: 284928
 2016-10-22 21:24:52 +00:00
Craig Topper 11dda92405 [AVX-512] Replace masked 128/256-bit vpmovzx/vpmovsx builtins with native IR. 
llvm-svn: 284927
 2016-10-22 21:24:48 +00:00
Craig Topper f742445eb4 [AVX-512] Remove duplicate test cases from the avx512vlbw intrinsic test. These tests already exist in the avx512vl test and represent avx512vl instructions. 
llvm-svn: 284926
 2016-10-22 21:24:44 +00:00
Craig Topper eb1c0afa90 [AVX-512] Remove masked 128/256-bit pshufb builtins. Replace with a select and the older unmaksed builtins. 
llvm-svn: 284925
 2016-10-22 21:24:42 +00:00
Craig Topper 78a9c40326 [AVX-512] Remove builtins for 128/256-bit pabsb/pabsw. We can use a select and the older non-masked versions instead. 
llvm-svn: 284924
 2016-10-22 21:24:38 +00:00
Elad Cohen b107a22afb [X86] Remove the mm_malloc.h include guard hack from the X86 builtins tests 
The X86 clang/test/CodeGen/*builtins.c tests define the mm_malloc.h include
guard as a hack for avoiding its inclusion (mm_malloc.h requires a hosted
environment since it expects stdlib.h to be available - which is not the case
in these internal clang codegen tests).
This patch removes this hack and instead passes -ffreestanding to clang cc1.

Differential Revision: https://reviews.llvm.org/D24825

llvm-svn: 282581
 2016-09-28 11:59:09 +00:00
Craig Topper f43e4a1728 [AVX-512] Remove masked integer mullo builtins and replace with native IR. 
llvm-svn: 280597
 2016-09-03 19:19:49 +00:00
Craig Topper 0e18976b8d [AVX-512] Remove masked integer add/sub builtins and replace with native IR. 
llvm-svn: 280596
 2016-09-03 18:29:35 +00:00
Eric Christopher abb2b54ad3 After PR28761 use -Wall with -Werror in builtins tests to identify 
possible problems in headers.

llvm-svn: 277696
 2016-08-04 06:02:50 +00:00
Simon Pilgrim f5a8837e1b [X86][AVX512] Converted the VBROADCAST intrinsics to generic IR 
llvm-svn: 274544
 2016-07-05 12:59:33 +00:00
Michael Zuckerman 7dac6fbdf8 [Clang][BuiltIn][AVX512] adding _mm{|256|512}_mask_cvt{s|us|}epi16_storeu_epi8 intrinsics 
Differential Revision: http://reviews.llvm.org/D21729

llvm-svn: 274532
 2016-07-05 08:08:01 +00:00
Artur Pilipenko 70d4bb566c Update the expected masked load/store intrinsics names in tests 
The mangling of their names was changed in order to support arbitrary addrspace pointers as arguments in rL274043.

llvm-svn: 274044
 2016-06-28 18:28:45 +00:00
Craig Topper 79f53ca0b5 [AVX512] Replace masked unpack builtins with shufflevector and selects. 
llvm-svn: 273533
 2016-06-23 06:36:42 +00:00
Craig Topper d1691c7026 [AVX512] Replace masked integer cmp and ucmp builtins with native IR. 
llvm-svn: 273378
 2016-06-22 04:47:58 +00:00
Craig Topper c56f0f8485 [AVX512] Use correct types for mask parameters in avx512vlbw cmp builtin tests. 
llvm-svn: 273377
 2016-06-22 04:47:55 +00:00
Craig Topper a54c21e742 [AVX512] Use native IR for mask pcmpeq/pcmpgt intrinsics. 
llvm-svn: 272787
 2016-06-15 14:06:34 +00:00
Chandler Carruth c41e081f71 Fix this test to handle NDEBUG builds which don't have a name for the 
basic block.

llvm-svn: 272456
 2016-06-11 06:32:56 +00:00
Craig Topper 68738332b8 [AVX512] Implement 512-bit and masked shufflelo and shufflehi intrinsics directly with __builtin_shufflevector and __builtin_ia32_select. Also improve the formatting of the AVX2 version. 
llvm-svn: 272452
 2016-06-11 03:31:13 +00:00
Igor Breger aadb876200 [AVX512] Emit select instruction instead of using x86 specific instrinsics. 
This will allow us to remove the x86 instrinics from the backend.

Differential Revision: http://reviews.llvm.org/D21060

llvm-svn: 272141
 2016-06-08 13:59:20 +00:00
Craig Topper f51cc07719 [AVX512] Convert masked palignr builtins directly to native IR similar to the other palignr builtins, but with a select to handle masking. 
llvm-svn: 271873
 2016-06-06 06:13:01 +00:00
Craig Topper 4b060e31c9 [AVX512] Convert masked load builtins to generic masked load intrinsics instead of the x86 specific ones. 
This will allow the x86 intrinsics to be removed from the backend.

llvm-svn: 271253
 2016-05-31 06:58:07 +00:00
Craig Topper 6e891fbdd2 [AVX512] Emit generic masked store instrinsics instead of using x86 specific intrinsics. 
This will allow us to remove the x86 instrinics from the backend.

llvm-svn: 271246
 2016-05-31 01:50:10 +00:00
Michael Zuckerman e871785eb6 [Clang][avx512][Builtin] Adding intrinsics for cvtw2mask{128|256|512} instruction set 
Differential Revision: http://reviews.llvm.org/D19766

llvm-svn: 268385
 2016-05-03 14:12:23 +00:00