Commit Graph

7 Commits

Author SHA1 Message Date
Simon Atanasyan 4553cdafe1 [ORC] Rename register in the OrcMips64 resolver code comments. NFC
The `fp` and `s8` register names are synonyms. But `fp` better reflects
a purpose of the register.

llvm-svn: 350023
2018-12-23 12:05:04 +00:00
Simon Atanasyan 15b68b87d5 [ORC] clang-format OrcMips32 and OrcMips64 code. NFC
llvm-svn: 350022
2018-12-23 12:05:00 +00:00
Simon Atanasyan da29981707 [ORC] Remove redundant instruction from MIPS resolver code. NFC
It's redundant to restore the `$a3` register twice.

llvm-svn: 350021
2018-12-23 12:04:55 +00:00
Petar Jovanovic 5abf4bb552 [MIPS] ORC JIT support
This patch adds support for ORC JIT for mips/mips64 architecture.
In common code $static is changed to __ORCstatic because on MIPS
architecture "$" is a reserved character.

Patch by Luka Ercegovcevic

Differential Revision: https://reviews.llvm.org/D49665

llvm-svn: 341934
2018-09-11 13:10:04 +00:00
Michael Zolotukhin a44d5fe333 Remove redundant includes from lib/ExecutionEngine.
llvm-svn: 320621
2017-12-13 21:30:50 +00:00
Lang Hames d4d6a1aa9b [ORC] Fix a typo.
llvm-svn: 313346
2017-09-15 06:50:19 +00:00
Lang Hames 4821c24d08 [Orc] Rename OrcArchitectureSupport to OrcABISupport and add Win32 ABI support.
This enables lazy JITing on Windows x86-64.

Patch by David. Thanks David!

llvm-svn: 268845
2016-05-07 03:36:38 +00:00