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Author SHA1 Message Date
Andrew Trick 121124acf8 Revert "Temporarily enable MI-Sched on X86." 
This reverts commit 98a9b72e8c56dc13a2617de84503a3d78352789c.

llvm-svn: 184823
 2013-06-25 02:48:58 +00:00
Andrew Trick 5a1e0af838 Temporarily enable MI-Sched on X86. 
Sorry for the unit test churn. I'll try to make the change permanently
next time.

llvm-svn: 184705
 2013-06-24 09:13:20 +00:00
Jakob Stoklund Olesen 25ced18407 Erase joined copies immediately. 
The late dead code elimination is no longer necessary.

The test changes are cause by a register hint that can be either %rdi or
%rax. The choice depends on the use list order, which this patch changes.

llvm-svn: 157131
 2012-05-19 20:54:07 +00:00
Andrew Trick 8523b16ff5 Instruction scheduling itinerary for Intel Atom. 
Adds an instruction itinerary to all x86 instructions, giving each a default latency of 1, using the InstrItinClass IIC_DEFAULT.

Sets specific latencies for Atom for the instructions in files X86InstrCMovSetCC.td, X86InstrArithmetic.td, X86InstrControl.td, and X86InstrShiftRotate.td. The Atom latencies for the remainder of the x86 instructions will be set in subsequent patches.

Adds a test to verify that the scheduler is working.

Also changes the scheduling preference to "Hybrid" for i386 Atom, while leaving x86_64 as ILP.

Patch by Preston Gurd!

llvm-svn: 149558
 2012-02-01 23:20:51 +00:00
Rafael Espindola 1e1b797989 Split segmented stacks tests into tests for static- and dynamic-size frames. 
Patch by Brian Anderson.

llvm-svn: 147959
 2012-01-11 18:51:03 +00:00