af309d29b1
Add getStore() helper function to create ISD::STORE nodes.
...
llvm-svn: 30758
2006-10-05 22:57:11 +00:00
8b1a59a272
Don't crash if an MBB doesn't have an LLVM BB
...
llvm-svn: 30757
2006-10-05 21:40:14 +00:00
6549d22ef9
Alias analysis code clean ups.
...
llvm-svn: 30753
2006-10-05 15:07:25 +00:00
66c1625a37
Emit pic jumptables to the same section that the function is emitted to,
...
allowing label differences to work. This fixes CodeGen/X86/pic_jumptable.ll
llvm-svn: 30744
2006-10-05 03:13:28 +00:00
a6a570e02f
Pass the MachineFunction into EmitJumpTableInfo.
...
llvm-svn: 30742
2006-10-05 03:01:21 +00:00
dc82241182
move getSectionForFunction to AsmPrinter
...
llvm-svn: 30736
2006-10-05 02:42:47 +00:00
f80dfa83a0
Fix some typos that can cause a flag value to have more than one use.
...
llvm-svn: 30727
2006-10-04 22:23:53 +00:00
708d0db2d8
More extensive alias analysis.
...
llvm-svn: 30721
2006-10-04 16:53:27 +00:00
0d5a0eae57
More long term solution
...
llvm-svn: 30720
2006-10-04 10:40:15 +00:00
66b0b55816
Work around for some problems with templates.
...
llvm-svn: 30715
2006-10-04 01:43:13 +00:00
5d9fd977d3
Combine ISD::EXTLOAD, ISD::SEXTLOAD, ISD::ZEXTLOAD into ISD::LOADX. Add an
...
extra operand to LOADX to specify the exact value extension type.
llvm-svn: 30714
2006-10-04 00:56:09 +00:00
fc416faaa0
Use $( $| $) to represent alternatives in asm blocks instead of {|}. This
...
is needed to support targets where {|} aren't special symbols.
llvm-svn: 30712
2006-10-03 23:27:09 +00:00
91d76cb27f
Fix an obvious typo.
...
llvm-svn: 30711
2006-10-03 23:08:27 +00:00
bd7286e606
Bugfixes
...
llvm-svn: 30709
2006-10-03 20:19:23 +00:00
de154b1737
Print the MBB ID # along with the bb tag in the -print-machine-instrs output.
...
llvm-svn: 30708
2006-10-03 20:17:24 +00:00
64fd9487bd
Provide a function that ensures MBB numbering is dense and inorder. This
...
can be used by MachineFunctionPasses who need this property.
llvm-svn: 30706
2006-10-03 19:18:57 +00:00
984f0ce06b
Fix for PR929. The PHI nodes were being gone through for each instruction
...
in a successor block for every block...resulting in some O(N^k) algorithm
which wasn't very good for performance. Calculating this information up
front and keeping it in a map made it much faster.
llvm-svn: 30697
2006-10-03 07:20:20 +00:00
e73a22514d
Debugging kruft
...
llvm-svn: 30688
2006-10-02 13:01:17 +00:00
1368c265da
Add ability to annotate (color) nodes in a viewGraph.
...
llvm-svn: 30686
2006-10-02 12:26:53 +00:00
eea983eb5d
simplify code
...
llvm-svn: 30659
2006-09-28 23:17:41 +00:00
bcf1b4120f
TargetRegisterClass specifies the desired spill alignment. However, it cannot be honored if stack alignment is smaller.
...
llvm-svn: 30648
2006-09-28 18:52:32 +00:00
5d409822d6
"Once more into the breach, dear friends, once more, or fill the wall up
...
with our English dead."
No! Really! Serious this time...It was how the vreg uses were being
adjusted that was causing hte Olden tests to fail. I corrected this and
the Olden and Regression tests all passed.
llvm-svn: 30644
2006-09-28 07:10:24 +00:00
a9caf95591
refactor critical edge breaking out into the SplitCritEdgesForPHIConstants method.
...
This is a baby step towards fixing PR925.
llvm-svn: 30643
2006-09-28 06:17:10 +00:00
764caf6129
re-re-revert this, back to the right revision. It currently breaks bisort/mst
...
in olden among others.
llvm-svn: 30637
2006-09-28 00:11:54 +00:00
d31f55c236
PEI now place callee save spills closest to the address pointed to by the
...
incoming stack. This allows X86 backend to use push / pop in epilogue /
prologue.
llvm-svn: 30636
2006-09-28 00:10:27 +00:00
9f7d0d1dc5
re-revert this patch, bisort and mst are still broken in Olden.
...
llvm-svn: 30634
2006-09-28 00:04:21 +00:00
1f29e6c5c5
Reapplying this patch. With the newest commits, the error in Olden/bisort
...
has disappeared.
llvm-svn: 30633
2006-09-27 22:37:35 +00:00
5f6c93701b
Temporarily revert this. This breaks Olden/bisort on PPC
...
llvm-svn: 30628
2006-09-27 16:59:16 +00:00
0a7f617a6c
PR878: Instead of calculating the vreg to PHI use count everytime we get
...
a function, do it up front in linear time (going through all of the
instructions once). We create a map out of them. Then it's no problem to
use the information in it during elimination...
llvm-svn: 30624
2006-09-27 09:04:15 +00:00
30b4708df2
Add support for ${:private} which prints "L" on darwin.
...
llvm-svn: 30620
2006-09-27 00:06:07 +00:00
a32814b033
Add support for ${:comment}, which expands to the current target's comment
...
character, and ${:uid} which expands to a unique ID for the MachineInstr.
More can be added if/when they are needed.
llvm-svn: 30619
2006-09-26 23:59:50 +00:00
5405c06737
Rename function. It's determining which callee-save registers to save.
...
llvm-svn: 30616
2006-09-26 22:29:31 +00:00
c19ef92403
Comments on JumpTableness
...
llvm-svn: 30615
2006-09-26 20:02:30 +00:00
60832693a7
Load chain check is not needed
...
llvm-svn: 30613
2006-09-26 17:44:58 +00:00
dde51671e5
Chain can be any operand
...
llvm-svn: 30611
2006-09-26 09:32:41 +00:00
5f3e0af9d0
Wrong size for load
...
llvm-svn: 30610
2006-09-26 08:14:06 +00:00
b4a864d533
Can't move a load node if it's chain is not used.
...
llvm-svn: 30609
2006-09-26 07:37:42 +00:00
9a1e91b107
print the preds of each MBB
...
llvm-svn: 30606
2006-09-26 03:41:59 +00:00
66af390631
Add support for targets that want to do something with the llvm.used list,
...
because they have an aggressive linker that does dead code stripping.
llvm-svn: 30604
2006-09-26 03:38:18 +00:00
7aa0638aa9
Accidental enable of bad code
...
llvm-svn: 30601
2006-09-25 21:11:32 +00:00
b5534e5c28
Fix chain dropping in load and drop unused stores in ret blocks.
...
llvm-svn: 30600
2006-09-25 19:32:58 +00:00
d07be232ba
Core antialiasing for load and store.
...
llvm-svn: 30597
2006-09-25 16:29:54 +00:00
783a4a9d86
Add support for other relocation bases to jump tables, as well as custom asm directives
...
llvm-svn: 30593
2006-09-24 19:45:58 +00:00
77c0757f8b
PIC jump table entries are always 32-bit. This fixes PIC jump table support on X86-64.
...
llvm-svn: 30590
2006-09-24 05:22:38 +00:00
449a0c7e33
Make it work for DAG combine of multi-value nodes.
...
llvm-svn: 30573
2006-09-21 19:04:05 +00:00
35f7eebb49
core corrections
...
llvm-svn: 30570
2006-09-21 17:35:47 +00:00
5d19d59017
Basic "in frame" alias analysis.
...
llvm-svn: 30568
2006-09-21 16:28:59 +00:00
082db3f9aa
fold (aext (and (trunc x), cst)) -> (and x, cst).
...
llvm-svn: 30561
2006-09-21 06:40:43 +00:00
fa9f92cf65
Check the right value type. This fixes 186.crafty on x86
...
llvm-svn: 30560
2006-09-21 06:17:39 +00:00
8d8a3bf9c9
Compile:
...
int %test(ulong *%tmp) {
%tmp = load ulong* %tmp ; <ulong> [#uses=1]
%tmp.mask = shr ulong %tmp, ubyte 50 ; <ulong> [#uses=1]
%tmp.mask = cast ulong %tmp.mask to ubyte
%tmp2 = and ubyte %tmp.mask, 3 ; <ubyte> [#uses=1]
%tmp2 = cast ubyte %tmp2 to int ; <int> [#uses=1]
ret int %tmp2
}
to:
_test:
movl 4(%esp), %eax
movl 4(%eax), %eax
shrl $18, %eax
andl $3, %eax
ret
instead of:
_test:
movl 4(%esp), %eax
movl 4(%eax), %eax
shrl $18, %eax
# TRUNCATE movb %al, %al
andb $3, %al
movzbl %al, %eax
ret
llvm-svn: 30558
2006-09-21 06:14:31 +00:00
a31f0a622b
Generalize (zext (truncate x)) and (sext (truncate x)) folding to work when
...
the src/dst are not the same size. This catches things like "truncate
32-bit X to 8 bits, then zext to 16", which happens a bit on X86.
llvm-svn: 30557
2006-09-21 06:00:20 +00:00
c8cd62d381
Compile:
...
int test3(int a, int b) { return (a < 0) ? a : 0; }
to:
_test3:
srawi r2, r3, 31
and r3, r2, r3
blr
instead of:
_test3:
cmpwi cr0, r3, 1
li r2, 0
blt cr0, LBB2_2 ;entry
LBB2_1: ;entry
mr r3, r2
LBB2_2: ;entry
blr
This implements: PowerPC/select_lt0.ll:seli32_a_a
llvm-svn: 30517
2006-09-20 06:41:35 +00:00
8746e2cd57
Fold the full generality of (any_extend (truncate x))
...
llvm-svn: 30514
2006-09-20 06:29:17 +00:00
8b68decb27
Two things:
...
1. teach SimplifySetCC that '(srl (ctlz x), 5) == 0' is really x != 0.
2. Teach visitSELECT_CC to use SimplifySetCC instead of calling it and
ignoring the result. This allows us to compile:
bool %test(ulong %x) {
%tmp = setlt ulong %x, 4294967296
ret bool %tmp
}
to:
_test:
cntlzw r2, r3
cmplwi cr0, r3, 1
srwi r2, r2, 5
li r3, 0
beq cr0, LBB1_2 ;
LBB1_1: ;
mr r3, r2
LBB1_2: ;
blr
instead of:
_test:
addi r2, r3, -1
cntlzw r2, r2
cntlzw r3, r3
srwi r2, r2, 5
cmplwi cr0, r2, 0
srwi r2, r3, 5
li r3, 0
bne cr0, LBB1_2 ;
LBB1_1: ;
mr r3, r2
LBB1_2: ;
blr
This isn't wonderful, but it's an improvement.
llvm-svn: 30513
2006-09-20 06:19:26 +00:00
875ea0cdbd
Expand 64-bit shifts more optimally if we know that the high bit of the
...
shift amount is one or zero. For example, for:
long long foo1(long long X, int C) {
return X << (C|32);
}
long long foo2(long long X, int C) {
return X << (C&~32);
}
we get:
_foo1:
movb $31, %cl
movl 4(%esp), %edx
andb 12(%esp), %cl
shll %cl, %edx
xorl %eax, %eax
ret
_foo2:
movb $223, %cl
movl 4(%esp), %eax
movl 8(%esp), %edx
andb 12(%esp), %cl
shldl %cl, %eax, %edx
shll %cl, %eax
ret
instead of:
_foo1:
subl $4, %esp
movl %ebx, (%esp)
movb $32, %bl
movl 8(%esp), %eax
movl 12(%esp), %edx
movb %bl, %cl
orb 16(%esp), %cl
shldl %cl, %eax, %edx
shll %cl, %eax
xorl %ecx, %ecx
testb %bl, %bl
cmovne %eax, %edx
cmovne %ecx, %eax
movl (%esp), %ebx
addl $4, %esp
ret
_foo2:
subl $4, %esp
movl %ebx, (%esp)
movb $223, %cl
movl 8(%esp), %eax
movl 12(%esp), %edx
andb 16(%esp), %cl
shldl %cl, %eax, %edx
shll %cl, %eax
xorl %ecx, %ecx
xorb %bl, %bl
testb %bl, %bl
cmovne %eax, %edx
cmovne %ecx, %eax
movl (%esp), %ebx
addl $4, %esp
ret
llvm-svn: 30506
2006-09-20 03:38:48 +00:00
698000b0da
Fix UnitTests/2005-05-12-Int64ToFP.c with llc-beta. In particular, do not
...
allow it to go into an infinite loop, filling up the disk!
llvm-svn: 30494
2006-09-19 18:02:01 +00:00
5a42ebcff3
Fold extract_element(cst) to cst
...
llvm-svn: 30478
2006-09-19 05:02:39 +00:00
4c059f4962
Minor speedup for legalize by avoiding some malloc traffic
...
llvm-svn: 30477
2006-09-19 04:51:23 +00:00
1fc7c363e6
Fix a typo.
...
llvm-svn: 30474
2006-09-18 23:28:33 +00:00
4bfaf0bd2c
Allow i32 UDIV, SDIV, UREM, SREM to be expanded into libcalls.
...
llvm-svn: 30470
2006-09-18 21:49:04 +00:00
51ad73c98c
oops
...
llvm-svn: 30462
2006-09-18 18:00:18 +00:00
c50458fb90
absolute addresses must match pointer size
...
llvm-svn: 30461
2006-09-18 17:59:35 +00:00
d30bba331f
Sort out mangled names for globals
...
llvm-svn: 30460
2006-09-18 14:47:26 +00:00
e50f5d1fb1
Oh yeah, this is needed too
...
llvm-svn: 30407
2006-09-16 05:08:34 +00:00
1b63391fdf
simplify control flow, no functionality change
...
llvm-svn: 30403
2006-09-16 00:21:44 +00:00
fbadbda6ba
Allow custom expand of mul
...
llvm-svn: 30402
2006-09-16 00:09:24 +00:00
8fb3d445f5
Keep track of the start of MBB's in a separate map from instructions. This
...
is faster and is needed for future improvements.
llvm-svn: 30383
2006-09-15 03:57:23 +00:00
46d710e6ea
Fold (X & C1) | (Y & C2) -> (X|Y) & C3 when possible.
...
This implements CodeGen/X86/and-or-fold.ll
llvm-svn: 30379
2006-09-14 21:11:37 +00:00
97614c86ce
Split rotate matching code out to its own function. Make it stronger, by
...
matching things like ((x >> c1) & c2) | ((x << c3) & c4) to (rot x, c5) & c6
llvm-svn: 30376
2006-09-14 20:50:57 +00:00
616aa548b2
Use getOffset() instead.
...
llvm-svn: 30327
2006-09-14 07:41:12 +00:00
2ad050fb3e
Use MachineConstantPoolEntry getOffset() and getType() accessors.
...
llvm-svn: 30326
2006-09-14 07:35:00 +00:00
4f9299552b
A MachineConstantPool may have mixed Constant* and MachineConstantPoolValue* values.
...
llvm-svn: 30316
2006-09-14 05:50:57 +00:00
84cc1f7cb8
If LSR went through a lot of trouble to put constants (e.g. the addr of a global
...
in a specific BB, don't undo this!). This allows us to compile
CodeGen/X86/loop-hoist.ll into:
_foo:
xorl %eax, %eax
*** movl L_Arr$non_lazy_ptr, %ecx
movl 4(%esp), %edx
LBB1_1: #cond_true
movl %eax, (%ecx,%eax,4)
incl %eax
cmpl %edx, %eax
jne LBB1_1 #cond_true
LBB1_2: #return
ret
instead of:
_foo:
xorl %eax, %eax
movl 4(%esp), %ecx
LBB1_1: #cond_true
*** movl L_Arr$non_lazy_ptr, %edx
movl %eax, (%edx,%eax,4)
incl %eax
cmpl %ecx, %eax
jne LBB1_1 #cond_true
LBB1_2: #return
ret
This was noticed in 464.h264ref. This doesn't usually affect PPC,
but strikes X86 all the time.
llvm-svn: 30290
2006-09-13 06:02:42 +00:00
72b503bcad
Compile X << 1 (where X is a long-long) to:
...
addl %ecx, %ecx
adcl %eax, %eax
instead of:
movl %ecx, %edx
addl %edx, %edx
shrl $31, %ecx
addl %eax, %eax
orl %ecx, %eax
and to:
addc r5, r5, r5
adde r4, r4, r4
instead of:
slwi r2,r9,1
srwi r0,r11,31
slwi r3,r11,1
or r2,r0,r2
on PPC.
llvm-svn: 30284
2006-09-13 03:50:39 +00:00
45fe3bc72c
Added support for machine specific constantpool values. These are useful for
...
representing expressions that can only be resolved at link time, etc.
llvm-svn: 30278
2006-09-12 21:00:35 +00:00
a0d95a8da9
Behold, more work on relocations. Things are looking pretty good now.
...
llvm-svn: 30240
2006-09-10 23:03:44 +00:00
2e0dfb0b16
This code was trying too hard. By eliminating redundant edges in the CFG
...
due to switch cases going to the same place, it make #pred != #phi entries,
breaking live interval analysis.
This fixes 458.sjeng on x86 with llc.
llvm-svn: 30236
2006-09-10 06:36:57 +00:00
f0359b343a
Implement the fpowi now by lowering to a libcall
...
llvm-svn: 30225
2006-09-09 06:03:30 +00:00
e4bbb6c341
Allow targets to custom lower expanded BIT_CONVERT's
...
llvm-svn: 30217
2006-09-09 00:20:27 +00:00
69df6132d7
First pass at supporting relocations. Relocations are written correctly to
...
the file now, however the relocated address is currently wrong. Fixing
that will require some deep pondering.
llvm-svn: 30207
2006-09-08 22:42:09 +00:00
b2e7316b2d
Non-allocatable physregs can be killed and dead, but don't treat them as
...
safe for later allocation. This fixes McCat/18-imp with llc-beta.
llvm-svn: 30204
2006-09-08 20:21:31 +00:00
050c64c51d
This fixes Benchmarks/Prolangs-C/unix-smail
...
llvm-svn: 30198
2006-09-08 19:11:11 +00:00
9b1a6ebf20
Fix a bunch of llc-beta failures on x86 yesterday. Don't allow selection
...
of unallocatable registers, just because an alias is allocatable. We were
picking registers like SIL just because ESI was being used.
llvm-svn: 30197
2006-09-08 19:03:30 +00:00
261779bb45
Make target asm info a property of the target machine.
...
llvm-svn: 30162
2006-09-07 22:06:40 +00:00
95b3dde8bb
Fix pasto that was breaking x86 tests.
...
llvm-svn: 30151
2006-09-07 18:50:20 +00:00
707339a57b
Fix CodeGen/Generic/2006-09-06-SwitchLowering.ll, a bug where SDIsel inserted
...
too many phi operands when lowering a switch to branches in some cases.
llvm-svn: 30142
2006-09-07 01:59:34 +00:00
a6211dcdad
Separate target specific asm properties from the asm printers.
...
llvm-svn: 30126
2006-09-06 18:34:40 +00:00
ddfb10b5af
Only call isUse/isDef on register operands
...
llvm-svn: 30122
2006-09-05 20:32:06 +00:00
2cb238320d
Only call isUse/isDef on register operands
...
llvm-svn: 30118
2006-09-05 20:19:27 +00:00
45456d44e3
Don't call isDef on non-registers
...
llvm-svn: 30117
2006-09-05 20:02:51 +00:00
0dce3311c4
Change the default to 0, which means 'default'.
...
llvm-svn: 30114
2006-09-05 17:39:15 +00:00
af23f9b5f6
Completely eliminate def&use operands. Now a register operand is EITHER a
...
def operand or a use operand.
llvm-svn: 30109
2006-09-05 02:31:13 +00:00
13a5dcddce
Fix a long-standing wart in the code generator: two-address instruction lowering
...
actually *removes* one of the operands, instead of just assigning both operands
the same register. This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.
Changing this also gets rid of a bunch of hacky code in various places.
This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.
llvm-svn: 30108
2006-09-05 02:12:02 +00:00
1eed04d1fb
Correct fix for a crasher on functions with live in values
...
llvm-svn: 30099
2006-09-04 18:27:40 +00:00
bff0b5969f
Hack around a regression I introduced yesterday
...
llvm-svn: 30098
2006-09-04 18:20:15 +00:00
373be1d1a2
forgot this
...
llvm-svn: 30097
2006-09-04 07:44:11 +00:00
cf6749e4c0
add setJumpBufSize() and setJumpBufAlignment() to target-lowering.
...
Call these from your backend to enjoy setjmp/longjmp goodness, see
lib/Target/IA64/IA64ISelLowering.cpp for an example
llvm-svn: 30095
2006-09-04 06:21:35 +00:00
a916db12e4
new file
...
llvm-svn: 30082
2006-09-04 04:16:09 +00:00
8584e940b8
Avoid beating on the mi2i map when we know the answer already.
...
llvm-svn: 30066
2006-09-03 08:07:11 +00:00
774785a79d
minor speedup
...
llvm-svn: 30065
2006-09-03 07:53:50 +00:00
7cc20d418b
Fix Regression/CodeGen/Generic/2006-09-02-LocalAllocCrash.ll on X86.
...
Just because an alias of a register is available, it doesn't mean that we
can arbitrarily evict the register.
llvm-svn: 30064
2006-09-03 07:15:37 +00:00
bd79458b0e
When deleting a machine instruction, make sure to remove it from the
...
livevariables information. This fixes several regalloc=local failures on x86
llvm-svn: 30062
2006-09-03 00:06:08 +00:00
f8f724a2b1
Move two methods out of line, make them work when the record for a machine
...
instruction includes physregs.
llvm-svn: 30061
2006-09-03 00:05:09 +00:00
f2ce949ae9
improve compat with certain versions of GCC (on cygwin?)
...
llvm-svn: 30054
2006-09-02 17:37:30 +00:00
75742e532a
Iteration is required for some cases, even if they don't occur in crafty.
...
Restore it, which re-fixes X86/2006-08-21-ExtraMovInst.ll
llvm-svn: 30050
2006-09-02 05:32:53 +00:00
5a56d30906
When joining two intervals where the RHS is really simple, use a light-weight
...
method for joining the live ranges instead of the fully-general one.
llvm-svn: 30049
2006-09-02 05:26:59 +00:00
e93762d36e
Allow legalizer to expand ISD::MUL using only MULHS in the rare case that is
...
possible and the target only supports MULHS.
llvm-svn: 30022
2006-09-01 18:17:58 +00:00
5352d0cc4d
Corrections.
...
llvm-svn: 30021
2006-09-01 12:55:05 +00:00
93c067dc2d
Pull some code out of a hot recursive function because the common case doesn't
...
need recursion.
llvm-svn: 30015
2006-09-01 07:00:23 +00:00
3eac2c87aa
Reserve space in the ValueNumberInfo vector. This speeds up live interval
...
analysis 16% on crafty.
Wrap long lines.
llvm-svn: 30012
2006-09-01 06:10:18 +00:00
f765351978
Iterative coallescing doesn't buy us anything (we get identical results on
...
crafty with and without it). Removing it speeds up live intervals 6%.
llvm-svn: 30010
2006-09-01 04:02:42 +00:00
31305c45da
DAG combiner fix for rotates. Previously the outer-most condition checks
...
for ROTL availability. This prevents it from forming ROTR for targets that
has ROTR only.
llvm-svn: 29997
2006-08-31 07:41:12 +00:00
a700a19d04
Add a special case that speeds up coallescing a bit, but not enough.
...
llvm-svn: 29996
2006-08-31 06:48:26 +00:00
78cca7243c
Delete copies as they are coallesced instead of waiting until the end.
...
llvm-svn: 29995
2006-08-31 05:58:59 +00:00
aa36808fd3
avoid calling the virtual isMoveInstr method endlessly by caching its results.
...
llvm-svn: 29994
2006-08-31 05:54:43 +00:00
cb74860cce
Fix a compiler crash bootstrapping llvm-gcc.
...
llvm-svn: 29989
2006-08-30 23:02:29 +00:00
34434e97c9
Teach the coallescer to coallesce live intervals joined by an arbitrary
...
number of copies, potentially defining live ranges that appear to have
differing value numbers that become identical when coallsced. Among other
things, this fixes CodeGen/X86/shift-coalesce.ll and PR687.
llvm-svn: 29968
2006-08-29 23:18:15 +00:00
2eebe8b05e
Handle callee saved registers in dwarf frame info (lead up to exception
...
handling.)
llvm-svn: 29954
2006-08-29 16:24:26 +00:00
e5570a4c3f
Move isCommutativeBinOp from SelectionDAG.cpp and DAGCombiner.cpp out. Make it a static method of SelectionDAG.
...
llvm-svn: 29951
2006-08-29 06:42:35 +00:00
c2d3d3112e
eliminate RegisterOpt. It does the same thing as RegisterPass.
...
llvm-svn: 29925
2006-08-27 22:42:52 +00:00
3c9b2420df
Eliminate RegisterAnalysis. RegisterPass now does all that is necessary.
...
llvm-svn: 29921
2006-08-27 22:30:17 +00:00
3d27be1333
s|llvm/Support/Visibility.h|llvm/Support/Compiler.h|
...
llvm-svn: 29911
2006-08-27 12:54:02 +00:00
2c3683a901
typo fix
...
llvm-svn: 29910
2006-08-27 12:47:48 +00:00
849f4bf8dd
Eliminate SelectNodeTo() and getTargetNode() variants which take more than
...
3 SDOperand operands. They are replaced by versions which take an array
of SDOperand and the number of operands.
llvm-svn: 29905
2006-08-27 08:08:54 +00:00
7851db75d9
Properly size the string table, and emit symbol table and string table
...
entries in the correct order, fixing several fixmes.
llvm-svn: 29902
2006-08-26 15:46:34 +00:00
34b70eea5c
SelectNodeTo now returns a SDNode*.
...
llvm-svn: 29901
2006-08-26 08:00:10 +00:00
122f2bcdc2
Simplifications to liveinterval analysis, no functionality change.
...
llvm-svn: 29896
2006-08-26 01:28:16 +00:00
f4f0b1995c
Completely change the way that joining with physregs is implemented. This
...
paves the way for future changes, increases coallescing opportunities (in
theory, not witnessed in practice), and eliminates the really expensive
LiveIntervals::overlapsAliases method.
llvm-svn: 29890
2006-08-25 23:41:24 +00:00
fb96c74874
Tidy up.
...
llvm-svn: 29888
2006-08-25 22:56:30 +00:00
92206f9404
Consolidate callee saved register information so that it can me used by debug
...
information and exception handling.
llvm-svn: 29881
2006-08-25 19:45:51 +00:00
f8bf1e6034
Allow for register numbers > 31.
...
llvm-svn: 29879
2006-08-25 19:39:52 +00:00
89fa9c7d65
Get closer to handling globals correctly. We now generally get them in the
...
right section.
llvm-svn: 29871
2006-08-25 06:36:58 +00:00
24d4208c97
When replacing value numbers, make sure to compactify the value # space.
...
llvm-svn: 29865
2006-08-24 23:22:59 +00:00
bdf121060c
Take advantage of the recent improvements to the liveintervals set (tracking
...
instructions which define each value#) to simplify and improve the coallescer.
In particular, this patch:
1. Implements iterative coallescing.
2. Reverts an unsafe hack from handlePhysRegDef, superceeding it with a
better solution.
3. Implements PR865, "coallescing" away the second copy in code like:
A = B
...
B = A
This also includes changes to symbolically print registers in intervals
when possible.
llvm-svn: 29862
2006-08-24 22:43:55 +00:00
3cb3921a60
Initial checkin of the Mach-O emitter. There's plenty of fixmes, but it
...
does emit linkable .o files in very simple cases.
llvm-svn: 29850
2006-08-23 21:08:52 +00:00
2e9f1bc056
Improve the LiveInterval class to keep track of which machine instruction
...
defines each value# tracked by the interval. This will be used to improve
coallescing.
llvm-svn: 29830
2006-08-22 18:19:46 +00:00
1d77a0ff88
Print physreg names symbolically in dumps
...
llvm-svn: 29805
2006-08-21 23:03:54 +00:00
213159a6ee
Print debug info as:
...
*** Register mapping ***
reg 1024 -> %reg1028
reg 1026 -> EAX
reg 1027 -> %reg1028
instead of:
*** Register mapping ***
reg 1024 -> reg 1028
reg 1026 -> reg 15
reg 1027 -> reg 1028
llvm-svn: 29803
2006-08-21 22:56:29 +00:00
b6ac11e120
Adding C++ member support.
...
llvm-svn: 29799
2006-08-21 21:20:18 +00:00
451b099113
Fix PR861
...
llvm-svn: 29796
2006-08-21 20:24:53 +00:00
04f2246400
Added a check so that if we have two machine instructions in this form
...
MOV R0, R1
MOV R1, R0
the second machine instruction is removed. Added a regression test.
llvm-svn: 29792
2006-08-21 07:33:33 +00:00
d86418ab20
switch the SUnit pred/succ sets from being std::sets to being smallvectors.
...
This reduces selectiondag time on kc++ from 5.43s to 4.98s (9%). More
significantly, this speeds up the default ppc scheduler from ~1571ms to 1063ms,
a 33% speedup.
llvm-svn: 29743
2006-08-17 00:09:56 +00:00
65879caf07
minor changes.
...
llvm-svn: 29740
2006-08-16 22:57:46 +00:00
a4f3625c23
Use the appropriate typedef
...
llvm-svn: 29730
2006-08-16 20:59:32 +00:00
a5a3eafbd0
Start using SDVTList more consistently
...
llvm-svn: 29711
2006-08-15 19:11:05 +00:00
f98411a220
add a new SDVTList type and new SelectionDAG::getVTList methods to streamline
...
the creation of canonical VTLists.
llvm-svn: 29709
2006-08-15 17:46:01 +00:00
bd8877744b
eliminate use of getNode that takes vector of valuetypes.
...
llvm-svn: 29687
2006-08-14 23:53:35 +00:00
3bf4be453f
Add a new getNode() method that takes a pointer to an already-intern'd list
...
of value-type nodes. This avoids having to do mallocs for std::vectors of
valuetypes when a node returns more than one type.
llvm-svn: 29685
2006-08-14 23:31:51 +00:00
e93a39f2d7
remove SelectionDAG::InsertISelMapEntry, it is dead
...
llvm-svn: 29677
2006-08-14 22:24:39 +00:00
63268f0672
Add code to resize the CSEMap hash table. This doesn't speedup codegen of
...
kimwitu, but seems like a good idea from a "avoid performance cliffs" standpoint :)
llvm-svn: 29675
2006-08-14 22:19:25 +00:00
8e37283d8b
Add the actual constant to the hash for ConstantPool nodes. Thanks to
...
Rafael Espindola for pointing this out.
llvm-svn: 29669
2006-08-14 20:12:44 +00:00
984c1a4a8f
Emit .set directives for jump table entries when possible, which reduces
...
the number of relocations in object files, shrinkifying them.
llvm-svn: 29650
2006-08-12 21:29:52 +00:00
167ea3eb5f
Fix an obvious bug, noticed by inspection. No current targets trigger this.
...
llvm-svn: 29648
2006-08-12 05:41:39 +00:00
0a60294fa0
Switch to using SuperFastHash instead of adding all elements together. This
...
doesn't significantly improve performance but it helps a small amount.
llvm-svn: 29642
2006-08-12 01:07:10 +00:00
04aa034f38
Switch NodeID to track 32-bit chunks instead of 8-bit chunks, for a 2.5%
...
speedup in isel time.
llvm-svn: 29640
2006-08-11 23:55:53 +00:00
0c2e5412bb
Remove 8 more std::map's.
...
llvm-svn: 29631
2006-08-11 21:55:30 +00:00
3f16b201e2
Move the BBNodes, GlobalValues, TargetGlobalValues, Constants, TargetConstants,
...
RegNodes, and ValueNodes maps into the CSEMap.
llvm-svn: 29626
2006-08-11 21:01:22 +00:00
fcb16470ec
eliminate the NullaryOps map, use CSEMap instead.
...
llvm-svn: 29621
2006-08-11 18:38:11 +00:00
6f22ebd8be
change internal impl of dag combiner so that calls to CombineTo never have to
...
make a temporary vector.
llvm-svn: 29618
2006-08-11 17:56:38 +00:00
a2f4086828
Change one ReplaceAllUsesWith method to take an array of operands to replace
...
instead of a vector of operands.
llvm-svn: 29616
2006-08-11 17:46:28 +00:00
c24a1d3093
Start eliminating temporary vectors used to create DAG nodes. Instead, pass
...
in the start of an array and a count of operands where applicable. In many
cases, the number of operands is known, so this static array can be allocated
on the stack, avoiding the heap. In many other cases, a SmallVector can be
used, which has the same benefit in the common cases.
I updated a lot of code calling getNode that takes a vector, but ran out of
time. The rest of the code should be updated, and these methods should be
removed.
We should also do the same thing to eliminate the methods that take a
vector of MVT::ValueTypes.
It would be extra nice to convert the dagiselemitter to avoid creating vectors
for operands when calling getTargetNode.
llvm-svn: 29566
2006-08-08 02:23:42 +00:00
97af9d5d3a
Eliminate some malloc traffic by allocating vectors on the stack. Change some
...
method that took std::vector<SDOperand> to take a pointer to a first operand
and #operands.
This speeds up isel on kc++ by about 3%.
llvm-svn: 29561
2006-08-08 01:09:31 +00:00
1ee75ce65d
Revamp the "CSEMap" datastructure used in the SelectionDAG class. This
...
eliminates a bunch of std::map's in the SelectionDAG, replacing them with a
home-grown hashtable.
This is still a work in progress: not all the maps have been moved over and the
hashtable never resizes. That said, this still speeds up llc 20% on kimwitu++
with -fast -regalloc=local using a release build.
llvm-svn: 29550
2006-08-07 23:03:03 +00:00
445b91a041
Clear TopOrder before assigning topological order. Some clean ups.
...
llvm-svn: 29546
2006-08-07 22:13:29 +00:00
1640ae5a84
Reverse the FlaggedNodes after scanning up for flagged preds or else the order would be reversed.
...
llvm-svn: 29545
2006-08-07 22:12:12 +00:00
8927c875bb
Make SelectionDAG::RemoveDeadNodes iterative instead of recursive, which
...
also make it simpler.
llvm-svn: 29524
2006-08-04 17:45:20 +00:00
a5b707e3ad
Copy the liveins for the first block. PR859
...
llvm-svn: 29511
2006-08-03 20:51:06 +00:00
524c1a21f2
Work around a GCC 3.3.5 bug noticed by a user.
...
llvm-svn: 29490
2006-08-03 00:18:59 +00:00
6efe304ec8
Work around a bug in gcc 3.3.5, reported by a user
...
llvm-svn: 29489
2006-08-03 00:16:56 +00:00
bba1ebda32
- Change AssignTopologicalOrder to return vector of SDNode* by reference.
...
- Tweak implementation to avoid using std::map.
llvm-svn: 29479
2006-08-02 22:00:34 +00:00
29e635d3c9
Final polish on machine pass registries.
...
llvm-svn: 29471
2006-08-02 12:30:23 +00:00
17c67efe8a
Now that the ISel is available, it's possible to create a default instruction
...
scheduler creator.
llvm-svn: 29452
2006-08-01 19:14:14 +00:00
03593f72db
1. Change use of "Cache" to "Default".
...
2. Added argument to instruction scheduler creators so the creators can do
special things.
3. Repaired target hazard code.
4. Misc.
More to follow.
llvm-svn: 29450
2006-08-01 18:29:48 +00:00
0ec39ee28e
Forgot the added files for plugable machine passes.
...
llvm-svn: 29436
2006-08-01 16:31:08 +00:00
95eda5b1f3
Introducing plugable register allocators and instruction schedulers.
...
llvm-svn: 29434
2006-08-01 14:21:23 +00:00
9631a60020
Added AssignTopologicalOrder() to assign each node an unique id based on their topological order.
...
llvm-svn: 29431
2006-08-01 08:20:41 +00:00
6ae6ac1216
PIC jump table entries are always 32-bit even in 64-bit mode.
...
llvm-svn: 29422
2006-08-01 01:03:13 +00:00
85492427f2
Instead of blindly looking past constantexpr casts, actually constant
...
fold them. This correctly truncates constants that are too large for the
destination slot and makes the code easier to understand. This fixes PR853
and Regression/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll
llvm-svn: 29408
2006-07-29 01:57:19 +00:00
b572401bea
Remove InFlightSet hack. No longer needed.
...
llvm-svn: 29373
2006-07-28 00:47:19 +00:00
3390cbed2c
Print empty inline asms as a blank line instead of:
...
# InlineAsm Start
# InlineAsm End
llvm-svn: 29372
2006-07-28 00:17:20 +00:00
d1a714e503
Working toward registration of register allocators.
...
llvm-svn: 29360
2006-07-27 20:05:00 +00:00
efc312a5c7
Code cleanups, per review
...
llvm-svn: 29347
2006-07-27 16:46:58 +00:00
acb606ff33
AssignNodeIds should return unsigned.
...
llvm-svn: 29343
2006-07-27 07:36:47 +00:00
29eefc164c
AssignNodeIds assign each node in the DAG an unique id.
...
llvm-svn: 29337
2006-07-27 06:39:06 +00:00
85ea83e821
Add some advice
...
llvm-svn: 29324
2006-07-27 04:24:14 +00:00
787565024a
Support jump tables when in PIC relocation model
...
llvm-svn: 29318
2006-07-27 01:13:04 +00:00
4488f0c303
Fix a case where LegalizeAllNodesNotLeadingTo could take exponential time.
...
This manifested itself as really long time to compile
Regression/CodeGen/Generic/2003-05-28-ManyArgs.ll on ppc.
This is PR847.
llvm-svn: 29313
2006-07-26 23:55:56 +00:00
421475cd3b
For PR780:
...
1. Move IncludeFile.h to System library
2. Move IncludeFile.cpp to System library
3. #1 and #2 required to prevent cyclic library dependencies for libSystem
4. Convert all existing uses of Support/IncludeFile.h to System/IncludeFile.h
5. Add IncludeFile support to various lib/System classes.
6. Add new lib/System classes to LinkAllVMCore.h
All this in an attempt to pull in lib/System to what's required for VMCore
llvm-svn: 29287
2006-07-26 16:18:00 +00:00
658b9476f0
Initialize some variables the compiler warns about.
...
llvm-svn: 29277
2006-07-25 20:44:41 +00:00
4b49c23571
Eliminate data relocations by using NULL instead of global empty list.
...
llvm-svn: 29250
2006-07-21 21:15:20 +00:00
4e153f1b91
Use an enumeration to eliminate data relocations.
...
llvm-svn: 29249
2006-07-21 20:57:35 +00:00
7c970b98d0
If a shuffle is a splat, check if the argument is a build_vector with all elements being the same. If so, return the argument.
...
llvm-svn: 29242
2006-07-21 08:25:53 +00:00
55782c6c41
Build more debugger/selectiondag libraries as archives instead of .o files.
...
This works around bugs in some versions of the cygwin linker.
Patch contributed by Anton Korobeynikov.
llvm-svn: 29239
2006-07-21 00:10:47 +00:00
8472e0c4af
If a shuffle is unary, i.e. one of the vector argument is not needed, turn the
...
operand into a undef and adjust mask accordingly.
llvm-svn: 29232
2006-07-20 22:44:41 +00:00
b030532910
Mems can be in the output list also. This is the second half of a fix for
...
PR833
llvm-svn: 29224
2006-07-20 19:02:21 +00:00
ec104a2b41
80 cols
...
llvm-svn: 29221
2006-07-20 17:43:27 +00:00
c496b418b5
Reduce number of exported symbols
...
llvm-svn: 29220
2006-07-20 17:28:38 +00:00
2b0baddc33
Fix linking on Alpha
...
llvm-svn: 29219
2006-07-20 17:27:58 +00:00
4238ca55ef
Move MVT::getVectorType out of line, it is large and shouldn't be inlined.
...
llvm-svn: 29195
2006-07-19 00:40:45 +00:00
c0973edc69
Add an out-of-line virtual method for the sdnode class to give it a home.
...
llvm-svn: 29192
2006-07-19 00:00:37 +00:00
Evan Cheng