Commit Graph

20863 Commits

Author SHA1 Message Date
Krzysztof Parzyszek f5b9bb61f7 Add print/dump routines to LiveInterval::SubRange
llvm-svn: 275194
2016-07-12 17:37:44 +00:00
Amjad Aboud acee568545 [codeview] Improved array type support.
Added support for:
1. Multi dimension array.
2. Array of structure type, which previously was declared incompletely.
3. Dynamic size array.
4. Array where element type is a typedef, volatile or constant (this should resolve PR28311).

Differential Revision: http://reviews.llvm.org/D21526

llvm-svn: 275167
2016-07-12 12:06:34 +00:00
Kyle Butt 83a25792c5 Codegen: Fix comment in BranchFolding.cpp
Blocks to be tail-merged may share more than one successor. Correct the
comment to state that they share a specific successor, SuccBB, rather
than a single successor, which is not true.

llvm-svn: 275104
2016-07-11 21:37:03 +00:00
Sanjay Patel bb7d87ee25 fix documentation comments; NFC
llvm-svn: 275101
2016-07-11 20:50:39 +00:00
Chad Rosier 4f0dad1674 [IPRA] Properly compute register usage at call sites.
Differential Revision: http://reviews.llvm.org/D21395
Patch by Vivek Pandya.
PR28144

llvm-svn: 275087
2016-07-11 18:45:49 +00:00
Nirav Dave 53a72f4d3c Provide support for preserving assembly comments
Preserve assembly comments from input in output assembly and flags to
toggle property. This is on by default for inline assembly and off in
llvm-mc.

Parsed comments are emitted immediately before an EOL which generally
places them on the expected line.

Reviewers: rtrieu, dwmw2, rnk, majnemer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20020

llvm-svn: 275058
2016-07-11 12:42:14 +00:00
Sanjay Patel fedc01ad76 [DAG] make isConstantSplatVector() available to the rest of lowering
llvm-svn: 275025
2016-07-10 21:27:06 +00:00
Sanjay Patel 9bedcdb5f5 fix documentation comments; NFC
llvm-svn: 275021
2016-07-10 21:02:16 +00:00
Sanjay Patel 303326541b reformat, fix comments/names; NFCI
llvm-svn: 275015
2016-07-10 13:05:57 +00:00
Benjamin Kramer 4d09892e9a Give helper classes/functions internal linkage. NFC.
llvm-svn: 275014
2016-07-10 11:28:51 +00:00
David Majnemer 28c3646f82 [COFF, Dwarf] Don't emit DW_AT_location for dllimported entities
There exists no relocation which can describe the address of a
dllimported variable: do not try to describe their location.

llvm-svn: 274986
2016-07-09 20:47:48 +00:00
Sanjay Patel 6170b4bebd fix documentation comments; NFC
llvm-svn: 274981
2016-07-09 18:52:07 +00:00
Matthias Braun 3f80043224 LivePhysRegs: addLiveOuts() can skip addPristines() in ret block
Drive-by improvement: We would 1) add CSRs, 2) remove callee saved CSRs
and 3) add all CSRs again for the return block.  Just adding CSRs once
obviously gives the same results.

llvm-svn: 274955
2016-07-09 01:31:36 +00:00
Matthias Braun 152e7c8b12 VirtRegMap: Replace some identity copies with KILL instructions.
An identity COPY like this:
   %AL = COPY %AL, %EAX<imp-def>
has no semantic effect, but encodes liveness information: Further users
of %EAX only depend on this instruction even though it does not define
the full register.

Replace the COPY with a KILL instruction in those cases to maintain this
liveness information. (This reverts a small part of r238588 but this
time adds a comment explaining why a KILL instruction is useful).

llvm-svn: 274952
2016-07-09 00:19:07 +00:00
Matthias Braun 07985809ab AsmPrinter: Fix emitKill() not flush()ing a raw_string_ostream
llvm-svn: 274951
2016-07-09 00:18:43 +00:00
Matt Arsenault 3fb8f9eabf Reapply r274829 with fix for FP vectors
llvm-svn: 274937
2016-07-08 21:25:33 +00:00
Wei Mi c022370767 Allow dead insts to be kept in DeadRemat only when they are rematerializable.
Because isReallyTriviallyReMaterializableGeneric puts many limits on
rematerializable instructions, this fix can prevent instructions with
tied virtual operands and instructions with virtual register uses from
being kept in DeadRemat, so as to workaround the live interval consistency
problem for the dummy instructions kept in DeadRemat.

But we still need to fix the live interval consistency problem. This patch
is just a short time relieve. PR28464 has been filed as a reminder.

Differential Revision: http://reviews.llvm.org/D19486

llvm-svn: 274928
2016-07-08 21:08:09 +00:00
Nico Weber 28410c6846 Revert r274829, it caused PR28472.
llvm-svn: 274916
2016-07-08 19:52:19 +00:00
Duncan P. N. Exon Smith 5bff51138d AsmPrinter: Avoid implicit iterator conversions in DbgValueHistoryCalculator, NFC
llvm-svn: 274911
2016-07-08 19:31:47 +00:00
Duncan P. N. Exon Smith 1b824c9e43 SelectionDAG: Avoid implicit iterator conversions in SelectionDAGBuilder, NFC
llvm-svn: 274907
2016-07-08 19:23:12 +00:00
Duncan P. N. Exon Smith dca9bffa31 SelectionDAG: Avoid implicit iterator conversions in SelectionDAGISel, NFC
llvm-svn: 274904
2016-07-08 19:11:40 +00:00
Duncan P. N. Exon Smith 6135f3f1cb SelectionDAG: Avoid implicit iterator conversions in ScheduleDAGSDNodes, NFC
llvm-svn: 274903
2016-07-08 19:07:09 +00:00
Duncan P. N. Exon Smith 10383ecd76 SelectionDAG: Avoid implicit iterator conversions in FastISel, NFC
llvm-svn: 274899
2016-07-08 18:36:41 +00:00
Duncan P. N. Exon Smith 50d307680f CodeGen: Avoid iterator conversions in TwoAddressInstructionPass, NFC
Mostly through preferring MachineInstr&, avoid implicit conversions from
iterator to pointer.

Although this may bitrot (since there are other uses blocking me from
removing the implicit operator), this removes the last of the implicit
conversions from MachineInstrBundleIterator to MachineInstr* in the
LLVMCodeGen build target.

llvm-svn: 274893
2016-07-08 17:43:08 +00:00
Duncan P. N. Exon Smith 89a6c0e170 CodeGen: Use MachineInstr& in StackSlotColoring, NFC
Avoid implicit iterator to pointer conversions.

llvm-svn: 274892
2016-07-08 17:28:40 +00:00
Duncan P. N. Exon Smith 9ce56919e5 CodeGen: Use MachineInstr& in RegisterScavenging, NFC
Prefer MachineInstr& in order to avoid implicit conversions from
MachineInstrBundleIterator to MachineInstr*.

llvm-svn: 274888
2016-07-08 17:16:57 +00:00
David Majnemer d9d02d8259 [CodeGen, TargetPassConfig] Remove a race from createRegAllocPass
The createRegAllocPass reads and writes to a global variable 'Registry'
via calls to getDefault and setDefault.  Run this under a call_once to
avoid races.

llvm-svn: 274875
2016-07-08 16:39:00 +00:00
Matt Arsenault 44540a3db2 PeepholeOptimizer: Make pass name match DEBUG_TYPE
llvm-svn: 274874
2016-07-08 16:29:11 +00:00
Sjoerd Meijer 1ee119f897 Do not expand SDIV when compiling for minimum code size
Differential Revision: http://reviews.llvm.org/D22139

llvm-svn: 274855
2016-07-08 15:32:01 +00:00
Sjoerd Meijer 46c4c3d31c Addressing post-commit comments regarding not expanding UDIV;
we don't expand only when compiling for minimum code size.

llvm-svn: 274847
2016-07-08 14:17:09 +00:00
Sjoerd Meijer a625af3feb Code size optimisation: don't expand a div to a mul and and a shift sequence.
As a result, the urem instruction will not be expanded to a sequence of umull,
lsrs, muls and sub instructions, but just a call to __aeabi_uidivmod.

Differential Revision: http://reviews.llvm.org/D22131

llvm-svn: 274843
2016-07-08 12:54:43 +00:00
Matt Arsenault c3a6fe6ecd Bug 28444: Fix assertion when extract_vector_elt has mismatched type
For some reason extract_vector_elt is sometimes allowed to have
a different result type than the vector element type.

llvm-svn: 274829
2016-07-08 07:05:00 +00:00
Wei Mi 90d195a5fd [PM] Port UnreachableBlockElim to the new Pass Manager
Differential Revision: http://reviews.llvm.org/D22124

llvm-svn: 274824
2016-07-08 03:32:49 +00:00
Andrew Kaylor 65fa0704aa Include SelectionDAGISel in the opt-bisect process
Differential Revision: http://reviews.llvm.org/D21143

llvm-svn: 274786
2016-07-07 18:55:02 +00:00
David Majnemer a54fe1acdc [CodeView] Implement support for thread-local variables
llvm-svn: 274734
2016-07-07 05:14:21 +00:00
Matthias Braun 332bb5c236 AArch64: Replace a RegScavenger instance with LivePhysRegs
findScratchNonCalleeSaveRegister() just needs a simple liveness
analysis, use LivePhysRegs for that as it is simpler and does not depend
on the kill flags.

This commit adds a convenience function available() to LivePhysRegs:
This function returns true if the given register is not reserved and
neither the register nor any of its aliases are alive.

Differential Revision: http://reviews.llvm.org/D21865

llvm-svn: 274685
2016-07-06 21:31:27 +00:00
David Majnemer 7abd269aa9 [CodeView] Emit an appropriate symbol kind for globals
We emitted debug info for globals/functions as if they all had external
linkage.  Instead, emit local symbol records when appropriate.

llvm-svn: 274676
2016-07-06 21:07:47 +00:00
David Majnemer e1e7372e93 [CodeView] Unions are always sealed
It is impossible to inherit from a union.  We are missing a way to
represent this in IR for classes/structs...

llvm-svn: 274675
2016-07-06 21:07:42 +00:00
Adrian McCarthy 820ca5404c Retry: "Emit CodeView type records for nested classes."
Now with a corrected test to account for a recently supported properties bit in the debug info of a struct.

Original review: http://reviews.llvm.org/D21939

This reverts commit 970c3fd497a28d25dd69526eb52594a696c37968.

llvm-svn: 274661
2016-07-06 19:49:51 +00:00
Matthias Braun f16acbd2f9 TailDuplicator: Remove live-in updating logic
This logic was introduced in r157663 and does not make any sense to me.
The motivating example in rdar://11538365 looks like this:

This is the tail:
BB#16: derived from LLVM BB %if.end68
    Live Ins: %R0 %R4 %R5
    Predecessors according to CFG: BB#15 BB#5
        tBLXi pred:14, pred:%noreg, <ga:@CFRelease>, %R0<kill>, <regmask>, %LR<imp-def,dead>, %SP<imp-use>, %SP<imp-def>
        t2B <BB#20>, pred:14, pred:%noreg
    Successors according to CFG: BB#20

This is the predBB:
BB#5:
    Live Ins: %R5
    Predecessors according to CFG: BB#4
        %R4<def> = t2MOVi 0, pred:14, pred:%noreg, opt:%noreg
        t2B <BB#16>, pred:14, pred:%noreg
    Successors according to CFG: BB#16

However this is invalid machine code to begin with, if %R0 is live-in to
BB#16 then it must be live-in to BB#5 as well if BB#5 does not define
it.  We should not need logic to retroactively fix broken machine code
and in fact the example from r157663 passes cleanly with the code
removed and I do not see any (newly) failing tests with the machine
verifier enabled.

Differential Revision: http://reviews.llvm.org/D22031

llvm-svn: 274655
2016-07-06 18:55:10 +00:00
Tim Shen 1c3c0afc53 [DAGCombiner] Fix visitSTORE to continue processing current SDNode, if findBetterNeighborChains doesn't actually CombineTo it.
Summary:
findBetterNeighborChains may or may not find a better chain for each node it finds, which include the node ("St") that visitSTORE is currently processing. If no better chain is found for St, visitSTORE should continue instead of return SDValue(St, 0), as if it's CombinedTo'ed.

This fixes bug 28130. There might be other ways to make the test pass (see D21409). I think both of the patches are fixing actual bugs revealed by the same testcase.

Reviewers: echristo, wschmidt, hfinkel, kbarton, amehsan, arsenm, nemanjai, bogner

Subscribers: mehdi_amini, nemanjai, llvm-commits

Differential Revision: http://reviews.llvm.org/D21692

llvm-svn: 274644
2016-07-06 17:44:03 +00:00
Adrian McCarthy 7649d8388a Revert "Emit CodeView type records for nested classes."
This reverts commit 256b29322c827a2d94da56468c936596f5509032.

llvm-svn: 274632
2016-07-06 15:14:10 +00:00
Adrian McCarthy 024a7b6358 Emit CodeView type records for nested classes.
Differential Revision: http://reviews.llvm.org/D21939

llvm-svn: 274629
2016-07-06 14:47:32 +00:00
George Burgess IV bfa401e5ad [CFLAA] Split into Anders+Steens analysis.
StratifiedSets (as implemented) is very fast, but its accuracy is also
limited. If we take a more aggressive andersens-like approach, we can be
way more accurate, but we'll also end up being slower.

So, we've decided to split CFLAA into CFLSteensAA and CFLAndersAA.

Long-term, we want to end up in a place where CFLSteens is queried
first; if it can provide an answer, great (since queries are basically
map lookups). Otherwise, we'll fall back to CFLAnders, BasicAA, etc.

This patch splits everything out so we can try to do something like
that when we get a reasonable CFLAnders implementation.

Patch by Jia Chen.

Differential Revision: http://reviews.llvm.org/D21910

llvm-svn: 274589
2016-07-06 00:26:41 +00:00
Balaram Makam d4acd7ed10 Revert r259387: "AArch64: Implement missed conditional compare sequences."
This reverts commit r259387 because it inserts illegal code after legalization
    in some backends where i64 OR type is illegal for example.

llvm-svn: 274573
2016-07-05 20:24:05 +00:00
Matt Arsenault 2d79389508 DAGCombiner: Fold away vector extract of insert with the same index
This only really matters when the index is non-constant since the
constant case already gets taken care of by other combines.

llvm-svn: 274569
2016-07-05 18:25:02 +00:00
Eric Liu e617adea12 Fixed warning caused by r274402.
llvm-svn: 274497
2016-07-04 12:10:08 +00:00
Craig Topper d83f818a3e [CodeGen] Make the code that detects a if a shuffle is really a concatenation of the inputs more general purpose.
We can now handle concatenation of each source multiple times. The previous code just checked for each source to appear once in either order.

This also now handles an entire source vector sized piece having undef indices correctly. We now concat with UNDEF instead of using one of the sources. This is responsible for the test case change.

llvm-svn: 274483
2016-07-04 06:19:35 +00:00
Craig Topper d1eca0f32c [CodeGen] Teach OR combine of shuffles involving zero vectors to better handle undef indices.
Undef indices can now be treated as zeros. Or if its undef ORed with zero, we will keep the undef.

llvm-svn: 274472
2016-07-03 19:37:12 +00:00
Haicheng Wu b71b2f622a [MBB] add a missing corner case in UpdateTerminator()
After the block placement, if a block ends with a conditional branch, but the
next block is not its successor. The conditional branch should be changed to
unconditional branch.  This patch fixes PR28307, PR28297, PR28402.

Differential Revision: http://reviews.llvm.org/D21811

llvm-svn: 274470
2016-07-03 19:14:17 +00:00
Reid Kleckner e092dad72c [codeview] Set the Nested and Scoped ClassOptions based on the scope chain
These are set on both the declaration record and the definition record.

llvm-svn: 274410
2016-07-02 00:11:07 +00:00
Matt Arsenault accddacb70 TII: Fix inlineasm size counting comments as insts
The main problem was counting comments on their own
line as instructions.

llvm-svn: 274405
2016-07-01 23:26:50 +00:00
Matt Arsenault 28aaf45c10 PeepholeOptimizer: Relax assert
Allow implicit defs

llvm-svn: 274402
2016-07-01 23:15:06 +00:00
David Majnemer 08bd744c2c [CodeView] Include the offset of nested members
Given something like:
  struct S {
    int a;
    struct { int b; };
  };

We would fail to give 'b' offset 4.  Instead, we would give it the
offset it has inside of it's struct.

llvm-svn: 274400
2016-07-01 23:12:48 +00:00
David Majnemer 6bdc24e7b6 [CodeView] Pretty print anonymous scopes
A namespace without a name should be written out as `anonymous
namespace' while a tag type without a name should be written out as
<unnamed-tag>.

llvm-svn: 274399
2016-07-01 23:12:45 +00:00
Reid Kleckner ad56ea3129 [codeview] Don't record UDTs for anonymous structs
MSVC makes up names for these anonymous structs, but we don't (yet).
Eventually Clang should use getTypedefNameForAnonDecl() to put some name
in the debug info, and we can update the test case when that happens.

llvm-svn: 274391
2016-07-01 22:24:51 +00:00
Reid Kleckner c92e9469c4 [codeview] Assert that our CV type records are valid
We were asserting that our type records were valid when emitting
assembly, but not when emitting an object file.

I've been seeing lots of LNK1285 errors (corrupt PDB) during incremental
debug self-host builds with the MSVC linker, and hopefully this will
catch some of them earlier.

llvm-svn: 274373
2016-07-01 18:05:56 +00:00
Duncan P. N. Exon Smith 4a876eb645 CodeGen: Use MachineInstr& in RegisterCoalescer, NFC
Remove a few more implicit iterator to pointer conversions by preferring
MachineInstr&.

llvm-svn: 274363
2016-07-01 16:43:13 +00:00
Duncan P. N. Exon Smith aae6f3c95e CodeGen: Avoid implicit conversions in TargetInstrInfo, NFC
Avoid implicit conversions from MachineBasicBlock::iterator to
MachineInstr* in TargetInstrInfo.

llvm-svn: 274361
2016-07-01 16:38:28 +00:00
Duncan P. N. Exon Smith b77911be02 CodeGen: Use MachineInstr& in ScheduleDAGIntrs, NFC
Use MachineInstr& to avoid implicit conversions from
MachineBasicBlock::iterator to MachineInstr*.  In one case, this could
use a range-based for loop, but the other loops iterated in reverse
order.

One of the reverse-loops checked the MachineInstr* for nullptr, a
condition that is provably unreachable.  (And even if my proof has a
flaw, UBSan would catch the bug.)

llvm-svn: 274360
2016-07-01 16:21:48 +00:00
Duncan P. N. Exon Smith eda8f5d592 CodeGen: Avoid iterator conversion in UnreachableBlockElim, NFC
Avoid an unnecessary (and implicit) iterator to pointer conversion in
UnreachableBlockElim by using the post-increment operator.

llvm-svn: 274355
2016-07-01 15:13:09 +00:00
Duncan P. N. Exon Smith ef105caea9 CodeGen: Use MachineInstr& in SlotIndexes.cpp, NFC
Avoid implicit conversions from iterator to pointer by preferring
MachineInstr& and using range-based for loops.

llvm-svn: 274354
2016-07-01 15:08:52 +00:00
Duncan P. N. Exon Smith 44ed0de298 CodeGen: Use MachineInstr& in RegAllocFast, NFC
Use MachineInstr& instead of MachineInstr* in RegAllocFast to avoid
implicit conversions from MachineInstrBundleIterator.  RAFast::spillAll
and RAFast::spillVirtReg still take iterators, since their argument may
be an end iterator from MachineBasicBlock::getFirstTerminator.

llvm-svn: 274353
2016-07-01 15:03:37 +00:00
Craig Topper 90d7664a22 [CodeGen] Cleanup getVectorShuffle a bit to take advantage of its new ArrayRef argument and its begin/end iterators. Also use 'int' type for number of elements and loop iterators to remove several typecasts. No functional change intended.
llvm-svn: 274338
2016-07-01 06:54:51 +00:00
Craig Topper 2bd8b4b180 [CodeGen,Target] Remove the version of DAG.getVectorShuffle that takes a pointer to a mask array. Convert all callers to use the ArrayRef version. No functional change intended.
For the most part this simplifies all callers. There were two places in X86 that needed an explicit makeArrayRef to shorten a statically sized array.

llvm-svn: 274337
2016-07-01 06:54:47 +00:00
Eric Christopher 36e601c6dc Add support for allowing us to create uniquely identified "COMDAT" or "ELF
Group" sections while lowering. In particular, for ELF sections this is
useful for creating function-specific groups that get merged into the
same named section.

Also use const Twine& instead of StringRef for the getELF functions
while we're here.

Differential Revision: http://reviews.llvm.org/D21743

llvm-svn: 274336
2016-07-01 06:07:38 +00:00
Eric Christopher 0b6537e6e5 80-column and comment fixups.
llvm-svn: 274335
2016-07-01 06:07:31 +00:00
Xinliang David Li 93926acbb2 [MBP] method interface cleanup
Make worklist and ehworklist member of the
class so that they don't need to be passed around.

llvm-svn: 274333
2016-07-01 05:46:48 +00:00
Reid Kleckner b5af11dfa3 [codeview] Add DISubprogram::ThisAdjustment
Summary:
This represents the adjustment applied to the implicit 'this' parameter
in the prologue of a virtual method in the MS C++ ABI. The adjustment is
always zero unless multiple inheritance is involved.

This increases the size of DISubprogram by 8 bytes, unfortunately. The
adjustment really is a signed 32-bit integer. If this size increase is
too much, we could probably win it back by splitting out a subclass with
info specific to virtual methods (virtuality, vindex, thisadjustment,
containingType).

Reviewers: aprantl, dexonsmith

Subscribers: aaboud, amccarth, llvm-commits

Differential Revision: http://reviews.llvm.org/D21614

llvm-svn: 274325
2016-07-01 02:41:21 +00:00
Duncan P. N. Exon Smith d26fdc83c9 CodeGen: Use MachineInstr& in LiveVariables API, NFC
Change all the methods in LiveVariables that expect non-null
MachineInstr* to take MachineInstr& and update the call sites.  This
clarifies the API, and designs away a class of iterator to pointer
implicit conversions.

llvm-svn: 274319
2016-07-01 01:51:32 +00:00
Duncan P. N. Exon Smith 1df1d1dcfc CodeGen: Remove implicit iterator conversions in PHIElimination, NFC
llvm-svn: 274317
2016-07-01 01:27:19 +00:00
Duncan P. N. Exon Smith 762c5ca3ee CodeGen: Use MachineInstr& in PostRASchedulerList, NFC
Remove another unnecessary iterator to pointer conversion.

llvm-svn: 274315
2016-07-01 01:18:53 +00:00
Duncan P. N. Exon Smith 286d94884b CodeGen: Use MachineInstr& in PostRAHazardRecognizer, NFC
Convert a loop to a range-based for, using MachineInstr& instead of
MachineInstr* and removing an implicit conversion from iterator to
pointer.

llvm-svn: 274311
2016-07-01 00:50:29 +00:00
Duncan P. N. Exon Smith 6e3ac34202 CodeGen: Use MachineInstr& in PrologEpilogInserter, NFC
Use MachineInstr& over MachineInstr* to avoid implicit iterator to
pointer conversions.  MachineInstr*-as-nullptr was being used as a flag
for whether the for loop terminated normally; I added an explicit `bool`
instead.

llvm-svn: 274310
2016-07-01 00:40:57 +00:00
Duncan P. N. Exon Smith 632987296f Target: Remove unused arguments from overrideSchedPolicy, NFC
TargetSubtargetInfo::overrideSchedPolicy takes two MachineInstr*
arguments (begin and end) that invite implicit conversions from
MachineInstrBundleIterator.  One option would be to change their type to
an iterator, but since they don't seem to have been used since the API
was added in 2010, I'm deleting the dead code.

llvm-svn: 274304
2016-07-01 00:23:27 +00:00
Duncan P. N. Exon Smith cb38ffa74d CodeGen: Use MachineInstr& in MachineSink, NFC
Use MachineInstr& instead of MachineInstr* in MachineSinker to help
avoid implicit conversions from iterator to pointer.

llvm-svn: 274303
2016-07-01 00:11:48 +00:00
Duncan P. N. Exon Smith 5a7538be61 CodeGen: Use MachineInstr& more in MachineTraceMetrics, NFC
Push MachineInstr& through helper APIs for consistency.  This doesn't
remove any more implicit conversions, but it's a nice cleanup after
r274300.

llvm-svn: 274301
2016-07-01 00:05:40 +00:00
Duncan P. N. Exon Smith 5d2b938bdb CodeGen: Use MachineInstr& in MachineTraceMetrics, NFC
This avoids an implicit conversion from iterator to pointer.

llvm-svn: 274300
2016-06-30 23:53:20 +00:00
Duncan P. N. Exon Smith c73850c702 CodeGen: Use MachineInstr& in LocalStackSlotAllocation, NFC
Avoid a number of implicit conversions from iterator to pointer by using
range-based for and MachineInstr&.

llvm-svn: 274298
2016-06-30 23:39:46 +00:00
Duncan P. N. Exon Smith 07acb3e382 CodeGen: Use range-based for in LiveVariables, NFC
Avoid an implicit iterator to pointer conversion in
LiveVariables::runOnBlock by switching to a range-based for.

llvm-svn: 274297
2016-06-30 23:33:35 +00:00
Duncan P. N. Exon Smith 9129873a93 CodeGen: Use MachineInstr& in HoistSpillHelper, NFC
Avoid another few implicit conversions from iterator to pointer.

llvm-svn: 274295
2016-06-30 23:28:15 +00:00
Duncan P. N. Exon Smith fb612acff7 CodeGen: Use MachineInstr& in LDVImpl::handleDebugValue, NFC
Avoid another implicit conversion from iterator to pointer.

llvm-svn: 274294
2016-06-30 23:13:38 +00:00
Duncan P. N. Exon Smith a62287b323 CodeGen: Use MachineInstr& in ExpandISelPseudos, NFC
Avoid another implicit conversion from MachineInstrBundleIterator to
MachineInstr* by using MachineInstr&.

llvm-svn: 274292
2016-06-30 23:09:39 +00:00
Duncan P. N. Exon Smith 0490cdeb33 CodeGen: Use MachineInstr& in IfConversion, NFC
Switch to a range-based for in IfConverter::PredicateBlock and take
MachineInstr& in MaySpeculate to avoid an implicit conversion from
MachineBasicBlock::iterator to MachineInstr*.

llvm-svn: 274290
2016-06-30 23:04:51 +00:00
Duncan P. N. Exon Smith e4f5e4f4d1 CodeGen: Use MachineInstr& in TargetLowering, NFC
This is a mechanical change to make TargetLowering API take MachineInstr&
(instead of MachineInstr*), since the argument is expected to be a valid
MachineInstr.  In one case, changed a parameter from MachineInstr* to
MachineBasicBlock::iterator, since it was used as an insertion point.

As a side effect, this removes a bunch of MachineInstr* to
MachineBasicBlock::iterator implicit conversions, a necessary step
toward fixing PR26753.

llvm-svn: 274287
2016-06-30 22:52:52 +00:00
Yunzhong Gao b386955adc Add an artificial line-0 debug location when the compiler emits a call to
__stack_chk_fail(). This avoids a compiler crash.

Differential Revision: http://reviews.llvm.org/D21818

llvm-svn: 274263
2016-06-30 18:49:04 +00:00
Rafael Espindola d86e8bb0ed Delete MCCodeGenInfo.
MC doesn't really care about CodeGen stuff, so this was just
complicating target initialization.

llvm-svn: 274258
2016-06-30 18:25:11 +00:00
Etienne Bergeron 078d8f69b6 revert http://reviews.llvm.org/D21101
llvm-svn: 274251
2016-06-30 17:52:24 +00:00
Etienne Bergeron 47cf4eabe6 [exceptions] Upgrade exception handlers when stack protector is used
Summary:
MSVC provide exception handlers with enhanced information to deal with security buffer feature (/GS).

To be more secure, the security cookies (GS and SEH) are validated when unwinding the stack.

The following code:
```
void f() {}

void foo() {
  __try {
    f();
  } __except(1) {
    f();
  }
}
```

Reviewers: majnemer, rnk

Subscribers: thakis, llvm-commits, chrisha

Differential Revision: http://reviews.llvm.org/D21101

llvm-svn: 274239
2016-06-30 15:36:59 +00:00
Rafael Espindola db6bd02185 Delete unused includes. NFC.
llvm-svn: 274225
2016-06-30 12:19:16 +00:00
David Majnemer 9319cbc045 [CodeView] Implement support for bitfields in LLVM
CodeView need to know the offset of the storage allocation for a
bitfield.  Encode this via the "extraData" field in DIDerivedType and
introduced a new flag, DIFlagBitField, to indicate whether or not a
member is a bitfield.

This fixes PR28162.

Differential Revision: http://reviews.llvm.org/D21782

llvm-svn: 274200
2016-06-30 03:00:20 +00:00
Matthias Braun f7493393fc RegisterScavenging: Code cleanup; NFC
- Use range based for loops
- No need for some !Reg checks: isPhysicalRegister() reports false for
  NoRegister anyway
- Do not repeat function name in documentation comment.
- Do not repeat documentation comment in implementation when we already
  have one at the declaration.
- Factor some common subexpressions out.
- Change file comments to use doxygen syntax.

llvm-svn: 274194
2016-06-30 00:23:54 +00:00
Duncan P. N. Exon Smith 9cfc75c214 CodeGen: Use MachineInstr& in TargetInstrInfo, NFC
This is mostly a mechanical change to make TargetInstrInfo API take
MachineInstr& (instead of MachineInstr* or MachineBasicBlock::iterator)
when the argument is expected to be a valid MachineInstr.  This is a
general API improvement.

Although it would be possible to do this one function at a time, that
would demand a quadratic amount of churn since many of these functions
call each other.  Instead I've done everything as a block and just
updated what was necessary.

This is mostly mechanical fixes: adding and removing `*` and `&`
operators.  The only non-mechanical change is to split
ARMBaseInstrInfo::getOperandLatencyImpl out from
ARMBaseInstrInfo::getOperandLatency.  Previously, the latter took a
`MachineInstr*` which it updated to the instruction bundle leader; now,
the latter calls the former either with the same `MachineInstr&` or the
bundle leader.

As a side effect, this removes a bunch of MachineInstr* to
MachineBasicBlock::iterator implicit conversions, a necessary step
toward fixing PR26753.

Note: I updated WebAssembly, Lanai, and AVR (despite being
off-by-default) since it turned out to be easy.  I couldn't run tests
for AVR since llc doesn't link with it turned on.

llvm-svn: 274189
2016-06-30 00:01:54 +00:00
Matthias Braun 14cdab6492 PrologEpilogInserter: Some code cleanup; NFC
- Use range based for
- Use the more common variable names MBB and MF for
  MachineBasicBlock/MachineFunction variables.
- Add a few const modifiers

llvm-svn: 274187
2016-06-29 23:54:42 +00:00
Evgeniy Stepanov a5da256f92 StackColoring for SafeStack.
This is a fix for PR27842.

An IR-level implementation of stack coloring tailored to work with
SafeStack. It is a bit weaker than the MI implementation in that it
does not the "lifetime start at first access" logic. This can be
improved in the future.

This patch also replaces the naive implementation of stack frame
layout with a greedy algorithm that can split existing stack slots
and even fit small objects inside the alignment padding of other
objects.

llvm-svn: 274162
2016-06-29 20:37:43 +00:00
Craig Topper 3a011de10c [DAGCombine] Teach DAG combine to handle ORs of shuffles involving zero vectors where the zero vector is the first operand to the shuffle instead of the second.
llvm-svn: 274097
2016-06-29 03:29:12 +00:00
Craig Topper f067a043fb [CodeGen] Make ShuffleVectorSDNode::commuteMask take a MutableArrayRef instead of SmallVectorImpl. NFC.
llvm-svn: 274095
2016-06-29 03:29:06 +00:00
Kyle Butt 82c2290e0f Codegen: [MBP] Add messages to asserts. NFC
llvm-svn: 274075
2016-06-28 22:50:54 +00:00
Rafael Espindola b1556c42ce Use isPositionIndependent in a few more places.
I think this converts all the simple cases that really just care about
the generated code being position independent or not. The remaining
uses are a bit more complicated and are checking things like "is this
a library or executable" or "can this symbol be preempted".

llvm-svn: 274055
2016-06-28 20:13:36 +00:00
Krzysztof Parzyszek 5db97acfa2 Fix typo
llvm-svn: 274051
2016-06-28 19:12:28 +00:00