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3 Commits

Author SHA1 Message Date
Tom Stellard cb6ba62d6f AMDGPU/SI: Enable the post-ra scheduler 
Summary:
This includes a hazard recognizer implementation to replace some of
the hazard handling we had during frame index elimination.

Reviewers: arsenm

Subscribers: qcolombet, arsenm, llvm-commits

Differential Revision: http://reviews.llvm.org/D18602

llvm-svn: 268143
 2016-04-30 00:23:06 +00:00
Marek Olsak f924dd6f3c AMDGPU/SI: use S_AND for i1 trunc 
llvm-svn: 251630
 2015-10-29 15:05:03 +00:00
Tom Stellard 45bb48ea19 R600 -> AMDGPU rename 
llvm-svn: 239657
 2015-06-13 03:28:10 +00:00