4 Commits

Author	SHA1	Message	Date
Eric Christopher	d913448b38	Remove the TargetMachine forwards for TargetSubtargetInfo based ... information and update all callers. No functional change. llvm-svn: 214781	2014-08-04 21:25:23 +00:00
Chad Rosier	5908ab4dd6	[AArch64] Extend the number of scalar instructions supported in the AdvSIMD ... scalar integer instruction pass. This is a patch I had lying around from a few months ago. The pass is currently disabled by default, so nothing to interesting. llvm-svn: 214779	2014-08-04 21:20:25 +00:00
Benjamin Kramer	1f8930e3d3	Run sort_includes.py on the AArch64 backend. ... No functionality change. llvm-svn: 213938	2014-07-25 11:42:14 +00:00
Tim Northover	3b0846e8f7	AArch64/ARM64: move ARM64 into AArch64's place ... This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. llvm-svn: 209577	2014-05-24 12:50:23 +00:00