Commit Graph

122 Commits

Author SHA1 Message Date
Matheus Almeida a2cd009c51 [mips] Add support to '.set mips64r2'.
The '.set mips64r2' directive enables the feature Mips:FeatureMips64r2
from assembly. Note that it doesn't modify the ELF header as opposed
to the use of -mips64r2 from the command-line. The reason for this
is that we want to be as compatible as possible with existing assemblers
like GAS.

llvm-svn: 204815
2014-03-26 14:52:22 +00:00
Matheus Almeida fe1e39dcba [mips] Hoist common functionality into a new function.
Given that we support multiple directives that enable a particular feature
(e.g. '.set mips16'), it's best to hoist that code into a new function
so that we don't repeat the same pattern w.r.t parsing and handling error cases.

No functional changes.

llvm-svn: 204811
2014-03-26 14:26:27 +00:00
Matheus Almeida f79b281421 [mips] Add support for '.option pic2'.
The directive '.option pic2' enables PIC from assembly source.
At the moment none of the macros/directives check the PIC bit
but that's going to be fixed relatively soon. For example, the
expansion of macros like 'la' depend on the relocation model.

llvm-svn: 204803
2014-03-26 13:40:29 +00:00
Daniel Sanders a4b0c74765 [mips] The register names depend on the ABI being N32/N64 rather than the arch being mips64
Summary: Added test cases for O32 and N32 on MIPS64.

Reviewers: matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3175

llvm-svn: 204796
2014-03-26 11:39:07 +00:00
Daniel Sanders 85f482b02f [mips] $s8 is an alias for $fp in all ABI's, not just N32/N64.
llvm-svn: 204793
2014-03-26 11:05:24 +00:00
Daniel Sanders 71a89d92f6 [mips] '.set at=$0' should be equivalent to '.set noat'
Differential Revision: http://llvm-reviews.chandlerc.com/D3171

llvm-svn: 204714
2014-03-25 13:01:06 +00:00
Daniel Sanders b1d7e53a26 [mips] Correct testcase for .set at=$reg and emit the new warnings for numeric registers too.
Summary:
Remove the XFAIL added in my previous commit and correct the test such that
it correctly tests the expansion of the assembler temporary.

Also added a test to check that $at is always $1 when written by the
user.

Corrected the new assembler temporary warnings so that they are emitted for
numeric registers too.

Differential Revision: http://llvm-reviews.chandlerc.com/D3169

llvm-svn: 204711
2014-03-25 11:16:03 +00:00
Daniel Sanders e231ae9e3a [mips] Fix assembler temporary expansion and add associated warnings about the use of $at.
Summary:
The assembler temporary is normally $at ($1) but can be reassigned using
'.set at=$reg'. Regardless of which register is nominated as the assembler
temporary, $at remains $1 when written by the user.

Adds warnings under the following conditions:
* The register nominated as the assembler temporary is used by the user.
* '.set noat' is in effect and $at is used by the user.
Both of these only work for named registers. I have a follow up commit that makes it work for numeric registers as well.

XFAIL set-at-directive.s since it incorrectly tests that $at is redefined by
'.set at=$reg'. Testcases will follow in a separate commit.

Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

Differential Revision: http://llvm-reviews.chandlerc.com/D3167

llvm-svn: 204710
2014-03-25 10:57:07 +00:00
Daniel Sanders d89b13625e [mips] Add error message when trying to use $at in '.set noat' mode.
Summary:
Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

Differential Revision: http://llvm-reviews.chandlerc.com/D3158

llvm-svn: 204621
2014-03-24 16:48:01 +00:00
Daniel Sanders a771fefb72 [mips] Implement shorthand add / sub forms for MIPS.
Summary:
- If only two registers are passed to a three-register operation, then the
  first argument is both source and destination register.

- If a non-register is passed as the last argument, generate the immediate
  version of the instruction.

Also mark DADD commutative and add scheduling information (to the generic
scheduler), and implement DSUB.

Patch by David Chisnall
His work was sponsored by: DARPA, AFRL

CC: theraven

Differential Revision: http://llvm-reviews.chandlerc.com/D3148

llvm-svn: 204605
2014-03-24 14:05:39 +00:00
Matheus Almeida 64459d296b [mips] Assembly parser must invoke the target streamer to handle .set reorder macro.
llvm-svn: 203459
2014-03-10 13:21:10 +00:00
Vladimir Medic 27c398e38c This patch implements .set dsp directive and sets appropriate feature bits.This directive is a counterpart of -mattr=dsp command line option with the exception that it does not influence elf header flags. The usage example is gives in test file.
llvm-svn: 202966
2014-03-05 11:05:09 +00:00
Vladimir Medic 615b26e1cd This patch implements .set mips32r2 directive and sets appropriate feature bits. It also introduces helper functions that are used to set and clear feature bits as necessary. This directive is a counterpart of -mips32r2 command line options with the exception that it does not influence elf header flags. The usage example is gives in test file.
llvm-svn: 202807
2014-03-04 09:54:09 +00:00
Daniel Sanders 5a1449dab4 [mips] Make it impossible to have UnknownABI in CodeGen and Integrated Assembler.
Summary:
This removes the need to coerce UnknownABI to the default ABI (O32 for
MIPS32, N64 for MIPS64 [*]) in both MipsSubtarget and MipsAsmParser.

Clang has been updated to disable both possible default ABI's before enabling
the ABI it intends to use.

[*] N64 being the default for MIPS64 is not actually correct.
    However N32 is not fully implemented/tested yet.

Depends on: D2830

Reviewers: jacksprat, matheusalmeida

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D2832
Differential Revision: http://llvm-reviews.chandlerc.com/D2846

llvm-svn: 201792
2014-02-20 14:58:19 +00:00
Petar Jovanovic a5da588b2f [mips] Implement %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions
Patch implements %hi(sym1 - sym2) and %lo(sym1 - sym2) expressions for MIPS
by creating target expression class MipsMCExpr.

Patch by Sasa Stankovic.

Differential Revision: http://llvm-reviews.chandlerc.com/D2592

llvm-svn: 200783
2014-02-04 18:41:57 +00:00
Matheus Almeida d534fc3d0c [mips] Fix typo.
llvm-svn: 200465
2014-01-30 13:40:26 +00:00
David Woodhouse e6c13e4abd Change MCStreamer EmitInstruction interface to take subtarget info
llvm-svn: 200345
2014-01-28 23:12:42 +00:00
Rafael Espindola cb1953f6d9 Implement the missing bits corresponding to .mips_hack_elf_flags.
These were:
* noreorder handling on the target object streamer and asm parser.
* setting the initial flag bits based on the enabled features.
* setting the elf header flag for micromips

It is *really* depressing I am the one doing this instead of someone at
mips actually taking the time to understand the infrastructure.

llvm-svn: 200138
2014-01-26 06:57:13 +00:00
Rafael Espindola 14d02fe5c8 This reverts commit r200064 and r200051.
r200064 depends on r200051.

r200051 is broken: I tries to replace .mips_hack_elf_flags, which is a good
thing, but what it replaces it with is even worse.

The new emitMipsELFFlags it adds corresponds to no assembly directive, is not
marked as a hack and is not even printed to the .s file.

The patch also introduces more uses of hasRawTextSupport.

The correct way to remove .mips_hack_elf_flags is to have the mips target
streamer handle the default flags (and command line options). That way the
same code path is used for asm and obj. The streamer interface should *really*
correspond to what is printed in the .s file.

llvm-svn: 200078
2014-01-25 15:06:56 +00:00
Jack Carter ca2ae49d55 [Mips] TargetStreamer ELF flag Support for default and commandline options.
This patch uses a common MipsTargetSteamer interface for both 
MipsAsmPrinter and MipsAsmParser for recording default and commandline
driven directives that affect ELF header flags.

It has been noted that the .ll tests affected by this patch belong in
test/Codegen/Mips. I will move them in a separate patch.

Also, a number of directives do not get expressed by AsmPrinter in the 
resultant .s assembly such as setting the correct ASI. I have noted this
in the tests and they will be addressed in later patches.

llvm-svn: 200051
2014-01-25 00:24:07 +00:00
Alp Toker cb40291100 Fix known typos
Sweep the codebase for common typos. Includes some changes to visible function
names that were misspelt.

llvm-svn: 200018
2014-01-24 17:20:08 +00:00
Rafael Espindola e75837564c Unify duplicated functions.
llvm-svn: 200014
2014-01-24 16:13:20 +00:00
Jack Carter 3b2c96ee86 [Mips] formatting through clang-format
llvm-svn: 199853
2014-01-22 23:31:38 +00:00
Jack Carter 39536724a7 [Mips] TargetStreamer Support for .set mips16.
This patch updates .set mips16 support which
affects the ELF ABI and its flags. In addition the patch uses
a common interface for both the MipsTargetSteamer and
MipsObjectStreamer that the assembler uses for
both ELF and ASCII output for these directives.

llvm-svn: 199851
2014-01-22 23:08:42 +00:00
Rafael Espindola 6d5f7ce348 Replace .mips_hack_stocg with ".set micromips" and ".set nomicromips".
This matches what gnu as does and implementing this is easier than arguing
about it.

llvm-svn: 199181
2014-01-14 04:25:13 +00:00
Rafael Espindola 4a1a360634 Make getTargetStreamer return a possibly null pointer.
This will allow it to be called from target independent parts of the main
streamer that don't know if there is a registered target streamer or not. This
in turn will allow targets to perform extra actions at specified points in the
interface: add extra flags for some labels, extra work during finalization, etc.

llvm-svn: 199174
2014-01-14 01:21:46 +00:00
Saleem Abdulrasool a6505ca4c2 correct target directive handling error handling
The target specific parser should return `false' if the target AsmParser handles
the directive, and `true' if the generic parser should handle the directive.
Many of the target specific directive handlers would `return Error' which does
not follow these semantics.  This change simply changes the target specific
routines to conform to the semantis of the ParseDirective correctly.

Conformance to the semantics improves diagnostics emitted for the invalid
directives.  X86 is taken as a sample to ensure that multiple diagnostics are
not presented for a single error.

llvm-svn: 199068
2014-01-13 01:15:39 +00:00
Chandler Carruth 8a8cd2bab9 Re-sort all of the includes with ./utils/sort_includes.py so that
subsequent changes are easier to review. About to fix some layering
issues, and wanted to separate out the necessary churn.

Also comment and sink the include of "Windows.h" in three .inc files to
match the usage in Memory.inc.

llvm-svn: 198685
2014-01-07 11:48:04 +00:00
Jack Carter 0cd3c19f33 [Mips] TargetStreamer Support for .abicalls and .set pic0.
This patch adds .abicalls and .set pic0 support which
affects the ELF ABI and its flags. In addition the patch uses
a common interface for both the MipsTargetSteamer and
MipsObjectStreamer that both the integrated and standalone
assemblers will use for the output for these directives.

llvm-svn: 198646
2014-01-06 23:27:31 +00:00
Matheus Almeida e0d75aacf1 [mips] Add checks for alignment and maximum displacements for most of the
branch instructions for mips and micromips instruction sets thus avoiding
the situation of generating branches to undesired locations if offsets
cannot be encoded.

This patch also checks if a fixup cannot be applied and returns a fatal error
if that's the case.

llvm-svn: 197223
2013-12-13 11:11:02 +00:00
Vladimir Medic 0d02be37c2 Method parseSetAssignment treats every operand with '$' sign as register and the parsing is directed to set alias for register. This will result in errors reported when expressions containing label references are parsed(for example long jumps)
As we can't make a complete solution now it has been decided to enable .set directive to handle long jump expressions. This will cause parser to report errors when parsing integer based register assignments, for example:
   .set r3, will be reported as error. Still, the need for expressions is higher priority as the integer based register assignments are Mips specific and can be avoided using register names.

llvm-svn: 196773
2013-12-09 11:03:25 +00:00
Jack Carter 6ef6cc5c40 reverts 195057 per request
llvm-svn: 195152
2013-11-19 20:53:28 +00:00
Jack Carter b9fd457a32 [Mips] Support for MicroMips STO refactoring.
No true functional changes.

Change the "hack" name of emitMipsHackSTOCG to emitSymSTO.

Remove demonstration code in AsmParser for emitMipsHackSTOCG and
emitMipsHackELFFlags. The STO field is in an ELF symbol and is not
an explicit directive. That said, we are missing the compliment call
in AsmParser and that will need to be addressed soon.

XFAIL dummy tests for emitMipsHackELFFlags and emitMipsHackELFFlags.
These will built out with following patches.

llvm-svn: 195067
2013-11-19 01:25:18 +00:00
Matheus Almeida 779c593708 [mips][msa] Fix immediate value of LSA instruction as it was being wrongly encoded.
The immediate field should be encoded as "imm - 1" as the CPU always adds one to that field.

llvm-svn: 195004
2013-11-18 12:32:49 +00:00
Vladimir Medic e10c1125df Fix bug in .gpword directive parsing.
llvm-svn: 194570
2013-11-13 13:18:04 +00:00
Vladimir Medic 77ffd7af4d This patch fixes a bug in floating point operands parsing, when instruction alias uses default register operand.
llvm-svn: 194562
2013-11-13 09:48:53 +00:00
Vladimir Medic 4c29985cd0 Implement gpword directive for mips, test case added. Stype changes using clang-format are also included.
llvm-svn: 194145
2013-11-06 11:27:05 +00:00
Matheus Almeida a591fdc63c [mips][msa] Direct Object Emission support for CTCMSA and CFCMSA.
These instructions are logically related as they allow read/write of MSA control registers.
Currently MSA control registers are emitted by number but hopefully that will change as soon 
as GAS starts accepting them by name as that would make the assembly easier to read.

llvm-svn: 193078
2013-10-21 12:26:50 +00:00
Matheus Almeida b74293dc55 [mips][msa] Direct Object Emission of INSERT.{B,H,W} instruction.
INSERT is the first type of MSA instruction that requires a change to the way
MSA registers are parsed. This happens because MSA registers may be suffixed by
an index in the form of an immediate or a general purpose register. The changes
to parseMSARegs reflect that requirement.

llvm-svn: 192582
2013-10-14 11:49:30 +00:00
Matheus Almeida 3372c6adb1 This reverts 192447 because of compiler warning generated on darwin build.
llvm-svn: 192451
2013-10-11 13:58:32 +00:00
Matheus Almeida 3d0933c425 [mips][msa] Direct Object Emission of INSERT.{B,H,W} instruction.
INSERT is the first type of MSA instruction that requires a change to the way MSA registers are parsed. 
This happens because MSA registers may be suffixed by an index in the form of an immediate or a
 general purpose register. The changes to parseMSARegs reflect that requirement.

llvm-svn: 192447
2013-10-11 13:29:36 +00:00
Rafael Espindola a17151ad5a Add a MCTargetStreamer interface.
This patch fixes an old FIXME by creating a MCTargetStreamer interface
and moving the target specific functions for ARM, Mips and PPC to it.

The ARM streamer is still declared in a common place because it is
used from lib/CodeGen/ARMException.cpp, but the Mips and PPC are
completely hidden in the corresponding Target directories.

I will send an email to llvmdev with instructions on how to use this.

llvm-svn: 192181
2013-10-08 13:08:17 +00:00
Rafael Espindola ac4ad25a00 Remove some really nasty uses of hasRawTextSupport.
When MC was first added, targets could use hasRawTextSupport to keep features
working before they were added to the MC interface.

The design goal of MC is to provide an uniform api for printing assembly and
object files. Short of relaxations and other corner cases, a object file is
just another representation of the assembly.

It was never the intention that targets would keep doing things like

if (hasRawTextSupport())
  Set flags in one way.
else
  Set flags in another way.

When they do that they create two code paths and the object file is no longer
just another representation of the assembly. This also then requires testing
with llc -filetype=obj, which is extremelly brittle.

This patch removes some of these hacks by replacing them with smaller ones.
The ARM flag setting is trivial, so I just moved it to the constructor. For
Mips, the patch adds two temporary hack directives that allow the assembly
to represent the same things as the object file was already able to.

The hope is that the mips developers will replace the hack directives with
the same ones that gas uses and drop the -print-hack-directives flag.

I will also try to implement a target streamer interface, so that we can
move this out of the common code.

In summary, for any new work, two rules of the thumb are
  * Don't use "llc -filetype=obj" in tests.
  * Don't add calls to hasRawTextSupport.

llvm-svn: 192035
2013-10-05 16:42:21 +00:00
Jack Carter 13d5f753f8 reverting per request
llvm-svn: 191992
2013-10-04 22:52:31 +00:00
Jack Carter 721726adfc [MC][AsmParser] Hook for post assembly file processing
This patch handles LLVM standalone assembler (llvm-mc) ELF flag setting based on input file
directive processing.

Mips assembly requires processing inline directives that directly and
indirectly affect the output ELF header flags. This patch handles one
".abicalls".

To process these directives we are following the model the code generator
uses by storing state in a container as we go through processing and when
we detect the end of input file processing, AsmParser is notified and we
update the ELF header flags through a MipsELFStreamer method with a call from
MCTargetAsmParser::emitEndOfAsmFile(MCStreamer &OutStreamer).

This patch will allow other targets the same functionality.

Jack

llvm-svn: 191982
2013-10-04 21:26:15 +00:00
Vladimir Medic 2b953d0b39 This patch adds aliases for Mips sub instruction with immediate operands. Corresponding test cases are added.
llvm-svn: 191734
2013-10-01 09:48:56 +00:00
Jack Carter 5dc8ac92b9 [mips][msa] Direct Object Emission support for the MSA instruction set.
In more detail, this patch adds the ability to parse, encode and decode MSA registers ($w0-$w31). The format of 2RF instructions (MipsMSAInstrFormat.td) was updated so that we could attach a test case to this patch i.e., the test case parses, encodes and decodes 2 MSA instructions. Following patches will add the remainder of the instructions.

Note that DecodeMSA128BRegisterClass is missing from MipsDisassembler.td because it's not yet required at this stage and having it would cause a compiler warning (unused function).

Patch by Matheus Almeida

llvm-svn: 191412
2013-09-25 23:50:44 +00:00
Vladimir Medic 05bcde6d9a This patch implements Mips load/store instructions from/to coprocessor 2. Test cases are added.
llvm-svn: 190780
2013-09-16 10:29:42 +00:00
Joey Gouly 0e76fa7df5 Add an instruction deprecation feature to TableGen.
The 'Deprecated' class allows you to specify a SubtargetFeature that the
instruction is deprecated on.

The 'ComplexDeprecationPredicate' class allows you to define a custom
predicate that is called to check for deprecation.
For example:
  ComplexDeprecationPredicate<"MCR">

would mean you would have to define the following function:
  bool getMCRDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI,
                             std::string &Info)

Which returns 'false' for not deprecated, and 'true' for deprecated
and store the warning message in 'Info'.

The MCTargetAsmParser constructor was chaned to take an extra argument of
the MCInstrInfo class, so out-of-tree targets will need to be changed.

llvm-svn: 190598
2013-09-12 10:28:05 +00:00
Vladimir Medic 65cd57445e Add test cases for Mips mthc1/mfhc1 instructions. Add check for odd value of register when PFU is 32 bit.
llvm-svn: 190397
2013-09-10 09:50:01 +00:00