25e6e06e42
Try to reuse the value when lowering memset.
...
This allows us to compile:
void test(char *s, int a) {
__builtin_memset(s, a, 15);
}
into 1 mul + 3 stores instead of 3 muls + 3 stores.
llvm-svn: 122710
2011-01-02 19:57:05 +00:00
68b7bb95d4
A workaround for a bug in cmake 2.8.3 diagnosed on PR 8885.
...
llvm-svn: 122706
2011-01-02 19:32:31 +00:00
51415d26f1
update a bunch of entries.
...
llvm-svn: 122700
2011-01-02 18:31:38 +00:00
d606e54757
Add support for the 'H' modifier.
...
llvm-svn: 122667
2011-01-01 20:58:46 +00:00
a8eb60436b
Add to the list of cmake files the object file, not the asm file. This
...
is necessary for executing the custom command that runs the
assember. Fixes PR8877.
llvm-svn: 122649
2010-12-31 20:15:37 +00:00
ee0432ce08
Add another non-commutable instruction that gas accepts commuted forms for.
...
Fixes PR8861.
llvm-svn: 122641
2010-12-30 22:10:49 +00:00
de8fda8908
CMake: Add disabling optimization on MSVC8 and MSVC10 as workaround for some files in Target/ARM and Target/X86.
...
llvm-svn: 122623
2010-12-29 03:59:27 +00:00
2ac8355ecd
Add support for the same encodings of the personality function that gnu as
...
supports.
llvm-svn: 122577
2010-12-27 00:36:05 +00:00
f9e0a56b94
fix some sort of weird pasto
...
llvm-svn: 122560
2010-12-26 12:05:11 +00:00
424de3498b
add a note
...
llvm-svn: 122559
2010-12-26 03:53:31 +00:00
62de0fa671
Code clean up. No functionality change.
...
llvm-svn: 122528
2010-12-23 23:54:17 +00:00
2a0a3b43d7
Flag -> Glue, the ongoing saga
...
llvm-svn: 122513
2010-12-23 18:28:41 +00:00
b37ae33125
Remove some obsolete README items, add a new one off the top of my head.
...
llvm-svn: 122495
2010-12-23 15:07:02 +00:00
6020ed9d99
X86: Lower a select directly to a setcc_carry if possible.
...
int test(unsigned long a, unsigned long b) { return -(a < b); }
compiles to
_test: ## @test
cmpq %rsi, %rdi ## encoding: [0x48,0x39,0xf7]
sbbl %eax, %eax ## encoding: [0x19,0xc0]
ret ## encoding: [0xc3]
instead of
_test: ## @test
xorl %ecx, %ecx ## encoding: [0x31,0xc9]
cmpq %rsi, %rdi ## encoding: [0x48,0x39,0xf7]
movl $-1, %eax ## encoding: [0xb8,0xff,0xff,0xff,0xff]
cmovael %ecx, %eax ## encoding: [0x0f,0x43,0xc1]
ret ## encoding: [0xc3]
llvm-svn: 122451
2010-12-22 23:09:28 +00:00
f6ddc4a1de
Add some x86 specific dagcombines for conditional increments.
...
(add Y, (sete X, 0)) -> cmp X, 1; adc 0, Y
(add Y, (setne X, 0)) -> cmp X, 1; sbb -1, Y
(sub (sete X, 0), Y) -> cmp X, 1; sbb 0, Y
(sub (setne X, 0), Y) -> cmp X, 1; adc -1, Y
for
unsigned foo(unsigned a, unsigned b) {
if (a == 0) b++;
return b;
}
we now get:
foo:
cmpl $1, %edi
movl %esi, %eax
adcl $0, %eax
ret
instead of:
foo:
testl %edi, %edi
sete %al
movzbl %al, %eax
addl %esi, %eax
ret
llvm-svn: 122364
2010-12-21 21:41:44 +00:00
3e5fbd74ed
rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for
...
something that just glues two nodes together, even if it is
sometimes used for flags.
llvm-svn: 122310
2010-12-21 02:38:05 +00:00
4b9db07b02
Implement feedback from Bruno on making pblendvb an x86-specific ISD node in addition to being an intrinsic, and convert
...
lowering to use it. Hopefully the pattern fragment is doing the right thing with XMM0, looks correct in testing.
llvm-svn: 122277
2010-12-20 22:04:24 +00:00
ca2511d849
Add header...
...
llvm-svn: 122247
2010-12-20 15:45:51 +00:00
7da045e59f
X86/MC/Mach-O: Split out createX86MachObjectWriter().
...
llvm-svn: 122246
2010-12-20 15:07:39 +00:00
5c00d41688
now that addc/adde are gone, "ADDC" in the X86 backend uses EFLAGS results,
...
the same as setcc. Optimize ADDC(0,0,FLAGS) -> SET_CARRY(FLAGS). This is
a step towards finishing off PR5443. In the testcase in that bug we now get:
movq %rdi, %rax
addq %rsi, %rax
sbbq %rcx, %rcx
testb $1, %cl
setne %dl
ret
instead of:
movq %rdi, %rax
addq %rsi, %rax
movl $0, %ecx
adcq $0, %rcx
testq %rcx, %rcx
setne %dl
ret
llvm-svn: 122219
2010-12-20 01:37:09 +00:00
46b9efcad7
We lower setb to sbb with the hope that the and will go away, when it
...
doesn't, match it back to setb.
On a 64-bit version of the testcase before we'd get:
movq %rdi, %rax
addq %rsi, %rax
sbbb %dl, %dl
andb $1, %dl
ret
now we get:
movq %rdi, %rax
addq %rsi, %rax
setb %dl
ret
llvm-svn: 122217
2010-12-20 01:16:03 +00:00
9c26d2711b
use for loop over types.
...
llvm-svn: 122214
2010-12-20 01:03:27 +00:00
846c20d4e6
Change the X86 backend to stop using the evil ADDC/ADDE/SUBC/SUBE nodes (which
...
their carry depenedencies with MVT::Flag operands) and use clean and beautiful
EFLAGS dependences instead.
We do this by changing the modelling of SBB/ADC to have EFLAGS input and outputs
(which is what requires the previous scheduler change) and change X86 ISelLowering
to custom lower ADDC and friends down to X86ISD::ADD/ADC/SUB/SBB nodes.
With the previous series of changes, this causes no changes in the testsuite, woo.
llvm-svn: 122213
2010-12-20 00:59:46 +00:00
1064992c84
Prevents PerformShuffleCombine from creating a node with an illegal type after legalize types
...
has run, e.g., prevent creating an i64 node from a v2i64 when i64 is not a legal type.
llvm-svn: 122206
2010-12-19 23:55:53 +00:00
9edf3f50bf
improve the setcc -> setcc_carry optimization to happen more
...
consistently by moving it out of lowering into dag combine.
Add some missing patterns for matching away extended versions of setcc_c.
llvm-svn: 122201
2010-12-19 22:08:31 +00:00
6dddab2ffe
simplify some code to just reuse a setcc if we can instead of
...
going through the CSE maps to get it.
llvm-svn: 122196
2010-12-19 21:23:48 +00:00
c37bb023b1
now that generic vector types aren't selected onto MMX operations,
...
we don't need -disable-mmx anymore.
llvm-svn: 122189
2010-12-19 20:19:20 +00:00
ae756e1980
reduce copy/paste programming with the power of for loops.
...
llvm-svn: 122187
2010-12-19 20:07:10 +00:00
1e8c032a6e
X86 supports i8/i16 overflow ops (except i8 multiplies), we should
...
generate them.
Now we compile:
define zeroext i8 @X(i8 signext %a, i8 signext %b) nounwind ssp {
entry:
%0 = tail call %0 @llvm.sadd.with.overflow.i8(i8 %a, i8 %b)
%cmp = extractvalue %0 %0, 1
br i1 %cmp, label %if.then, label %if.end
into:
_X: ## @X
## BB#0: ## %entry
subl $12, %esp
movb 16(%esp), %al
addb 20(%esp), %al
jo LBB0_2
Before we were generating:
_X: ## @X
## BB#0: ## %entry
pushl %ebp
movl %esp, %ebp
subl $8, %esp
movb 12(%ebp), %al
testb %al, %al
setge %cl
movb 8(%ebp), %dl
testb %dl, %dl
setge %ah
cmpb %cl, %ah
sete %cl
addb %al, %dl
testb %dl, %dl
setge %al
cmpb %al, %ah
setne %al
andb %cl, %al
testb %al, %al
jne LBB0_2
llvm-svn: 122186
2010-12-19 20:03:11 +00:00
8396dd0893
Remove the MCObjectFormat class.
...
llvm-svn: 122147
2010-12-18 05:37:28 +00:00
fdaae0d16f
Move some data to the TargetWriter.
...
llvm-svn: 122134
2010-12-18 03:27:34 +00:00
625ccf8222
Relax push instructions.
...
llvm-svn: 122121
2010-12-18 01:01:34 +00:00
97b72c99d2
Add support for matching psign & plendvb to the x86 target
...
Remove unnecessary pandn patterns, 'vnot' patfrag looks through bitcasts
llvm-svn: 122098
2010-12-17 22:55:37 +00:00
6b5e56c2b1
Stub out explicit MCELFObjectTargetWriter interface.
...
llvm-svn: 122067
2010-12-17 17:45:22 +00:00
f0e24d426a
Move createELFObjectWriter to its own header.
...
llvm-svn: 122064
2010-12-17 16:59:53 +00:00
2ee6c9b8c9
MC/Mach-O: On second thought, use a custom hook for enabling aggressive
...
IsSymbolRefDifferenceFullyResolved, it turns out this does change behavior on
enough cases for x86-32 that I would rather wait a bit on it.
- In practice, we will want to change this eventually because it only means we
generate less relocations (it also eliminates the need for the horrible
'.set' hack that Darwin requires in some places).
llvm-svn: 122042
2010-12-17 05:50:29 +00:00
d2867f13a0
MC/Target: Remove HasScatteredSymbols target hook variable, which has been
...
superceded and was effectively dead.
llvm-svn: 122024
2010-12-17 02:06:08 +00:00
654cc4a81c
Make pushq produce signed relocations.
...
llvm-svn: 122005
2010-12-16 22:50:01 +00:00
03fcccbb47
MC/Mach-O: Lift some MachObjectWriter arguments into the target specific
...
interface.
llvm-svn: 121981
2010-12-16 17:21:02 +00:00
8888a9604d
MC/Mach-O: Stub out explicit MCMachObjectTargetWriter interface.
...
llvm-svn: 121973
2010-12-16 16:09:19 +00:00
73b8713d7c
MC/Mach-O: Move createMachObjectWriter into MCMachObjectWriter.h.
...
llvm-svn: 121971
2010-12-16 16:08:33 +00:00
0c9d9fdd81
MC: Move target specific fixup info descriptors to TargetAsmBackend instead of
...
the MCCodeEmitter, which seems like a better organization.
- Also, cleaned up some magic constants while in the area.
llvm-svn: 121953
2010-12-16 03:20:06 +00:00
be69d8e2f3
Only rr forms of ADD*_DB are commutable.
...
llvm-svn: 121908
2010-12-15 22:57:36 +00:00
f8b4c0035b
Disable auto-detection of AVX support since AVX codegen support is not ready.
...
llvm-svn: 121677
2010-12-13 04:23:53 +00:00
c8b035d006
Factor the (x & 2^n) ? 2^m : 0 instcombine into its own method and generalize it
...
to catch cases where n != m with a shift.
llvm-svn: 121608
2010-12-11 09:42:59 +00:00
0a017a6db2
Fixed version of 121434 with no new memory leaks.
...
llvm-svn: 121471
2010-12-10 07:39:47 +00:00
a945a34c73
Revert my previous patch to make the valgrind bots happy.
...
llvm-svn: 121461
2010-12-10 04:01:09 +00:00
a98b5419fa
Add some missing predicates.
...
llvm-svn: 121445
2010-12-10 00:54:26 +00:00
8b08f5232b
Formalize the notion that AVX and SSE are non-overlapping extensions from the compiler's point of view. Per email discussion, we either want to always use VEX-prefixed instructions or never use them, and are taking "HasAVX" to mean "Always use VEX". Passing -mattr=-avx,+sse42 should serve to restore legacy SSE support when desirable.
...
llvm-svn: 121439
2010-12-10 00:26:57 +00:00
56eb741237
Initial support for the cfi directives. This is just enough to get
...
f:
.cfi_startproc
nop
.cfi_endproc
assembled (on ELF).
llvm-svn: 121434
2010-12-09 23:48:29 +00:00
Benjamin Kramer