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316 Commits

Author SHA1 Message Date
Dale Johannesen 67b818f503 Remove warning about 64-bit code on processor 
that doesn't support it.  Per Chris.

llvm-svn: 47162
 2008-02-15 18:09:51 +00:00
Evan Cheng a20a773654 Fix a x86-64 codegen deficiency. Allow gv + offset when using rip addressing mode. 
Before:
_main:
        subq    $8, %rsp
        leaq    _X(%rip), %rax
        movsd   8(%rax), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret
Now:
_main:
        subq    $8, %rsp
        movsd   _X+8(%rip), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret

Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl    %ecx, %ecx
movl    %ecx, %eax

llvm-svn: 46850
 2008-02-07 08:53:49 +00:00
Nate Begeman e14fdfaecd SSE 4.1 Intrinsics and detection 
llvm-svn: 46681
 2008-02-03 07:18:54 +00:00
Anton Korobeynikov 28d4302807 Enable PIC codegen on x86-64/linux 
llvm-svn: 46198
 2008-01-20 13:58:16 +00:00
Duncan Sands bb956ca730 Use size_t to store Pos, avoid truncating value 
on 64-bit builds.  Analysis and original patch
by Török Edwin.  Code audit found another place
with the same problem, also fixed here.

llvm-svn: 45746
 2008-01-08 10:06:15 +00:00
Chris Lattner cce79c67ca darwin9 and above support aligned common symbols. 
llvm-svn: 45494
 2008-01-02 19:44:55 +00:00
Chris Lattner f3ebc3f3d2 Remove attribution from file headers, per discussion on llvmdev. 
llvm-svn: 45418
 2007-12-29 20:36:04 +00:00
Rafael Espindola 063f177300 Make ARM an X86 memcpy expansion more similar to each other. 
Now both subtarget define getMaxInlineSizeThreshold and the expansion uses it.

This should not change generated code.

llvm-svn: 43552
 2007-10-31 11:52:06 +00:00
Evan Cheng 763cdfd371 Mac OS X X86-64 low 4G address not available. 
llvm-svn: 40701
 2007-08-01 23:45:51 +00:00
Gabor Greif e16561cd5d Here is the bulk of the sanitizing. 
Almost all occurrences of "bytecode" in the sources have been eliminated.

llvm-svn: 37913
 2007-07-05 17:07:56 +00:00
Jeff Cohen 6f3a548ff4 In the event that some really old non-Intel or -AMD CPU is encountered... 
llvm-svn: 36177
 2007-04-16 21:59:44 +00:00
Jeff Cohen da17029218 Before assuming that the original code didn't work for Athlon64, the person who 
replaced it with a FIXME should have determined what did work.  Then he would have
realized that the code was in fact correct, and would have avoided breaking it.

llvm-svn: 36173
 2007-04-16 21:48:58 +00:00
Bill Wendling f099841573 Add support for our first SSSE3 instruction "pmulhrsw". 
llvm-svn: 35869
 2007-04-10 22:10:25 +00:00
Anton Korobeynikov 8aae2d7e1c Autodetect MMX & SSE stuff for AMD processors 
llvm-svn: 35292
 2007-03-23 23:46:48 +00:00
Reid Spencer 5301e7c605 For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid 
confusion with external linkage types.

llvm-svn: 33663
 2007-01-30 20:08:39 +00:00
Anton Korobeynikov 037c867b54 Propagate changes from my local tree. This patch includes: 
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.

NOTEs: 1. Documentation will be updated soon.
       2. llvm-upgrade should be improved to translate csret => sret.
          Before this, there will be some unexpected test fails.
llvm-svn: 33597
 2007-01-28 13:31:35 +00:00
Evan Cheng 1281dc32ef Linux GOT indirect reference is only necessary in PIC mode. 
llvm-svn: 33441
 2007-01-22 21:34:25 +00:00
Anton Korobeynikov 3f6d52834b * Fix one more bug in PIC codegen: extra load is needed for *all* 
non-statics.
* Introduce new option to output zero-initialized data to .bss section.
This can reduce size of binaries. Enable it by default for ELF &
Cygwin/Mingw targets. Probably, Darwin should be also added.

llvm-svn: 33299
 2007-01-17 10:33:08 +00:00
Anton Korobeynikov a0554d90e8 * PIC codegen for X86/Linux has been implemented 
* PIC-aware internal structures in X86 Codegen have been refactored
* Visibility (default/weak) has been added
* Docs fixes (external weak linkage, visibility, formatting)

llvm-svn: 33136
 2007-01-12 19:20:47 +00:00
Anton Korobeynikov 4efbbc963f Really big cleanup. 
- New target type "mingw" was introduced
- Same things for both mingw & cygwin are marked as "cygming" (as in
gcc)
- .lcomm is supported here, so allow LLVM to use it
- Correctly use underscored versions of setjmp & _longjmp for both mingw
& cygwin

llvm-svn: 32833
 2007-01-03 11:43:14 +00:00
Anton Korobeynikov 430e68a1b9 Refactored JIT codegen for mingw32. Now we're using standart relocation 
type for distinguish JIT & non-JIT instead of "dirty" hacks :)

llvm-svn: 32745
 2006-12-22 22:29:05 +00:00
Anton Korobeynikov b3d704c91d Fixed 80 cols & style violation 
llvm-svn: 32720
 2006-12-20 20:40:30 +00:00
Anton Korobeynikov 93acb49182 Fixed dllimported symbols support during JIT'ing. JIT on mingw32 
platform should be more or less workable. At least, sim is running fine
under lli :)

llvm-svn: 32711
 2006-12-20 01:03:20 +00:00
Bill Wendling 9bfb1e1f29 What should be the last unnecessary <iostream>s in the library. 
llvm-svn: 32333
 2006-12-07 22:21:48 +00:00
Anton Korobeynikov 6dbdfe2baa Factor out GVRequiresExtraLoad() from .h to .cpp 
llvm-svn: 32048
 2006-11-30 22:42:55 +00:00
Evan Cheng 8facb43593 16-byte stack alignment for X86-64 ELF. Patch by Dan Gohman. 
llvm-svn: 32004
 2006-11-29 02:00:40 +00:00
Chris Lattner 3e96211bc8 Fix codegen for x86-64 on systems (like ppc or i386) that don't have 64-bit 
features autodetected.  This fixes PR1010 and Regression/CodeGen/X86/xmm-r64.ll
on non-x86-64 hosts.

llvm-svn: 31879
 2006-11-20 18:16:05 +00:00
Evan Cheng 3b3b786f03 Use movl+xchgl instead of pushl+popl. 
llvm-svn: 31572
 2006-11-08 20:35:37 +00:00
Evan Cheng a3e1ad7a61 Proper fix. 
llvm-svn: 30993
 2006-10-17 00:24:49 +00:00
Evan Cheng a8b4aeace0 Proper fix for rdar://problem/4770604 Thanks to Stuart Hastings! 
llvm-svn: 30985
 2006-10-16 21:00:37 +00:00
Evan Cheng 5fe9680253 80 col violation. 
llvm-svn: 30770
 2006-10-06 18:57:51 +00:00
Evan Cheng ff1beda569 Still need to support -mcpu=<> or cross compilation will fail. Doh. 
llvm-svn: 30764
 2006-10-06 09:17:41 +00:00
Evan Cheng 9274f72e58 Do away with CPU feature list. Just use CPUID to detect MMX, SSE, SSE2, SSE3, and 64-bit support. 
llvm-svn: 30763
 2006-10-06 08:21:07 +00:00
Evan Cheng 4c1a804a5b It appears the inline asm in GetCpuIDAndInfo() may clobbers some registers if it isn't inlined (at < -O3). Force it to be inlined. 
llvm-svn: 30762
 2006-10-06 07:50:56 +00:00
Evan Cheng 412aaabcbe Formating. 
llvm-svn: 30722
 2006-10-04 18:33:00 +00:00
Evan Cheng 11b0a5dbd4 Committing X86-64 support. 
llvm-svn: 30177
 2006-09-08 06:48:29 +00:00
Chris Lattner b9e0a9e82f Fix a cross-build issue. The asmsyntax shouldn't be affected by the build 
host, it should be affected by the target.  Allow the command line option to
override in either case.

llvm-svn: 30164
 2006-09-07 22:29:41 +00:00
Jim Laskey c7abe471fe Make the x86 asm flavor part of the subtarget info. 
llvm-svn: 30146
 2006-09-07 12:23:47 +00:00
Evan Cheng d2e9a67cd9 Later models likely to have Yonah like attributes. 
llvm-svn: 28843
 2006-06-16 21:58:49 +00:00
Evan Cheng 2554e3d9ba X86 / Cygwin asm / alignment fixes. 
Patch contributed by Anton Korobeynikov!

llvm-svn: 28480
 2006-05-25 21:59:08 +00:00
Evan Cheng 5588de9415 x86 / Darwin PIC support. 
llvm-svn: 26273
 2006-02-18 00:15:05 +00:00
Evan Cheng 03c1e6f48e A bit more memset / memcpy optimization. 
Turns them into calls to memset / memcpy if 1) buffer(s) are not DWORD aligned,
2) size is not known to be greater or equal to some minimum value (currently 128).

llvm-svn: 26224
 2006-02-16 00:21:07 +00:00
Evan Cheng 43b72f4421 Duh 
llvm-svn: 26180
 2006-02-14 20:37:37 +00:00
Evan Cheng ad8c20cd2b Remove -disable-x86-sse 
llvm-svn: 26179
 2006-02-14 20:30:14 +00:00
Evan Cheng 40b6eb9973 Enable SSE (for the right subtargets) 
llvm-svn: 26169
 2006-02-14 08:07:58 +00:00
Jeff Cohen 8643ea67b1 Flesh out AMD family/models. 
llvm-svn: 25755
 2006-01-28 20:30:18 +00:00
Jeff Cohen 58ca0be9af Correctly determine CPU vendor. 
llvm-svn: 25754
 2006-01-28 19:48:34 +00:00
Jeff Cohen 71287085a1 Use union instead of reinterpret_cast. 
llvm-svn: 25751
 2006-01-28 18:47:32 +00:00
Jeff Cohen b5de47cd9a Fix recognition of Intel CPUs. 
llvm-svn: 25750
 2006-01-28 18:38:20 +00:00
Chris Lattner b3ab2d3a42 Is64Bit reflects the capability of the chip, not an aspect of the target os 
llvm-svn: 25749
 2006-01-28 18:23:48 +00:00
Jeff Cohen e128d5f724 Improve X86 subtarget support for Windows and AMD. 
llvm-svn: 25747
 2006-01-28 18:09:06 +00:00
Chris Lattner dc8bbb6527 make this work on non-native hosts 
llvm-svn: 25734
 2006-01-28 06:05:41 +00:00
Chris Lattner dbfc299915 initialize all instance vars 
llvm-svn: 25711
 2006-01-27 22:37:09 +00:00
Evan Cheng 1073ae07b0 Added a temporary option -enable-x86-sse to enable sse support. It is used by 
llc-beta.

llvm-svn: 25701
 2006-01-27 21:49:34 +00:00
Evan Cheng afab7aa8f2 A better workaround 
llvm-svn: 25692
 2006-01-27 19:30:30 +00:00
Chris Lattner 4be147f456 force sse/3dnow off until they work. This fixes all the x86 failures last night 
llvm-svn: 25690
 2006-01-27 18:30:50 +00:00
Evan Cheng cde9e30bc6 x86 CPU detection and proper subtarget support 
llvm-svn: 25679
 2006-01-27 08:10:46 +00:00
Evan Cheng 54c13da29c Added preliminary x86 subtarget support. 
llvm-svn: 25645
 2006-01-26 09:53:06 +00:00
Chris Lattner 40f8c8450d Simplify the subtarget info, allow the asmwriter to do some target sensing 
based on TargetType.

llvm-svn: 24478
 2005-11-21 22:43:58 +00:00
Chris Lattner 3eb876117a Make the X86 subtarget compute the basic target type: ELF, Cygwin, Darwin, 
or native Win32

llvm-svn: 24476
 2005-11-21 22:31:58 +00:00
Jim Laskey 19058c3989 1. Use SubtargetFeatures in llc/lli. 
2. Propagate feature "string" to all targets.

3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.

llvm-svn: 23192
 2005-09-01 21:38:21 +00:00
Nate Begeman 3bcfcd9474 Add Subtarget support to PowerPC. Next up, using it. 
llvm-svn: 22644
 2005-08-04 07:12:09 +00:00
Jeff Cohen 5f4ef3c5a8 Eliminate all remaining tabs and trailing spaces. 
llvm-svn: 22523
 2005-07-27 06:12:32 +00:00
Nate Begeman df8946dede Clean up the TargetSubtarget class a bit, removing an unnecessary argument 
to the constructor.

llvm-svn: 22392
 2005-07-12 02:41:19 +00:00
Chris Lattner 351817b1f9 Minor changes to improve comments and fix the build on _WIN32 systems. 
llvm-svn: 22391
 2005-07-12 02:36:10 +00:00
Nate Begeman f26625e1de Implement Subtarget support 
Implement the X86 Subtarget.

This consolidates the checks for target triple, and setting options based
on target triple into one place.  This allows us to convert the asm printer
and isel over from being littered with "forDarwin", "forCygwin", etc. into
just having the appropriate flags for each subtarget feature controlling
the code for that feature.

This patch also implements indirect external and weak references in the
X86 pattern isel, for darwin.  Next up is to convert over the asm printers
to use this new interface.

llvm-svn: 22389
 2005-07-12 01:41:54 +00:00