llvm-project

Commit Graph

Author	SHA1	Message	Date
James Molloy	d60571bad7	[ARM64] Port over missing subtarget features, and CPU definitions from AArch64. llvm-svn: 206198	2014-04-14 17:38:00 +00:00
Tim Northover	6d69168ffd	ARM64: use GOT for weak symbols & PIC. Weak symbols cannot use the small code model's usual ADRP sequences since the instruction simply may not be able to encode a value of 0. This redirects them to use the GOT, which hopefully linkers are able to cope with even in the static relocation model. llvm-svn: 205426	2014-04-02 14:39:11 +00:00
Tim Northover	00ed9964c6	ARM64: initial backend import This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090	2014-03-29 10:18:08 +00:00

Author

SHA1

Message

Date

James Molloy

d60571bad7

[ARM64] Port over missing subtarget features, and CPU definitions from AArch64.

llvm-svn: 206198

2014-04-14 17:38:00 +00:00

Tim Northover

6d69168ffd

ARM64: use GOT for weak symbols & PIC.

Weak symbols cannot use the small code model's usual ADRP sequences since the
instruction simply may not be able to encode a value of 0.

This redirects them to use the GOT, which hopefully linkers are able to cope
with even in the static relocation model.

llvm-svn: 205426

2014-04-02 14:39:11 +00:00

Tim Northover

00ed9964c6

ARM64: initial backend import

This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

llvm-svn: 205090

2014-03-29 10:18:08 +00:00

3 Commits