Commit Graph

1 Commits

Author SHA1 Message Date
Shiva Chen 77f19a384c [PATCH] [compiler-rt, RISCV] Support builtins for RISC-V
Summary:
Support builtins for RISC-V, RV32 and RV64.

Reviewers: asb, apazos, mgrang

Differential Revision: https://reviews.llvm.org/D42958

llvm-svn: 326420
2018-03-01 07:47:27 +00:00