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7 Commits

Author SHA1 Message Date
Peter Collingbourne dcd7d6c331 MC: Separate creating a generic object writer from creating a target object writer. NFCI. 
With this we gain a little flexibility in how the generic object
writer is created.

Part of PR37466.

Differential Revision: https://reviews.llvm.org/D47045

llvm-svn: 332868
 2018-05-21 19:20:29 +00:00
Peter Collingbourne 571a3301ae MC: Change MCAsmBackend::writeNopData() to take a raw_ostream instead of an MCObjectWriter. NFCI. 
To make this work I needed to add an endianness field to MCAsmBackend
so that writeNopData() implementations know which endianness to use.

Part of PR37466.

Differential Revision: https://reviews.llvm.org/D47035

llvm-svn: 332857
 2018-05-21 17:57:19 +00:00
Peter Collingbourne 0d8fa1b6fd ARC, Nios2: Silence build warnings. NFCI. 
llvm-svn: 332663
 2018-05-17 20:46:01 +00:00
Peter Collingbourne 28d4ddab86 Nios2: Unbreak build. 
llvm-svn: 332391
 2018-05-15 20:21:58 +00:00
Nikolai Bozhenov 1cf9c54e5c [Nios2] final infrastructure to provide compilation of a return from a function 
This patch includes all missing functionality needed to provide first
compilation of a simple program that just returns from a function.
I've added a test case that checks for "ret" instruction printed in assembly
output.

Patch by Andrei Grischenko (andrei.l.grischenko@intel.com)
Differential revision: https://reviews.llvm.org/D39688

llvm-svn: 320035
 2017-12-07 12:35:02 +00:00
Nikolai Bozhenov ebbde1409f [Nios2] Subtarget, basic infrastructure for frame, instructions and registers 
This is the second minimal patch keeping Nios2 target buildable.
I'm adding subtarget here and other stuff for frame lowering, instruction,
register information methods. I do not add any test cases, as still there
are missing parts like DAG selector and assembly printing. I plan to include
them into the next patch.

Patch by Andrei Grischenko <andrei.l.grischenko@intel.com>

Differential Revision: https://reviews.llvm.org/D37256

llvm-svn: 313626
 2017-09-19 11:54:29 +00:00
Nikolai Bozhenov 82f0801c1b [Nios2] Target registration 
Reviewers: craig.topper, hfinkel, joerg, lattner, zvi

Reviewed By: craig.topper

Subscribers: oren_ben_simhon, igorb, belickim, tvvikram, mgorny, llvm-commits, pavel.v.chupin, DavidKreitzer

Differential Revision: https://reviews.llvm.org/D32669
Patch by AndreiGrischenko <andrei.l.grischenko@intel.com>

llvm-svn: 304144
 2017-05-29 09:48:30 +00:00