wangtao
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
297,703 Commits 29 Branches 0 Tags 2.2 GiB
Commit Graph

3 Commits

Author SHA1 Message Date
Krzysztof Parzyszek 840b02bccf [Hexagon] Add patterns for accumulating HVX compares 
llvm-svn: 333009
 2018-05-22 18:27:02 +00:00
Krzysztof Parzyszek 69f1d7e370 [Hexagon] Handle lowering of SETCC via setCondCodeAction 
It was expanded directly into instructions earlier. That was to avoid
loads from a constant pool for a vector negation: "xor x, splat(i1 -1)".
Implement ISD opcodes QTRUE and QFALSE to denote logical vectors of
all true and all false values, and handle setcc with negations through
selection patterns.

llvm-svn: 324348
 2018-02-06 14:16:52 +00:00
Krzysztof Parzyszek 470760533a [Hexagon] Generate HVX code for comparisons and selects 
llvm-svn: 320744
 2017-12-14 21:28:48 +00:00