llvm-project

Author	SHA1	Message	Date
Tom Stellard	ca69a53bae	Revert "R600: Non vector only instruction can be scheduled on trans unit" This reverts commit 98ce62780ea7185ba710868bf83c8077e8d7f6d6. llvm-svn: 187526	2013-07-31 20:43:27 +00:00
Vincent Lejeune	df18804e26	R600: Non vector only instruction can be scheduled on trans unit llvm-svn: 187514	2013-07-31 19:31:56 +00:00
Tom Stellard	1e80309ebe	R600: Use KCache for kernel arguments Reviewed-by: Vincent Lejeune <vljn at ovi.com> llvm-svn: 186918	2013-07-23 01:48:18 +00:00
Michel Danzer	1290369f7b	R600/SI: Add lit test coverage for the remaining patterns added recently Reviewed-by: Christian König <christian.koenig@amd.com> llvm-svn: 181775	2013-05-14 09:53:30 +00:00
Vincent Lejeune	f97af796a9	R600: Prettier asmPrint of Alu llvm-svn: 180956	2013-05-02 21:52:30 +00:00
Tom Stellard	75aadc2813	Add R600 backend A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX llvm-svn: 169915	2012-12-11 21:25:42 +00:00
Tom Stellard	fc3db614c0	Revert "test/CodeGen/R600: Add some basic tests v6" This reverts commit 11d3457afcda7848448dd7f11b2ede6552ffb9ea. llvm-svn: 160300	2012-07-16 18:19:43 +00:00
Tom Stellard	6693fbe3eb	test/CodeGen/R600: Add some basic tests v6 llvm-svn: 160273	2012-07-16 14:17:19 +00:00