f799e3f944
Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
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This was done with the following sed invocation to catch label lines demarking function boundaries:
sed -i '' "s/^;\( *\)\([A-Z0-9_]*\):\( *\)test\([A-Za-z0-9_-]*\):\( *\)$/;\1\2-LABEL:\3test\4:\5/g" test/CodeGen/*/*.ll
which was written conservatively to avoid false positives rather than false negatives. I scanned through all the changes and everything looks correct.
llvm-svn: 186258
2013-07-13 20:38:47 +00:00
822ddde50d
Disable expensive two-address optimizations at -O0. rdar://10453055
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llvm-svn: 144806
2011-11-16 18:44:48 +00:00
d4e871404d
Update more tests to the new EH scheme.
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llvm-svn: 138903
2011-08-31 21:39:05 +00:00
5a2c70cc8f
add missing colon, thanks peter.
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llvm-svn: 137306
2011-08-11 16:15:10 +00:00
96710b4308
fix PR10605 / rdar://9930964 by adding a pretty scary missed check.
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It's somewhat surprising anything works without this. Before we would
compile the testcase into:
test: # @test
movl $4, 8(%rdi)
movl 8(%rdi), %eax
orl %esi, %eax
cmpl $32, %edx
movl %eax, -4(%rsp) # 4-byte Spill
je .LBB0_2
now we produce:
test: # @test
movl 8(%rdi), %eax
movl $4, 8(%rdi)
orl %esi, %eax
cmpl $32, %edx
movl %eax, -4(%rsp) # 4-byte Spill
je .LBB0_2
llvm-svn: 137303
2011-08-11 06:26:54 +00:00
fb03a92c33
Be less aggressive about hinting in RAFast.
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In particular, don't spill dirty registers only to satisfy a hint. It is
not worth it.
The attached test case provides an example where the fast allocator
would spill a register when other registers are available.
llvm-svn: 132900
2011-06-13 03:26:46 +00:00
410ec4aad1
As Dan pointed out, movzbl, movsbl, and friends are nicer than their alias
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(movzx/movsx) because they give more information. Revert that part of the patch.
llvm-svn: 129498
2011-04-14 01:46:37 +00:00
7e07d6fb69
Have the X86 back-end emit the alias instead of what's being aliased. In most
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cases, it's much nicer and more informative reading the alias.
llvm-svn: 129497
2011-04-14 01:11:51 +00:00
c1783b31a4
Fix fast-isel address mode folding to avoid folding instructions
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outside of the current basic block. This fixes PR9500, rdar://9156159.
llvm-svn: 128041
2011-03-22 00:04:35 +00:00
eaf128bde6
Relax expressions and add explicit triplets -linux and -win32.
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llvm-svn: 126202
2011-02-22 07:20:02 +00:00
2d186574a6
reapply my fix for PR8961 with a tweak to properly handle
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multi-instruction sequences like calls. Many thanks to Jakob for
finding a testcase.
llvm-svn: 123559
2011-01-16 02:27:38 +00:00
e93e4f118c
revert my fastisel patch again which apparently still gives the
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llvm-gcc-i386-linux-selfhost buildbot heartburn...
llvm-svn: 123431
2011-01-14 06:14:33 +00:00
5ca1391003
reapply r123414 now that the botz are calmed down and the fix is already in.
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llvm-svn: 123427
2011-01-14 04:24:28 +00:00
21a64979f1
r123414 broke llvm-gcc bootstrap apparently, revert
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llvm-svn: 123422
2011-01-14 02:07:32 +00:00
0c34cb429e
fix PR8961 - a fast isel miscompilation where we'd insert a new instruction
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after sext's generated for addressing that got folded. Previously we compiled
test5 into:
_test5: ## @test5
## BB#0:
movq -8(%rsp), %rax ## 8-byte Reload
movq (%rdi,%rax), %rdi
addq %rdx, %rdi
movslq %esi, %rax
movq %rax, -8(%rsp) ## 8-byte Spill
movq %rdi, %rax
ret
which is insane and wrong. Now we produce:
_test5: ## @test5
## BB#0:
movslq %esi, %rax
movq (%rdi,%rax), %rax
addq %rdx, %rax
ret
llvm-svn: 123414
2011-01-14 00:01:01 +00:00
103c4ebea5
Use the source-order scheduler instead of the "fast" scheduler at -O0,
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because it's more likely to keep debug line information in its original
order.
llvm-svn: 108496
2010-07-16 02:01:19 +00:00
e75704369d
Revert 107840 107839 107813 107804 107800 107797 107791.
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Debug info intrinsics win for now.
llvm-svn: 107850
2010-07-08 01:00:56 +00:00
2d4d01d0de
Add X86FastISel support for return statements. This entails refactoring
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a bunch of stuff, to allow the target-independent calling convention
logic to be employed.
llvm-svn: 107800
2010-07-07 18:32:53 +00:00
7937d5606d
Teach X86FastISel to fold constant offsets and scaled indices in
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the same address.
llvm-svn: 107373
2010-07-01 02:27:15 +00:00
db4916a123
fix PR4984 by ensuring that fastisel adds properly sign extended GEP displacement
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values to machineinstrs.
llvm-svn: 81886
2009-09-15 18:27:02 +00:00
c25359e1a3
rename test
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llvm-svn: 81884
2009-09-15 18:23:37 +00:00
Stephen Lin