4ed2826ce5
Use correct add*Imm form in more BuildMI calls.
...
Fix bug in emitGEPOperation where we weren't passing MBB, IP to getReg.
(hey, wouldn't a constant expression lowering pass be cool? huh huhuhuh)
Fix bug in emitGEPOperation where we might try to OR a constant into a
register which was too big to fit in the immediate field.
Support and, or, xor of longs.
llvm-svn: 14363
2004-06-24 08:55:09 +00:00
7777e66704
Rename the load and store opcodes. The non-fp ones only have one
...
variant worth worrying about; the fp ones have two.
llvm-svn: 14362
2004-06-24 07:37:12 +00:00
c8e1b5abe8
Rename the load and store opcodes. The non-fp ones only have one
...
variant worth worrying about; the fp ones have two.
Add fp stores.
llvm-svn: 14361
2004-06-24 07:36:59 +00:00
9f455efff1
Rename the load and store opcodes. The non-fp ones only have one
...
variant worth worrying about; the fp ones have two.
Stub out the case analysis of int-to-fp casts (no code yet).
I think the number of operands passed to BuildMI for loads was wrong.
Support load and store of float and double.
llvm-svn: 14360
2004-06-24 07:36:48 +00:00
8863de761d
Strange as it may sound, we'll not use LDD/STD to store longs. For reasons of
...
representational consistency, we want to address the halves of each 64-bit value
separately.
llvm-svn: 14356
2004-06-24 06:44:57 +00:00
1e8cc73ea3
Support constant cast expressions.
...
llvm-svn: 14355
2004-06-24 06:33:00 +00:00
ae6fb8ae5c
Make the most commonly preselected instructions add to the names of the
...
instructions they augment, instead of replacing them. It's good for debugging,
and it's OK for the sparcv9 backend.
llvm-svn: 14353
2004-06-23 21:41:32 +00:00
5825bdd8b2
Add pseudo-registers and register class for 64-bit integer values.
...
llvm-svn: 14332
2004-06-22 20:14:41 +00:00
31f4df6b54
Order #includes as per style guide.
...
llvm-svn: 14305
2004-06-21 21:54:40 +00:00
96041e58b9
Direct declaration of namespace-ified globals does not work, must enclose
...
them with a namespace declaration.
llvm-svn: 14303
2004-06-21 21:44:12 +00:00
d0bf6f17d1
Specify variables' namespace directly instead of using an enclosing namespace.
...
llvm-svn: 14302
2004-06-21 21:21:49 +00:00
0bfea680bb
Move implemented interface header up to the top.
...
llvm-svn: 14301
2004-06-21 21:20:23 +00:00
c88c1ba066
Spell out `NoFramePointerElim'.
...
llvm-svn: 14300
2004-06-21 21:18:48 +00:00
c22299d21b
Spell out `NoFramePointerElim' for readability.
...
llvm-svn: 14299
2004-06-21 21:17:44 +00:00
5cb198a9c6
Use the common `NoFPElim' setting instead of our own.
...
llvm-svn: 14298
2004-06-21 21:10:24 +00:00
069ca067e1
Implement `NoFPElim' in a target-agnostic fashion so it can be shared.
...
llvm-svn: 14297
2004-06-21 21:08:45 +00:00
5e323e10df
* Make indentation consistent at 2 chars
...
* Doxygenify function comments
* Wrap code at 80 cols
llvm-svn: 14295
2004-06-21 20:22:03 +00:00
a97f29237e
This file is no longer applicable.
...
llvm-svn: 14294
2004-06-21 20:17:41 +00:00
302df232b5
llvm/IntrinsicLowering.h => llvm/CodeGen/IntrinsicLowering.h
...
llvm-svn: 14292
2004-06-21 18:30:31 +00:00
11f74d7072
Intrinsic::isnan has gone away, support for it commented out.
...
Intrinsic::isunordered has arrived, and we just use the standard lowering
pass for it.
llvm-svn: 14290
2004-06-21 17:58:36 +00:00
c3a0b330c9
Convert tabs to spaces.
...
llvm-svn: 14289
2004-06-21 17:41:12 +00:00
254d2cf452
Type::getPrimitiveID() -> getTypeID()
...
llvm-svn: 14288
2004-06-21 17:25:55 +00:00
6292a056a8
Type::getPrimitiveID() -> getTypeID()
...
llvm-svn: 14287
2004-06-21 17:19:08 +00:00
e05203fb40
Initial revision
...
llvm-svn: 14283
2004-06-21 16:55:25 +00:00
bcdadf3765
Move the IntrinsicLowering header into the CodeGen directory, as per PR346
...
llvm-svn: 14266
2004-06-20 07:49:54 +00:00
5b433a5de9
.zero doesn't work in the Solaris assembler.
...
llvm-svn: 14231
2004-06-18 08:59:16 +00:00
4125c92009
Get rid of selects the easy way
...
llvm-svn: 14230
2004-06-18 08:46:15 +00:00
694f7b78d9
Make visitAllocaInst() look more like its X86 counterpart.
...
llvm-svn: 14229
2004-06-18 08:45:52 +00:00
fcc30aca1b
Mess around with allocation order. In particular, I think we ought to be
...
using the local & in regs first because they are not clobbered by calls.
llvm-svn: 14228
2004-06-18 08:19:08 +00:00
b42345811e
JMPL has a delay slot.
...
llvm-svn: 14227
2004-06-18 08:18:54 +00:00
7d9af983de
Clean up the commented-out F3_3 stuff.
...
Replace it with a working class for FP instrs.
llvm-svn: 14226
2004-06-18 06:28:21 +00:00
75f3738969
Fix jmpl.
...
Add some FP moves.
llvm-svn: 14225
2004-06-18 06:28:10 +00:00
12ee9a1e75
Support printing base+offset pairs where the offset is a register.
...
Use this for printing the jmpl indirect-call instruction.
llvm-svn: 14224
2004-06-18 06:27:59 +00:00
5ebab28a8a
Support intrinsic calls (although no particular intrinsics are supported yet).
...
Support indirect calls.
Support returning a float value.
llvm-svn: 14223
2004-06-18 06:27:48 +00:00
51d3c7b05b
Add load instructions for floating-point registers.
...
llvm-svn: 14217
2004-06-18 05:19:27 +00:00
21305c6f0c
Support alloca instructions.
...
Support copying floating-point constants to registers.
Add assertion to visitCallInst to abort if we hit a NULL calledFunction, for now.
llvm-svn: 14216
2004-06-18 05:19:16 +00:00
aa27623b99
Codegen sub C, X a little bit better for register pressure. Instead of
...
mov REG, C
sub REG, X
generate:
neg X
add X, C
which uses one less reg
llvm-svn: 14213
2004-06-18 00:50:37 +00:00
b30d12292a
Fold setcc instructions into select and branches that are not in the same BB as
...
the setcc.
llvm-svn: 14212
2004-06-18 00:29:22 +00:00
c37af629b4
Make storeRegToStackSlot slightly shorter.
...
Make copyRegToReg return 1 instead of -1.
Edit a comment in emitPrologue().
llvm-svn: 14211
2004-06-17 22:34:48 +00:00
eca9546dc3
Set the isBranch and isTerminator flags on branch instructions correctly.
...
Add a FIXME about the (currently unused) JMPL instructions.
llvm-svn: 14210
2004-06-17 22:34:29 +00:00
63c1d6eda8
Emit stores correctly; don't fail an assertion.
...
llvm-svn: 14209
2004-06-17 22:34:19 +00:00
c4ee938f55
Support generating machine instructions for Phi nodes (based on x86, but with
...
modifications for 1 LLVM BB --> many MBBs).
Fix store operand order: make it always be Base, Offset, SrcReg (think
"[ Base + Offset ] = SrcReg").
Rewrite visitBranchInst() to be even dumber (but working) -- give up on
the branch fallthrough trick, for the time being.
Make visitSetCondInst() work.
llvm-svn: 14208
2004-06-17 22:34:08 +00:00
a067fb3e6b
Recognize more branches.
...
llvm-svn: 14207
2004-06-17 22:33:57 +00:00
7887da36de
Do not fold loads into instructions if it is used more than once. In particular
...
we do not want to fold the load in cases like this:
X = load
= add A, X
= add B, X
llvm-svn: 14204
2004-06-17 22:15:25 +00:00
2f2b5f5b93
Use addGlobalAddress and addMBB for call & branch targets instead of addPCDisp.
...
Abort if we see a PCRelativeDisp MachineOperand, to be safe. This matches
the X86 backend.
llvm-svn: 14202
2004-06-17 19:39:23 +00:00
6b7275996c
Rename Type::PrimitiveID to TypeId and ::getPrimitiveID() to ::getTypeID()
...
llvm-svn: 14201
2004-06-17 18:19:28 +00:00
7011d35594
Remove support for llvm.isnan. Alkis wins :)
...
llvm-svn: 14189
2004-06-15 21:48:07 +00:00
70dfc06e02
Add basic support for the isunordered intrinsic. The isnan stuff still needs to go
...
llvm-svn: 14185
2004-06-15 21:36:44 +00:00
476c73b241
Fix thinko in visitor... ShiftInsts should currently be delegated
...
to visitBinaryOperator.
llvm-svn: 14182
2004-06-15 21:09:46 +00:00
675c0e9701
I think we'll use the standard lowering passes for now.
...
llvm-svn: 14179
2004-06-15 20:37:12 +00:00
0c8ee30d53
Fix bug generating code for void call instructions: don't call
...
getReg() on void value.
llvm-svn: 14178
2004-06-15 20:06:32 +00:00
065a6cb93a
Squash a warning from the Solaris assembler by aligning the stack
...
on a double-word boundary instead of a single-word boundary.
llvm-svn: 14177
2004-06-15 19:53:10 +00:00
ad98a9b526
Allow special-casing of operand printing based on opcode. Print
...
non-register, non-immed. arguments to SETHI and OR using %hi() and
%lo() respectively.
llvm-svn: 14176
2004-06-15 19:52:59 +00:00
19fbd28a06
Support constant GEP expressions.
...
Support copying long constants to register pairs.
Support copying ConstantPointerNulls and ConstantPointerRefs to registers.
llvm-svn: 14175
2004-06-15 19:16:07 +00:00
bba0f0e492
Add file comment.
...
llvm-svn: 14172
2004-06-14 15:13:59 +00:00
99c6539bce
Make -print-machineinstrs even stronger. You get to see the final code after
...
peepholing, and make it work the same way in the JIT as in LLC.
llvm-svn: 14170
2004-06-14 05:05:45 +00:00
1c2be0e5a9
By far, one of the most common uses of isnan is to make 'isunordered'
...
comparisons. In an 'isunordered' predicate, which looks like this at
the LLVM level:
%a = call bool %llvm.isnan(double %X)
%b = call bool %llvm.isnan(double %Y)
%COM = or bool %a, %b
We used to generate this code:
fxch %ST(1)
fucomip %ST(0), %ST(0)
setp %AL
fucomip %ST(0), %ST(0)
setp %AH
or %AL, %AH
With this patch, we generate this code:
fucomip %ST(0), %ST(1)
fstp %ST(0)
setp %AL
Which should make alkis happy. Tested as X86/compare_folding.llx:test1
llvm-svn: 14148
2004-06-11 05:33:49 +00:00
71186e2fb6
Fix bug in previous checkin
...
llvm-svn: 14146
2004-06-11 05:22:44 +00:00
5ed9113e14
No really, these are dead now
...
llvm-svn: 14145
2004-06-11 04:50:14 +00:00
b35f47627d
Now that compare instructions aren't lumped in with the other twoargfp instructions,
...
we can get rid of the FpUCOM/FpUCOMi pseudo instructions, which makes stuff simpler
and faster.
llvm-svn: 14144
2004-06-11 04:49:02 +00:00
0876edf122
Introduce a new FP instruction type to separate the compare cases from the
...
twoarg cases.
llvm-svn: 14143
2004-06-11 04:41:24 +00:00
26a964f88e
Add direct support for the isnan intrinsic, implementing test/Regression/CodeGen/X86/isnan.llx
...
testcase
llvm-svn: 14141
2004-06-11 04:31:10 +00:00
a0cfedef3a
Add support for the setp instructions
...
llvm-svn: 14140
2004-06-11 04:30:06 +00:00
94ff2c3210
Split compare instruction handling OUT of handleTwoArgFP into handleCompareFP.
...
This makes the code much simpler, and the two cases really do belong apart.
Once we do it, it's pretty obvious how flawed the logic was for A != A case,
so I fixed it (fixing PR369).
This also uses freeStackSlotAfter instead of inserting an fxchg then
popStackAfter'ing in the case where there is a dead result (unlikely, but
possible), producing better code.
llvm-svn: 14139
2004-06-11 04:25:06 +00:00
2655aab200
Turn loads of ConstantPointerNulls into loads of zero... don't spill
...
them into the constant pool.
llvm-svn: 14128
2004-06-11 02:03:48 +00:00
6d6b3b3ce9
Fix the fixed stack offset, patch contributed by Vladimir Prus
...
llvm-svn: 14110
2004-06-10 06:19:25 +00:00
5b03a0628f
Encode %fsr correctly; don't fail an assertion.
...
llvm-svn: 14103
2004-06-09 21:54:59 +00:00
87d8878f6d
Fix encoding of ST*FSR instructions.
...
llvm-svn: 14102
2004-06-09 21:54:58 +00:00
87c75632ee
Fix assertion failure message to have the right method name.
...
llvm-svn: 14101
2004-06-09 20:44:42 +00:00
9095c64147
Fix for PR#366. We use getClassB() so that we can handle cast instructions
...
that cast to bool.
llvm-svn: 14096
2004-06-09 15:18:51 +00:00
c365e7cc99
Fix a minor bug in the map - since this pass adds a global symbol, it must be
...
accounted for in the map (at least, in its current format).
llvm-svn: 14075
2004-06-08 20:08:30 +00:00
76b6426a8c
Add a TmpInstruction ctor that doesn't take a MCFI.
...
llvm-svn: 14073
2004-06-08 18:52:46 +00:00
78faa9a9e6
Fix up some spacing & fix a typo in an assertion in cpValue2Value.
...
llvm-svn: 14027
2004-06-04 20:51:40 +00:00
add9f29fdf
This file is obsolete
...
llvm-svn: 14005
2004-06-04 00:15:21 +00:00
6973e85b16
Add new internal-global-symbol mapping info pass... may its life be short
...
and sweet.
llvm-svn: 13983
2004-06-03 05:03:37 +00:00
0a48c0d913
Add new mapping info pass, when EmitMappingInfo is on.
...
llvm-svn: 13981
2004-06-03 05:03:01 +00:00
25c6fa0e83
Fix big mistake in my last checkin... the big question is, how did I ever
...
get this to link before?
llvm-svn: 13980
2004-06-03 05:03:00 +00:00
11cfb090b8
Add decl. for new mapping info pass factory method.
...
llvm-svn: 13979
2004-06-03 05:02:59 +00:00
dca24ddfc7
Collapse together the abstract superclass TargetRegInfo and SparcV9RegInfo, its
...
only concrete implementation.
llvm-svn: 13977
2004-06-03 02:45:09 +00:00
4f816d2e38
<alloca.h> on cygwin pulls in a ton of stuff (macros and function protos)
...
that we REALLY don't want in the CBE code.
With this fix, the CBE passes all of the MultiSource tests on cygwin that
it does on linux. Yaay!
llvm-svn: 13975
2004-06-02 23:10:26 +00:00
562d15636e
Adjust to new TM interface
...
llvm-svn: 13954
2004-06-02 05:56:04 +00:00
c832e546d0
Method has been inlined into all callers
...
llvm-svn: 13953
2004-06-02 05:55:48 +00:00
82baa9c394
Convert to the new TargetMachine interface.
...
llvm-svn: 13952
2004-06-02 05:55:25 +00:00
535e8db0da
Stubs are no longer needed
...
llvm-svn: 13951
2004-06-02 05:53:52 +00:00
63c07bf246
Adjust to new TM interfaces
...
llvm-svn: 13949
2004-06-02 05:47:26 +00:00
4cc9328b5d
There is no "mcff" here; delete the confusing comments that refer to it.
...
llvm-svn: 13911
2004-05-30 08:29:16 +00:00
7a8734af7f
Transform an occurrence of if(...) { assert (0) }.
...
llvm-svn: 13908
2004-05-30 07:34:01 +00:00
01c1f3279d
Reduce the amount of LLVM Values for which we save reg. allocator
...
state. Also, save the state for the incoming register of each phi
node.
llvm-svn: 13906
2004-05-30 07:08:43 +00:00
9836668944
Rename verifySavedState to dumpSavedState. Give it a new comment.
...
Call it at a more appropriate point.
llvm-svn: 13905
2004-05-30 04:22:24 +00:00
bc3d8652ec
Insert machine instructions generated for Phi nodes into their
...
corresponding MachineCodeForInstruction vectors.
I need to be able to get the register allocated for the thing which is
called PhiCpRes in this code; this should make that task easier, plus,
Phi nodes are no longer "special" in the sense that their
MachineCodeForInstruction is empty.
llvm-svn: 13904
2004-05-30 03:33:49 +00:00
24c18879f0
Remove unused #include.
...
llvm-svn: 13899
2004-05-29 23:26:13 +00:00
42112b4a09
Add comments.
...
llvm-svn: 13898
2004-05-29 23:10:20 +00:00
2398b17a57
Trim whitespace.
...
llvm-svn: 13897
2004-05-29 22:49:51 +00:00
7fa398d850
Give InsertCodeForPhis() a new documentation comment.
...
llvm-svn: 13896
2004-05-29 22:20:59 +00:00
90dc744ac0
Give PhiCp nodes better names in many cases.
...
Simplify InsertPhiElimInstructions(), and give it a better doxygen comment.
llvm-svn: 13880
2004-05-28 19:34:00 +00:00
26925ff857
Make debugging output with -print-machineinstrs more useful: always print out
...
the transformed LLVM code which is the input to the instruction selector.
llvm-svn: 13879
2004-05-28 19:33:59 +00:00
c53c2a3a62
Fix the big regression that has been killing the nightly tester these last
...
few days. Apparently the old symbol table used to auto rename collisions in
the type symbol table and the new one does not. It doesn't really make sense
for the new one to do so, so we just make the client do it.
llvm-svn: 13877
2004-05-28 05:47:27 +00:00
c7e2ff2980
Minor changes. Switch to a SymbolTable remove that does not take linear time
...
llvm-svn: 13874
2004-05-28 05:30:51 +00:00
1c6f9b4304
Make comment lines stick out less.
...
llvm-svn: 13858
2004-05-27 21:41:48 +00:00
83d067a103
Fix PR344: the incorrect remove was being used.
...
llvm-svn: 13790
2004-05-26 17:20:52 +00:00
230deea60f
Add a (not very meaningful) default constructor for AllocInfo objects.
...
llvm-svn: 13773
2004-05-25 20:43:47 +00:00
e7e9671cad
Convert to SymbolTable's new iteration interface.
...
llvm-svn: 13754
2004-05-25 08:53:40 +00:00
14428ac740
Remove use of Type::TypeTy from an assert. It will go away soon.
...
llvm-svn: 13748
2004-05-25 08:50:52 +00:00
6e4edd65ab
Add support for accurate garbage collection to the LLVM code generators
...
llvm-svn: 13696
2004-05-23 21:23:35 +00:00
3ef067ff33
Add some notes to myself, no functional changes
...
llvm-svn: 13695
2004-05-23 21:23:12 +00:00
66911019e7
minor wording change
...
llvm-svn: 13694
2004-05-23 21:22:55 +00:00
d4889be5ca
Fix a typo in a comment.
...
llvm-svn: 13643
2004-05-23 05:10:06 +00:00
83c139d575
Fix to make the CBE always emit comparisons inline. Hopefully this will
...
fix the really bad code we're getting on PPC.
llvm-svn: 13609
2004-05-20 20:25:50 +00:00
7b7a14d718
Fix a bug in outputting branches to constant PCs. Since the PC is supplied as
...
a full 64-bit address, it must be adjusted to fit in the branch instruction's
immediate field. (This is only used in the reoptimizer, for now.)
llvm-svn: 13608
2004-05-20 07:43:40 +00:00
e8949b3083
Minor simplification: eliminate a dyn_cast.
...
Fix a typo in a debug message.
llvm-svn: 13607
2004-05-19 21:30:01 +00:00
de5ccc18e3
Don't keep track of references to LLVM BasicBlocks while emitting; use
...
MachineBasicBlocks instead.
llvm-svn: 13568
2004-05-14 06:54:58 +00:00
2b3a81cd33
Support MachineBasicBlock operands on RawFrm instructions.
...
Get rid of separate numbering for LLVM BasicBlocks; use the automatically
generated MachineBasicBlock numbering.
llvm-svn: 13567
2004-05-14 06:54:57 +00:00
35e73e1ca4
Generate branch machine instructions with MachineBasicBlock operands instead of
...
LLVM BasicBlock operands.
llvm-svn: 13566
2004-05-14 06:54:56 +00:00
8e7aea026a
Two more improvements for null pointer handling: storing a null pointer
...
and passing a null pointer into a function.
For this testcase:
void %test(int** %X) {
store int* null, int** %X
call void %test(int** null)
ret void
}
we now generate this:
test:
sub %ESP, 12
mov %EAX, DWORD PTR [%ESP + 16]
mov DWORD PTR [%EAX], 0
mov DWORD PTR [%ESP], 0
call test
add %ESP, 12
ret
instead of this:
test:
sub %ESP, 12
mov %EAX, DWORD PTR [%ESP + 16]
mov %ECX, 0
mov DWORD PTR [%EAX], %ECX
mov %EAX, 0
mov DWORD PTR [%ESP], %EAX
call test
add %ESP, 12
ret
llvm-svn: 13558
2004-05-13 15:26:48 +00:00
593d22d666
Second half of my fixed-sized-alloca patch. This folds the LEA to compute
...
the alloca address into common operations like loads/stores.
In a simple testcase like this (which is just designed to excersize the
alloca A, nothing more):
int %test(int %X, bool %C) {
%A = alloca int
store int %X, int* %A
store int* %A, int** %G
br bool %C, label %T, label %F
T:
call int %test(int 1, bool false)
%V = load int* %A
ret int %V
F:
call int %test(int 123, bool true)
%V2 = load int* %A
ret int %V2
}
We now generate:
test:
sub %ESP, 12
mov %EAX, DWORD PTR [%ESP + 16]
mov %CL, BYTE PTR [%ESP + 20]
*** mov DWORD PTR [%ESP + 8], %EAX
mov %EAX, OFFSET G
lea %EDX, DWORD PTR [%ESP + 8]
mov DWORD PTR [%EAX], %EDX
test %CL, %CL
je .LBB2 # PC rel: F
.LBB1: # T
mov DWORD PTR [%ESP], 1
mov DWORD PTR [%ESP + 4], 0
call test
*** mov %EAX, DWORD PTR [%ESP + 8]
add %ESP, 12
ret
.LBB2: # F
mov DWORD PTR [%ESP], 123
mov DWORD PTR [%ESP + 4], 1
call test
*** mov %EAX, DWORD PTR [%ESP + 8]
add %ESP, 12
ret
Instead of:
test:
sub %ESP, 20
mov %EAX, DWORD PTR [%ESP + 24]
mov %CL, BYTE PTR [%ESP + 28]
*** lea %EDX, DWORD PTR [%ESP + 16]
*** mov DWORD PTR [%EDX], %EAX
mov %EAX, OFFSET G
mov DWORD PTR [%EAX], %EDX
test %CL, %CL
*** mov DWORD PTR [%ESP + 12], %EDX
je .LBB2 # PC rel: F
.LBB1: # T
mov DWORD PTR [%ESP], 1
mov %EAX, 0
mov DWORD PTR [%ESP + 4], %EAX
call test
*** mov %EAX, DWORD PTR [%ESP + 12]
*** mov %EAX, DWORD PTR [%EAX]
add %ESP, 20
ret
.LBB2: # F
mov DWORD PTR [%ESP], 123
mov %EAX, 1
mov DWORD PTR [%ESP + 4], %EAX
call test
*** mov %EAX, DWORD PTR [%ESP + 12]
*** mov %EAX, DWORD PTR [%EAX]
add %ESP, 20
ret
llvm-svn: 13557
2004-05-13 15:12:43 +00:00
2bb3325965
Substantially improve code generation for address exposed locals (aka fixed
...
sized allocas in the entry block). Instead of generating code like this:
entry:
reg1024 = ESP+1234
... (much later)
*reg1024 = 17
Generate code that looks like this:
entry:
(no code generated)
... (much later)
t = ESP+1234
*t = 17
The advantage being that we DRAMATICALLY reduce the register pressure for these
silly temporaries (they were all being spilled to the stack, resulting in very
silly code). This is actually a manual implementation of rematerialization :)
I have a patch to fold the alloca address computation into loads & stores, which
will make this much better still, but just getting this right took way too much time
and I'm sleepy.
llvm-svn: 13554
2004-05-13 07:40:27 +00:00
e2d382e1a4
Pass boolean constants into function calls more efficiently, generating:
...
mov DWORD PTR [%ESP + 4], 1
instead of:
mov %EAX, 1
mov DWORD PTR [%ESP + 4], %EAX
llvm-svn: 13494
2004-05-12 16:35:04 +00:00
72fb3256f8
Fix a fairly serious pessimizaion that was preventing us from efficiently
...
compiling things like 'add long %X, 1'. The problem is that we were switching
the order of the operands for longs even though we can't fold them yet.
llvm-svn: 13451
2004-05-10 15:15:55 +00:00
a367dd745b
Fix some comments, avoid sign extending booleans when zero extend works fine
...
llvm-svn: 13440
2004-05-09 23:16:33 +00:00
1542a98e7b
Generate more efficient code for casting booleans to integers (no sign extension required)
...
llvm-svn: 13439
2004-05-09 22:28:45 +00:00
f719a52088
syntactically loopify natural loops so that the GCC loop optimizer can find them. This should *dramatically* improve the performance of CBE compiled code on targets that depend on GCC's loop optimizations (like PPC)
...
llvm-svn: 13438
2004-05-09 20:41:32 +00:00
87d036caf2
Do not emit prototypes for setjmp/longjmp, as they are handled specially
...
llvm-svn: 13437
2004-05-09 16:03:29 +00:00
9c29991970
Make the floating point constant pools local to each function, split the
...
FindUsedTypes manipulation stuff out to be a seperate pass, and make the
main CWriter be a function pass now!
llvm-svn: 13435
2004-05-09 06:20:51 +00:00
14d328e2a5
Get this looking more like a function pass.
...
llvm-svn: 13433
2004-05-09 04:30:20 +00:00
2484a6336f
Print all PHI copies for successor blocks before the terminator, whether it be a conditional branch or switch.
...
llvm-svn: 13430
2004-05-09 03:42:48 +00:00
39bd20d6eb
Changed CPUResource to allow access to maxnum users.
...
llvm-svn: 13425
2004-05-08 16:12:50 +00:00
1096ba9422
Add support for widening integral casts.
...
Flesh out the SetCC support... which currently ends in a little bit
of unfinished code (which is probably completely hilarious) for
generating the condition value splitting the basic block up into 4
blocks, like this (clearly a better API is needed for this!):
BB
cond. branch
/ / R1=1 R2=0
\ /
\ /
R=phi(R1,R2)
Other minor edits.
llvm-svn: 13423
2004-05-08 06:36:14 +00:00
91bf7cb79b
Add a bunch more branches
...
llvm-svn: 13422
2004-05-08 06:08:29 +00:00
7a66e5fff9
Flesh out GEP support
...
llvm-svn: 13421
2004-05-08 05:27:20 +00:00
d18b330605
Add ADD with immediate
...
llvm-svn: 13420
2004-05-08 05:26:55 +00:00
b56f1c9c10
Add forms of CMP, SUBCC, and a few branches, and some comments.
...
llvm-svn: 13419
2004-05-08 04:21:32 +00:00
f3a479f04a
Add stub support for GEPs.
...
Add support for branches (based loosely on X86/InstSelectSimple).
Add support for not visiting phi nodes in the first pass.
Add support for loading bools.
Flesh out support for stores.
llvm-svn: 13418
2004-05-08 04:21:17 +00:00
584308b71a
Add support for copying bool constants to registers.
...
Disable the code that copies long constants to registers - it looks fishy.
Implement some simple casts: integral, smaller than longs, and equal-width
or narrowing only.
llvm-svn: 13413
2004-05-07 21:39:30 +00:00
a2dc6bf6e6
Codegen floating point stores of constants into integer instructions. This
...
allows us to compile:
store float 10.0, float* %P
into:
mov DWORD PTR [%EAX], 1092616192
instead of:
.CPItest_0: # float 0x4024000000000000
.long 1092616192 # float 10
...
fld DWORD PTR [.CPItest_0]
fstp DWORD PTR [%EAX]
llvm-svn: 13409
2004-05-07 21:18:15 +00:00
cecf3f94a4
Make comparisons against the null pointer as efficient as integer comparisons
...
against zero. In particular, don't emit:
mov %ESI, 0
cmp %ECX, %ESI
instead, emit:
test %ECX, %ECX
llvm-svn: 13407
2004-05-07 19:55:55 +00:00
d26074eef1
Missing piece of fix for Bug 333
...
llvm-svn: 13362
2004-05-04 21:41:45 +00:00
f2ff5dd442
Correctly mangle function names when they are used as part of a
...
constant pool member's name.
This is intended to address Bug 333.
Also, fix an anachronistic usage of "M" as a parameter of type Function *.
llvm-svn: 13357
2004-05-04 21:09:02 +00:00
c6f601310f
Remove unneeded check
...
llvm-svn: 13355
2004-05-04 19:35:11 +00:00
22df9a59b4
Improve signed division by power of 2 *dramatically* from this:
...
div:
mov %EDX, DWORD PTR [%ESP + 4]
mov %ECX, 64
mov %EAX, %EDX
sar %EDX, 31
idiv %ECX
ret
to this:
div:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, %EAX
sar %ECX, 5
shr %ECX, 26
mov %EDX, %EAX
add %EDX, %ECX
sar %EAX, 6
ret
Note that the intel compiler is currently making this:
div:
movl 4(%esp), %edx #3.5
movl %edx, %eax #4.14
sarl $5, %eax #4.14
shrl $26, %eax #4.14
addl %edx, %eax #4.14
sarl $6, %eax #4.14
ret #4.14
Which has one less register->register copy. (hint hint alkis :)
llvm-svn: 13354
2004-05-04 19:33:58 +00:00
8c22ece232
Improve code generated for integer multiplications by 2,3,5,9
...
llvm-svn: 13342
2004-05-04 15:47:14 +00:00
7b0a2046d4
Remove unused #include
...
llvm-svn: 13304
2004-05-01 21:29:16 +00:00
acbf0c84de
Iterate over the Machine CFG that Brian added instead of the LLVM CFG.
...
Look at all of the pretty minuses. :)
llvm-svn: 13303
2004-05-01 21:27:53 +00:00
490e804a4e
Add a constructor that got lost
...
llvm-svn: 13297
2004-05-01 11:17:13 +00:00
6ebf67f8b6
Removing MachineResource class.
...
llvm-svn: 13291
2004-04-30 20:40:38 +00:00
4390e4a7fc
Make RequiresFPRegKill() take a MachineBasicBlock arg.
...
In InsertFPRegKills(), just check the MachineBasicBlock for successors
instead of its corresponding BasicBlock.
llvm-svn: 13213
2004-04-28 04:45:55 +00:00
33ff118407
In InsertFPRegKills(), use the machine-CFG itself rather than the
...
LLVM CFG when trying to find the successors of BB.
llvm-svn: 13212
2004-04-28 04:34:16 +00:00
24ec85689b
Update the machine-CFG edges whenever we see a branch.
...
llvm-svn: 13211
2004-04-28 04:19:37 +00:00
444a03b77a
Integrate the rest of my random sparcv9 scribblings into this file
...
llvm-svn: 13204
2004-04-27 22:04:03 +00:00
2d3a7a6ff0
Changes to fix up the inst_iterator to pass to boost iterator checks. This
...
patch was graciously contributed by Vladimir Prus.
llvm-svn: 13185
2004-04-27 15:13:33 +00:00
03cac379bd
Fix file header comments and include guards -- many files have been moved or
...
renamed since they were last spiffed up, or they just never had proper comments
in the first place.
llvm-svn: 13148
2004-04-25 07:04:49 +00:00
42d321ab66
Add a getRegisterInfo() accessor just like on the X86 target.
...
llvm-svn: 13147
2004-04-25 06:32:28 +00:00
4ec08db77c
Regularize file header comment and include guard.
...
Include SparcV9RegisterInfo.h.
Add a getRegisterInfo() accessor and SparcV9RegisterInfo instance, just like
on the X86 target.
llvm-svn: 13146
2004-04-25 06:32:16 +00:00
f70544c583
Add MRegisterInfo subclass for the SparcV9 target (containing only stub
...
functions for now). This automatically turns on the printing of machine
registers using their own real names, instead of goofy things like %mreg(42),
and allows us to migrate code incrementally to the new interface as we see fit.
The register file description it uses is hand-written, so that the register
numbers will match the ones that the SparcV9 target already uses.
Perhaps someday we'll tablegen it.
llvm-svn: 13145
2004-04-25 06:32:05 +00:00
ced65e8792
Fix a typo.
...
llvm-svn: 13136
2004-04-23 21:45:02 +00:00
0b65f8f582
Merge TargetRegInfo.h into SparcV9RegInfo.h, which is its only subclass.
...
This prepares us to be able to de-virtualize and de-abstract it, and
take the register allocator bits out and move them into the register allocator
proper...
llvm-svn: 13127
2004-04-23 18:15:48 +00:00
71509a98c5
Include SparcV9RegInfo.h instead of TargetRegInfo.h.
...
llvm-svn: 13126
2004-04-23 18:15:47 +00:00
fbd43e43a7
Get rid of the old byte-at-a-time emission code used when the Sparc JIT was
...
being tested on X86, as per Chris's request.
llvm-svn: 13124
2004-04-23 18:10:38 +00:00
6e102a7edd
Use emitWordAt() to emit forward-branch fixups.
...
llvm-svn: 13120
2004-04-23 17:11:16 +00:00
fe277c2809
Emit SPARC machine code a word at a time instead of a byte at a time.
...
Use emitWordAt() to emit forward-branch fixups.
llvm-svn: 13119
2004-04-23 17:11:15 +00:00
376ac1bed5
Make SparcV9RegInfo::getRegType() return the right answer for registers
...
of IntCC, FloatCC, and Special types.
Make SparcV9RegInfo::getRegClassIDOfRegType() return the right answer
if you ask for the class corresponding to SpecialRegType.
llvm-svn: 13095
2004-04-21 17:53:58 +00:00
a2f66db6c4
Make it legal to ask for the type of a specialreg
...
llvm-svn: 13078
2004-04-20 20:12:57 +00:00
6c272a93bb
Make it legal to request a load or store of %fsr.
...
llvm-svn: 13073
2004-04-19 19:12:12 +00:00
755651df27
Regularize include guards and remove some excess whitespace.
...
llvm-svn: 13071
2004-04-19 18:53:44 +00:00
2fd2536ea8
Tighten up SparcV9FloatCCRegClass::getRegName()'s assertion - if you ask it for
...
the name of %fsr (as the comment in SparcV9RegClassInfo.h used to suggest)
you would walk off the end of the FloatCCRegName array.
llvm-svn: 13070
2004-04-19 18:53:43 +00:00
85cb77737c
Regularize include guards, remove some excess whitespace and fix some comments.
...
Remove the extra %fsr register from SparcV9FloatCCRegClass.
llvm-svn: 13069
2004-04-19 18:53:42 +00:00
5bee0f3068
Give SparcV9CodeEmitter a head-of-file comment and a PassName.
...
llvm-svn: 12967
2004-04-15 20:23:13 +00:00
e3e2c91997
Remove code to adjust the iterator for llvm.readio and llvm.writeio.
...
The iterator is pointing at the next instruction which should not disappear
when doing the load/store replacement.
llvm-svn: 12954
2004-04-14 21:27:56 +00:00
0174347d9a
Fix typo.
...
llvm-svn: 12953
2004-04-14 21:21:56 +00:00
0dc099c2b5
This is the real fix for Codegen/X86/2004-04-13-FPCMOV-Crash.llx which works
...
even when the "optimization" I added before is turned off. It generates this
extremely pointless code:
test:
fld QWORD PTR [%ESP + 4]
mov %AL, 0
test %AL, %AL
fcmove %ST(0), %ST(0)
ret
Good thing the optimizer will have removed this before code generation
anyway. :)
llvm-svn: 12939
2004-04-14 02:42:32 +00:00
beded72a08
Added support for the llvm.readio and llvm.writeio intrinsics.
...
On x86, memory operations occur in-order, so these are just lowered into
volatile loads and stores.
llvm-svn: 12936
2004-04-13 22:13:14 +00:00
9042e381d8
Implement a small optimization, which papers over the problem in
...
X86/2004-04-13-FPCMOV-Crash.llx
A more robust fix is to follow.
llvm-svn: 12935
2004-04-13 21:56:09 +00:00
6f6e4b9f59
I don't think we have to have 4 extra allocated (but unused) bytes on the stack.
...
llvm-svn: 12905
2004-04-13 18:28:37 +00:00
969795b4ea
I started working on casts, but I don't have anything compilable yet.
...
llvm-svn: 12903
2004-04-13 18:27:46 +00:00
c71b096672
Emit the immediate form of in/out when possible.
...
Fix several bugs in the intrinsics:
1. Make sure to copy the input registers before the instructions that use them
2. Make sure to copy the value returned by 'in' out of EAX into the register
it is supposed to be in.
This fixes assertions when using in/out and linear scan.
llvm-svn: 12896
2004-04-13 17:20:37 +00:00
a340febe52
Add immediate forms of in/out. Use let to shorten lines
...
llvm-svn: 12895
2004-04-13 17:19:31 +00:00
eaa28a29ae
Add support for new instruction type
...
llvm-svn: 12894
2004-04-13 17:18:51 +00:00
27b2e2cdc0
Add support for the printImplicitDefsBefore flag
...
llvm-svn: 12893
2004-04-13 17:18:39 +00:00
bb0f2db881
We don't need to insert TargetData into the PassManager here.
...
llvm-svn: 12874
2004-04-12 21:46:31 +00:00
a24f986333
Fix issues that the local allocator has dealing with instructions that implicitly use ST(0)
...
llvm-svn: 12855
2004-04-12 03:02:48 +00:00
2e2b0ceab9
No really, fix printing for LLC. I gotta get a way for CVS to whine at me if
...
I have unsaved emacs buffers, geeze...
llvm-svn: 12854
2004-04-12 01:52:04 +00:00
ba1038e0f3
Correct printing for LLC and the encoding for the JIT
...
llvm-svn: 12853
2004-04-12 01:50:04 +00:00
e407dbe9ff
Use the fucomi[p] instructions to perform floating point comparisons instead
...
of the fucom[p][p] instructions. This allows us to code generate this function
bool %test(double %X, double %Y) {
%C = setlt double %Y, %X
ret bool %C
}
... into:
test:
fld QWORD PTR [%ESP + 4]
fld QWORD PTR [%ESP + 12]
fucomip %ST(1)
fstp %ST(0)
setb %AL
movsx %EAX, %AL
ret
where before we generated:
test:
fld QWORD PTR [%ESP + 4]
fld QWORD PTR [%ESP + 12]
fucompp
** fnstsw
** sahf
setb %AL
movsx %EAX, %AL
ret
The two marked instructions (which are the ones eliminated) are very bad,
because they serialize execution of the processor. These instructions are
available on the PPRO and later, but since we already use cmov's we aren't
losing any portability.
I retained the old code for the day when we decide we want to support back
to the 386.
llvm-svn: 12852
2004-04-12 01:43:36 +00:00
d1c7545322
Add support for the FUCOMIr instruction
...
llvm-svn: 12851
2004-04-12 01:39:15 +00:00
6c84d4ca44
Add two new instructions
...
llvm-svn: 12850
2004-04-12 01:38:55 +00:00
0fe57da8fa
Fix a bug in my load/cast folding patch.
...
llvm-svn: 12849
2004-04-12 00:23:04 +00:00
dc0105467a
Adjust some comments, fix a bug in my previous patch
...
llvm-svn: 12848
2004-04-12 00:12:04 +00:00
07c1c11511
On X86, casting an integer to floating point requires going through memory.
...
If the source of the cast is a load, we can just use the source memory location,
without having to create a temporary stack slot entry.
Before we code generated this:
double %int(int* %P) {
%V = load int* %P
%V2 = cast int %V to double
ret double %V2
}
into:
int:
sub %ESP, 4
mov %EAX, DWORD PTR [%ESP + 8]
mov %EAX, DWORD PTR [%EAX]
mov DWORD PTR [%ESP], %EAX
fild DWORD PTR [%ESP]
add %ESP, 4
ret
Now we produce this:
int:
mov %EAX, DWORD PTR [%ESP + 4]
fild DWORD PTR [%EAX]
ret
... which is nicer.
llvm-svn: 12846
2004-04-11 23:21:26 +00:00
d4af820aad
Implement folding of loads into floating point operations. This implements:
...
test/Regression/CodeGen/X86/fp_load_fold.llx
llvm-svn: 12844
2004-04-11 22:05:45 +00:00
dcb750f015
Unify all of the code for floating point +,-,*,/ into one function
...
llvm-svn: 12842
2004-04-11 21:23:56 +00:00
80ba401602
This implements folding of constant operands into floating point operations
...
for mul and div.
Instead of generating this:
test_divr:
fld QWORD PTR [%ESP + 4]
fld QWORD PTR [.CPItest_divr_0]
fdivrp %ST(1)
ret
We now generate this:
test_divr:
fld QWORD PTR [%ESP + 4]
fdivr QWORD PTR [.CPItest_divr_0]
ret
This code desperately needs refactoring, which will come in the next
patch.
llvm-svn: 12841
2004-04-11 21:09:14 +00:00
e1efbc7c6c
Restructure the mul/div/rem handling code to follow the pattern the other
...
instructions use. This doesn't change any functionality except that long
constant expressions of these operations will now magically start working.
llvm-svn: 12840
2004-04-11 20:56:28 +00:00
f7ed7df539
Codegen FP adds and subtracts with a constant more efficiently, generating:
...
fld QWORD PTR [%ESP + 4]
fadd QWORD PTR [.CPItest_add_0]
instead of:
fld QWORD PTR [%ESP + 4]
fld QWORD PTR [.CPItest_add_0]
faddp %ST(1)
I also intend to do this for mul & div, but it appears that I have to
refactor a bit of code before I can do so.
This is tested by: test/Regression/CodeGen/X86/fp_constant_op.llx
llvm-svn: 12839
2004-04-11 20:26:20 +00:00
b6e0b58fbc
Add some new instructions
...
llvm-svn: 12838
2004-04-11 20:24:15 +00:00
5b44472200
Relax assertion to make this function work with a broader class of instructions
...
llvm-svn: 12836
2004-04-11 20:21:06 +00:00
3f912a6f43
Two changes:
...
1. If an incoming argument is dead, don't load it from the stack
2. Do not code gen noop copies at all (ie, cast int -> uint), not even to
a move. This should reduce register pressure for allocators that are
unable to coallesce away these copies in some cases.
llvm-svn: 12835
2004-04-11 19:21:59 +00:00
d450df05ba
Silence a spurious warning
...
llvm-svn: 12815
2004-04-10 18:32:01 +00:00
2b4c96e758
Reversed the order of the llvm.writeport() operands so that the value
...
is listed first and the address is listed second.
llvm-svn: 12795
2004-04-09 19:09:14 +00:00
2fc9983852
Changed assertions to error messages.
...
llvm-svn: 12787
2004-04-09 15:10:15 +00:00
c28c3b625f
Changes recommended by Chris:
...
InstSelectSimple.cpp:
Change the checks for proper I/O port address size into an exit() instead
of an assertion. Assertions aren't used in Release builds, and handling
this error should be graceful (not that this counts as graceful, but it's
more graceful).
Modified the generation of the IN/OUT instructions to have 0 arguments.
X86InstrInfo.td:
Added the OpSize attribute to the 16 bit IN and OUT instructions.
llvm-svn: 12786
2004-04-08 22:39:13 +00:00
10db062d41
Added the llvm.readport and llvm.writeport intrinsics for x86. These do
...
I/O port instructions on x86. The specific code sequence is tailored to
the parameters and return value of the intrinsic call.
Added the ability for implicit defintions to be printed in the Instruction
Printer.
Added the ability for RawFrm instruction to print implict uses and
defintions with correct comma output. This required adjustment to some
methods so that a leading comma would or would not be printed.
llvm-svn: 12782
2004-04-08 20:31:47 +00:00
69ee7e1353
Don't include InstrSelectionSupport.h.
...
llvm-svn: 12766
2004-04-07 20:55:32 +00:00
c125664927
Move ChooseRegOrImmed() prototype here, from InstrSelectionSupport.h.
...
llvm-svn: 12765
2004-04-07 20:38:57 +00:00
5c80118367
Don't include InstrSelectionSupport.h.
...
llvm-svn: 12764
2004-04-07 20:38:56 +00:00
8931345fe5
Fix insertion of SelectInsts.
...
llvm-svn: 12760
2004-04-07 18:31:47 +00:00
85521d70dd
Don't print [%reg + 0], just print [%reg]
...
llvm-svn: 12759
2004-04-07 17:33:56 +00:00
6d62df5422
First version of code to handle loads. Stub function for handling stores.
...
llvm-svn: 12758
2004-04-07 17:29:37 +00:00
989c04ab58
Support loading arguments from %I0...%I5 into virtual registers in
...
function prologues, and fix an off-by-one in visitCallInst that was
putting call args into the wrong registers.
llvm-svn: 12757
2004-04-07 17:04:09 +00:00
7985e56cf9
It's setting up the call args right now, but on the callee side, it's
...
trying to get incoming args off the stack, instead of the %i0...%i6 regs,
which is wrong.
llvm-svn: 12756
2004-04-07 16:41:22 +00:00
bd58b3fbe9
This is a start on handling setcc instructions. As the comment notes, we
...
have no good way of handling this until the code generator is improved.
We should probably just emit V9 instructions in the meantime.
llvm-svn: 12745
2004-04-07 05:04:51 +00:00
bb22d5a564
andd subcc instructions which is used to create the 'cmp' pseudo instruction
...
llvm-svn: 12744
2004-04-07 05:04:01 +00:00
f6245bc8e9
Avoid emitting an extra copy on each 32-bit operation
...
llvm-svn: 12743
2004-04-07 04:36:53 +00:00
4aac81435f
Make generation of stack-slot loads and copies less ugly.
...
llvm-svn: 12742
2004-04-07 04:29:14 +00:00
3675c30873
Fix bug in printing loads.
...
llvm-svn: 12741
2004-04-07 04:29:03 +00:00
42ffd2e32c
Add support for shift instructions, wrap some long lines
...
llvm-svn: 12740
2004-04-07 04:27:16 +00:00
8406cf3046
Fix encoding of existing shift instructions, add rr shifts
...
llvm-svn: 12739
2004-04-07 04:26:57 +00:00
fcdf82a19f
Add a bunch more instructions
...
llvm-svn: 12737
2004-04-07 04:06:46 +00:00
fd8212ef54
Merge my changes with brians
...
llvm-svn: 12736
2004-04-07 04:05:49 +00:00
37f92b534f
Add in some things I forgot, which Chris helpfully reminded me of...
...
llvm-svn: 12735
2004-04-07 04:05:12 +00:00
322423181b
Add support for the "Y" register, used by MUL & DIV.
...
llvm-svn: 12734
2004-04-07 04:01:11 +00:00
5524d54c02
Add UDIV, SDIV, and a few variants of WR.
...
llvm-svn: 12733
2004-04-07 04:01:00 +00:00
cfbfb8ac57
Preliminary support for getting 64-bit integer constants into registers.
...
Preliminary support for division. It's gross because you have to initialize
the "Y" register, which is the top 32 bits of the thing you're dividing.
llvm-svn: 12732
2004-04-07 04:00:49 +00:00
589bf05bf4
Prune unnecessary #includes
...
llvm-svn: 12731
2004-04-06 23:25:07 +00:00
b3deed9fae
Simple delay slot filler pass.
...
llvm-svn: 12730
2004-04-06 23:21:45 +00:00
610c685eb6
Add references to delay slot filler pass.
...
Fill in addPassesToJITCompile method.
llvm-svn: 12729
2004-04-06 23:21:24 +00:00
4bd246aee9
First attempt at handling frame index elimination.
...
llvm-svn: 12728
2004-04-06 22:10:22 +00:00
3915ad7c02
First attempt at special-casing printing of [%reg + offset] for
...
ld/st instructions - doesn't seem to work yet, but I think it's
just a typo or something somewhere.
llvm-svn: 12727
2004-04-06 22:10:11 +00:00
5e624b822b
Delete reference to "the Mach-O Runtime ABI".
...
llvm-svn: 12726
2004-04-06 22:09:59 +00:00
2e91a3d650
Deal with call return values.
...
Don't put NOPs in delay slots at all. We'll have a fix-up pass later.
llvm-svn: 12725
2004-04-06 22:09:23 +00:00
b8955205ce
file based off InstSelectSimple.cpp, slowly being replaced by generated code from the really simple X86 instruction selector tablegen backend
...
llvm-svn: 12715
2004-04-06 19:35:17 +00:00
de647007d3
Tablgen files for really simple instruction selector
...
llvm-svn: 12714
2004-04-06 19:34:00 +00:00
4b9361254a
Fix PR313: [x86] JIT miscompiles unsigned short to floating point
...
llvm-svn: 12711
2004-04-06 19:29:36 +00:00
ba33ae5831
Fix incorrect encoding of some ADC and SBB instuctions
...
llvm-svn: 12710
2004-04-06 19:20:32 +00:00
19c8b13ec5
Fix a minor bug in previous checking
...
Enable folding of long seteq/setne comparisons into branches and select instructions
Implement unfolded long relational comparisons against a constants a bit more efficiently
Folding comparisons changes code that looks like this:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
mov %ECX, %EAX
or %ECX, %EDX
sete %CL
test %CL, %CL
je .LBB2 # PC rel: F
into code that looks like this:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
mov %ECX, %EAX
or %ECX, %EDX
jne .LBB2 # PC rel: F
This speeds up 186.crafty by 6% with llc-ls.
llvm-svn: 12702
2004-04-06 17:34:50 +00:00
f2ee88eb5a
Improve codegen of long == and != comparisons against constants. Before,
...
comparing a long against zero got us this:
sub %ESP, 8
mov DWORD PTR [%ESP + 4], %ESI
mov DWORD PTR [%ESP], %EDI
mov %EAX, DWORD PTR [%ESP + 12]
mov %EDX, DWORD PTR [%ESP + 16]
mov %ECX, 0
mov %ESI, 0
mov %EDI, %EAX
xor %EDI, %ECX
mov %ECX, %EDX
xor %ECX, %ESI
or %EDI, %ECX
sete %CL
test %CL, %CL
je .LBB2 # PC rel: F
Now it gets us this:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
mov %ECX, %EAX
or %ECX, %EDX
sete %CL
test %CL, %CL
je .LBB2 # PC rel: F
llvm-svn: 12696
2004-04-06 16:02:27 +00:00
6c3bf13fce
Handle various other important cases of multiplying a long constant immediate. For
...
example, multiplying X*(1 + (1LL << 32)) now produces:
test:
mov %ECX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
mov %EAX, %ECX
add %EDX, %ECX
ret
[[[Note to Alkis: why isn't linear scan generating this code?? This might be a
problem with your intervals being too conservative:
test:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
add %EDX, %EAX
ret
end note]]]
Whereas GCC produces this:
T:
sub %esp, 12
mov %edx, DWORD PTR [%esp+16]
mov DWORD PTR [%esp+8], %edi
mov %ecx, DWORD PTR [%esp+20]
xor %edi, %edi
mov DWORD PTR [%esp], %ebx
mov %ebx, %edi
mov %eax, %edx
mov DWORD PTR [%esp+4], %esi
add %ebx, %edx
mov %edi, DWORD PTR [%esp+8]
lea %edx, [%ecx+%ebx]
mov %esi, DWORD PTR [%esp+4]
mov %ebx, DWORD PTR [%esp]
add %esp, 12
ret
I'm not sure example what GCC is smoking here, but it looks like it has just
confused itself with a bunch of stack slots or something. The intel compiler
is better, but still not good:
T:
movl 4(%esp), %edx #2.11
movl 8(%esp), %eax #2.11
lea (%eax,%edx), %ecx #3.12
movl $1, %eax #3.12
mull %edx #3.12
addl %ecx, %edx #3.12
ret #3.12
llvm-svn: 12693
2004-04-06 04:55:43 +00:00
1f6024cbbe
Efficiently handle a long multiplication by a constant. For this testcase:
...
long %test(long %X) {
%Y = mul long %X, 123
ret long %Y
}
we used to generate:
test:
sub %ESP, 12
mov DWORD PTR [%ESP + 8], %ESI
mov DWORD PTR [%ESP + 4], %EDI
mov DWORD PTR [%ESP], %EBX
mov %ECX, DWORD PTR [%ESP + 16]
mov %ESI, DWORD PTR [%ESP + 20]
mov %EDI, 123
mov %EBX, 0
mov %EAX, %ECX
mul %EDI
imul %ESI, %EDI
add %ESI, %EDX
imul %ECX, %EBX
add %ESI, %ECX
mov %EDX, %ESI
mov %EBX, DWORD PTR [%ESP]
mov %EDI, DWORD PTR [%ESP + 4]
mov %ESI, DWORD PTR [%ESP + 8]
add %ESP, 12
ret
Now we emit:
test:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
mov %EDX, 123
mul %EDX
imul %ECX, %ECX, 123
add %ECX, %EDX
mov %EDX, %ECX
ret
Which, incidently, is substantially nicer than what GCC manages:
T:
sub %esp, 8
mov %eax, 123
mov DWORD PTR [%esp], %ebx
mov %ebx, DWORD PTR [%esp+16]
mov DWORD PTR [%esp+4], %esi
mov %esi, DWORD PTR [%esp+12]
imul %ecx, %ebx, 123
mov %ebx, DWORD PTR [%esp]
mul %esi
mov %esi, DWORD PTR [%esp+4]
add %esp, 8
lea %edx, [%ecx+%edx]
ret
llvm-svn: 12692
2004-04-06 04:29:36 +00:00
2448baea2a
Improve code generation of long shifts by 32.
...
On this testcase:
long %test(long %X) {
%Y = shr long %X, ubyte 32
ret long %Y
}
instead of:
t:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EAX, DWORD PTR [%ESP + 8]
sar %EAX, 0
mov %EDX, 0
ret
we now emit:
test:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EAX, DWORD PTR [%ESP + 8]
mov %EDX, 0
ret
llvm-svn: 12688
2004-04-06 03:42:38 +00:00
7332d4c5fd
Bugfixes: inc/dec don't set the carry flag!
...
llvm-svn: 12687
2004-04-06 03:36:57 +00:00
decce5bc26
Improve code for passing constant longs as arguments to function calls.
...
For example, on this instruction:
call void %test(long 1234)
Instead of this:
mov %EAX, 1234
mov %ECX, 0
mov DWORD PTR [%ESP], %EAX
mov DWORD PTR [%ESP + 4], %ECX
call test
We now emit this:
mov DWORD PTR [%ESP], 1234
mov DWORD PTR [%ESP + 4], 0
call test
llvm-svn: 12686
2004-04-06 03:23:00 +00:00
5fc6f77b60
Emit more efficient 64-bit operations when the RHS is a constant, and one
...
of the words of the constant is zeros. For example:
Y = and long X, 1234
now generates:
Yl = and Xl, 1234
Yh = 0
instead of:
Yl = and Xl, 1234
Yh = and Xh, 0
llvm-svn: 12685
2004-04-06 03:15:53 +00:00
b49608afad
Fix typeo
...
llvm-svn: 12684
2004-04-06 02:13:25 +00:00
996e667ad4
Add support for simple immediate handling to long instruction selection.
...
This allows us to handle code like 'add long %X, 123456789012' more efficiently.
llvm-svn: 12683
2004-04-06 02:11:49 +00:00
9366f0347d
The sbb instructions really ARE sbb's, not adc's
...
llvm-svn: 12682
2004-04-06 02:02:11 +00:00
37ba31f740
Implement negation of longs efficiently. For this testcase:
...
long %test(long %X) {
%Y = sub long 0, %X
ret long %Y
}
We used to generate:
test:
sub %ESP, 4
mov DWORD PTR [%ESP], %ESI
mov %ECX, DWORD PTR [%ESP + 8]
mov %ESI, DWORD PTR [%ESP + 12]
mov %EAX, 0
mov %EDX, 0
sub %EAX, %ECX
sbb %EDX, %ESI
mov %ESI, DWORD PTR [%ESP]
add %ESP, 4
ret
Now we generate:
test:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, DWORD PTR [%ESP + 8]
neg %EAX
adc %EDX, 0
neg %EDX
ret
llvm-svn: 12681
2004-04-06 01:48:06 +00:00
bfe74f58d9
Minor tweak to avoid an extra reg-reg copy that the register allocator has to eliminate
...
llvm-svn: 12680
2004-04-06 01:25:33 +00:00
464e2ea567
Two changes:
...
* In promote32, if we can just promote a constant value, do so instead of
promoting a constant dynamically.
* In visitReturn inst, actually USE the promote32 argument that takes a
Value*
The end result of this is that we now generate this:
test:
mov %EAX, 0
ret
instead of...
test:
mov %AX, 0
movzx %EAX, %AX
ret
for:
ushort %test() {
ret ushort 0
}
llvm-svn: 12679
2004-04-06 01:21:00 +00:00
69193f93b6
Support getelementptr instructions which use uint's to index into structure
...
types and can have arbitrary 32- and 64-bit integer types indexing into
sequential types.
llvm-svn: 12653
2004-04-05 01:30:19 +00:00
dfcf8e34cf
In the perhaps not-to-distant future, we might support gep instructions that
...
have non-long indices for sequential types. In order to avoid trying to figure
out how the v9 backend works, we'll just hack it in the preselection pass.
llvm-svn: 12647
2004-04-04 20:44:05 +00:00
d0bdad38f3
Add support for many of the MRegisterInfo callbacks.
...
Eliminating call-frame pseudo instrs and frame indices are still stubs.
Flesh out the emitPrologue method based on better ABI knowledge.
llvm-svn: 12632
2004-04-02 20:53:37 +00:00
d4869e4107
Add load, store, and NOP instructions.
...
Fix up comments.
llvm-svn: 12631
2004-04-02 20:53:37 +00:00
b65254a34d
Add support for printing pc-relative displacements of functions (as used in
...
the CALL instruction).
llvm-svn: 12630
2004-04-02 20:53:35 +00:00
2fd46b6e43
Add support for call instructions (0-ary only for now).
...
llvm-svn: 12629
2004-04-02 20:53:33 +00:00
d64e904e27
Clean up code a bit.
...
llvm-svn: 12615
2004-04-02 18:11:32 +00:00
2845936a34
Only strip symbols if emitting bytecode to the assembly file.
...
Move lowerselect pass to come after preselection. Move machine
code construction and stack slots pass to come right before instruction
selection. This is to help fix perlbmk.
Update comments.
Make the sequence of passes in addPassesToJITCompile look more like
the sequence of passes in addPassesToEmitAssembly, including support
for -print-machineinstrs.
llvm-svn: 12614
2004-04-02 17:52:40 +00:00
cc24411c0a
Add support for constant select expressions. Clarify the assertion failure msg.
...
llvm-svn: 12613
2004-04-02 17:52:29 +00:00
fe66caa9a0
Fix type in comments
...
llvm-svn: 12611
2004-04-02 16:02:50 +00:00
5fc4772d5e
Fix type in instruction builder instantiation
...
llvm-svn: 12610
2004-04-02 15:51:03 +00:00
d186ed02e4
Add more ADC and SBB variants
...
llvm-svn: 12607
2004-04-02 07:11:10 +00:00
b28dd11e33
Add support for select constant expressions to the CBE, fixing SIOD
...
llvm-svn: 12589
2004-04-01 05:28:26 +00:00
bc7e35b3b1
Simplify code by using the more powerful BuildMI forms.
...
Implement a small optimization. In test/Regression/CodeGen/X86/select.ll,
we now generate this for foldSel3:
foldSel3:
mov %AL, BYTE PTR [%ESP + 4]
fld DWORD PTR [%ESP + 8]
fld DWORD PTR [%ESP + 12]
mov %EAX, DWORD PTR [%ESP + 16]
mov %ECX, DWORD PTR [%ESP + 20]
cmp %EAX, %ECX
fxch %ST(1)
fcmovae %ST(0), %ST(1)
*** fstp %ST(1)
ret
Instead of:
foldSel3:
mov %AL, BYTE PTR [%ESP + 4]
fld DWORD PTR [%ESP + 8]
fld DWORD PTR [%ESP + 12]
mov %EAX, DWORD PTR [%ESP + 16]
mov %ECX, DWORD PTR [%ESP + 20]
cmp %EAX, %ECX
fxch %ST(1)
fcmovae %ST(0), %ST(1)
*** fxch %ST(1)
*** fstp %ST(0)
ret
In practice, this only effects code size: performance should be basically
unaffected.
llvm-svn: 12588
2004-04-01 04:06:09 +00:00
3c8561442c
Wrap at 80 cols
...
llvm-svn: 12587
2004-04-01 04:03:27 +00:00
d55509c281
Generate slightly smaller code, "test R, R" instead of "cmp R, 0"
...
llvm-svn: 12579
2004-03-31 22:22:36 +00:00
a4b15f04c6
The X86 backend no longer needs the select lowering pass.
...
llvm-svn: 12578
2004-03-31 22:03:46 +00:00
37a7f09d80
Codegen FP select instructions into X86 conditional moves. Annoyingly enough
...
the X86 does not support a full set of fp cmove instructions, so we can't always
fold the condition into the select. :( Yuck.
llvm-svn: 12577
2004-03-31 22:03:35 +00:00
c07c95816a
Add support for floating point conditional move instructions
...
llvm-svn: 12576
2004-03-31 22:02:36 +00:00
cbb4ed9ef2
Add support for FP cmoves
...
llvm-svn: 12575
2004-03-31 22:02:21 +00:00
9fe1646804
Add FP conditional move instructions, which annoyingly have special properties
...
that require the asmwriter to be extended (printing implicit uses before the
explicit operands)
llvm-svn: 12574
2004-03-31 22:02:13 +00:00
afbafb55ea
MBB::remove should not modify the iterator passed in
...
llvm-svn: 12572
2004-03-31 21:59:59 +00:00
623710bf2f
Factor out getStaticStackSize from InsertPrologCode(), so that I can more
...
easily steal it for a separate use in the reoptimizer.
llvm-svn: 12568
2004-03-31 20:58:37 +00:00
32817f5985
Fold comparisons into select instructions, making much better code and
...
using our broad selection of movcc instructions. :)
llvm-svn: 12560
2004-03-30 22:39:09 +00:00
358c97e7ae
Implement spill code folding for all of the conditional move instructions
...
llvm-svn: 12554
2004-03-30 21:29:47 +00:00
53b58cb854
Add direct support for integer select instructions, though we still don't support
...
folding compares into the select yet.
llvm-svn: 12553
2004-03-30 21:22:00 +00:00
1563983d81
Fix some serious bugs in the cmov descriptions, which didn't cause a problem because
...
we never generated them
Make indentation a bit more consistent
llvm-svn: 12549
2004-03-30 20:18:02 +00:00
0048e574fb
Fix a fairly major performance problem. If a PHI node had a constant as
...
an incoming value from a block, the selector would evaluate the constant
at the TOP of the block instead of at the end of the block. This made the
live range for the constant span the entire block, increasing register
pressure needlessly.
llvm-svn: 12542
2004-03-30 19:10:12 +00:00
1a0e9ac2f5
Add the select lowering pass to get initial support for select instructions
...
llvm-svn: 12541
2004-03-30 18:41:59 +00:00
fd02378d3e
Don't warn about a null live range if the Value is a ConstantIntegral.
...
Otherwise, if you're in debugging mode, you get warnings for (apparently)
every immediate constant in the function during reg. allocation.
llvm-svn: 12538
2004-03-29 21:58:41 +00:00
ba6641d598
Fix PR299: [Sparc] Code generator asserts on alloc of zero size type
...
llvm-svn: 12504
2004-03-19 04:21:43 +00:00
6ca9b89abb
Malloc doesn't kill a load. This patch need not go into 1.2 though.
...
llvm-svn: 12500
2004-03-18 17:01:26 +00:00
dc47e27188
Fix a really nasty bug that was breaking ijpeg in LLC mode. We were incorrectly
...
folding load instructions into other instructions across free instruction
boundaries. Perhaps this will also fix the other strange failures?
llvm-svn: 12494
2004-03-18 06:29:54 +00:00
d962dd5528
The .type directive on Solaris uses the # character instead of @.
...
llvm-svn: 12454
2004-03-16 22:52:04 +00:00
3fb0e203cd
Fix bug in zero-extending of shorts.
...
llvm-svn: 12453
2004-03-16 22:45:42 +00:00
ae22ce5370
Add UMULrr and SMULrr instructions.
...
llvm-svn: 12452
2004-03-16 22:37:13 +00:00
ae0ca8baa6
Use ! for comment char; it works in both Solaris as and GAS.
...
llvm-svn: 12451
2004-03-16 22:37:12 +00:00
67fcefbfef
Make getClass more robust by adding cLong.
...
Add handling for Mul instruction.
llvm-svn: 12450
2004-03-16 22:37:11 +00:00
804dc659b6
Add LAHF instruction
...
llvm-svn: 12424
2004-03-15 17:20:14 +00:00
4837f6c0d9
Another API change to MRegisterInfo::foldMemoryOperand. Instead of a
...
MachineBasicBlock::iterator take a MachineInstr*.
llvm-svn: 12392
2004-03-14 20:14:27 +00:00
48da2f8a6d
Change MRegisterInfo::foldMemoryOperand to return the folded
...
instruction to make the API more flexible.
llvm-svn: 12386
2004-03-14 07:19:51 +00:00
699aa70f0c
It helps if I save the file. :)
...
llvm-svn: 12357
2004-03-13 00:24:52 +00:00
071a5e5649
Rename the intrinsic enum values for llvm.va_* from Intrinsic::va_* to
...
Intrinsic::va*. This avoid conflicting with macros in the stdlib.h file.
llvm-svn: 12356
2004-03-13 00:24:00 +00:00
1694dafece
Make -print-machineinstrs show us the code both before and after reg. alloc.
...
llvm-svn: 12344
2004-03-12 21:19:08 +00:00
9884bda541
Add support for a wider range of CMOV instructions.
...
llvm-svn: 12336
2004-03-12 17:59:56 +00:00
65a64e1e7a
ADd support for select instructions
...
llvm-svn: 12316
2004-03-12 05:52:14 +00:00
505a0838f6
Move implementations of functions here, which avoids #including <cstdlib> in the
...
header file and all those who #include it.
llvm-svn: 12297
2004-03-11 23:52:43 +00:00
14e98b9d96
Get rid of the abort in PhyRegAlloc::finishSavingState().
...
Make an explicit call to it from runOnFunction() if we know we're supposed to
write into the global. This is lame (esp. the const_cast), but it solves
the problem.
llvm-svn: 12291
2004-03-11 19:46:30 +00:00
c028910d25
Give pass a name
...
llvm-svn: 12290
2004-03-11 19:23:15 +00:00
d313bdfa43
Fix compilation on Sparc: assert(0) => abort()
...
llvm-svn: 12289
2004-03-11 19:08:24 +00:00
5935e0a002
In PhyRegAlloc::saveState(), dump Arguments' saved-state, and try to
...
make the output more compact.
Divorce state-saving from the doFinalization method; for some reason it's not
getting called when I want it to, at Reoptimizer time. Put the guts in
PhyRegAlloc::finishSavingState(). Put an abort() in it so that I can be really
really sure that it's getting called.
Update comments.
llvm-svn: 12286
2004-03-11 06:45:52 +00:00
44a540e869
Remove ghostly directory from the build
...
llvm-svn: 12285
2004-03-11 04:42:41 +00:00
0e09916d60
Move all the SaveState options and stuff inton one spot at the top of the file.
...
De-constify SaveStateToModule; we have to set both it and SaveRegAllocState
explicitly in the reoptimizer.
Make SaveRegAllocState an 'external location' option.
llvm-svn: 12278
2004-03-10 22:21:03 +00:00
f819263cc1
Only call verifySavedState if SaveRegAllocState is set AND debugging flag is on.
...
llvm-svn: 12277
2004-03-10 22:01:59 +00:00
f234284986
Check if printing of implicit uses is required for all types of shift
...
instructions.
llvm-svn: 12258
2004-03-09 06:10:15 +00:00
3a27bd889b
Hmm, who left this sitting around in my tree
...
llvm-svn: 12255
2004-03-09 04:49:13 +00:00
8a3f2f3600
Differentiate between extended precision floats (80-bit) and double precision floats (64-bit)
...
llvm-svn: 12254
2004-03-09 03:37:54 +00:00
8ac958bf43
Use newly added API to emit bytes for instructions that gas misassembles
...
llvm-svn: 12253
2004-03-09 03:35:34 +00:00
508b459d12
Add emitInstruction() API so that we can get the bytes of a simple instruction
...
llvm-svn: 12252
2004-03-09 03:34:53 +00:00
a7c2da3af5
Constify things a bit
...
llvm-svn: 12251
2004-03-09 03:30:12 +00:00
d734587436
Change PhyRegAlloc::saveStateForValue()'s arg type to deal with
...
AllocInfo.Instruction becoming an int.
llvm-svn: 12247
2004-03-08 23:22:03 +00:00
f0a73a3f42
Save argument list alloc state by recording it as the operands of Instruction
...
#-1. Other minor changes to deal with AllocInfo.Instruction becoming an int.
llvm-svn: 12246
2004-03-08 23:22:02 +00:00
0be7ea7289
Make AllocInfo's Instruction an int, so that we can overload it for arguments.
...
(Instruction #-1's operands = argument list).
llvm-svn: 12245
2004-03-08 23:22:01 +00:00
98502aae76
Avoid allocating special registers a bit more robustly
...
llvm-svn: 12207
2004-03-08 03:48:07 +00:00
653e662a93
Implement folding explicit load instructions into binary operations. For a
...
testcase like this:
int %test(int* %P, int %A) {
%Pv = load int* %P
%B = add int %A, %Pv
ret int %B
}
We now generate:
test:
mov %ECX, DWORD PTR [%ESP + 4]
mov %EAX, DWORD PTR [%ESP + 8]
add %EAX, DWORD PTR [%ECX]
ret
Instead of:
test:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
mov %EAX, DWORD PTR [%EAX]
add %EAX, %ECX
ret
... saving one instruction, and often a register. Note that there are a lot
of other instructions that could use this, but they aren't handled. I'm not
really interested in adding them, but mul/div and all of the FP instructions
could be supported as well if someone wanted to add them.
llvm-svn: 12204
2004-03-08 01:58:35 +00:00
1dd6afe6a2
Rearrange and refactor some code. No functionality changes.
...
llvm-svn: 12203
2004-03-08 01:18:36 +00:00
d6f62ba55b
Add memory operand version of conditional move.
...
llvm-svn: 12190
2004-03-07 03:19:11 +00:00
4e0669cef0
Support return values of basic integer types.
...
Emit RETL instruction to return instead of funny JMPL.
Fix indentation.
llvm-svn: 12186
2004-03-06 05:32:28 +00:00
c65b97d4f6
Sort stanzas into Sparc V8 book page number order.
...
Add RET, RETL. Rename SAVE, RESTORE & JMPL for consistency.
llvm-svn: 12185
2004-03-06 05:32:13 +00:00
84b4c9208d
Hack it so we do not try to allocate values to G0.
...
llvm-svn: 12184
2004-03-06 05:31:32 +00:00
901cfa9e2e
Make prolog align stack properly. Make epilog not touch any registers.
...
llvm-svn: 12183
2004-03-06 05:31:21 +00:00
5a1c7a8be3
Emit register names in lowercase, as required by the assembler.
...
llvm-svn: 12182
2004-03-06 05:30:21 +00:00
639b04aca3
Teach getRegClassForType where to find FP registers
...
llvm-svn: 12180
2004-03-06 03:54:13 +00:00
0c76d1146f
Asm output is looking a lot better; not correct for all operands yet though.
...
llvm-svn: 12143
2004-03-05 08:39:09 +00:00
9c609df3c9
Support -print-machineinstrs
...
llvm-svn: 12124
2004-03-04 19:22:16 +00:00
8351d8c1a8
make -print-machineinstrs work for both SparcV9 and X86
...
llvm-svn: 12122
2004-03-04 19:16:23 +00:00
b9501c1f8c
Add assertion for scale verification.
...
llvm-svn: 12120
2004-03-04 18:05:02 +00:00
82ec4a561b
Asm printer support, based on x86 - only prints mnemonics for now
...
llvm-svn: 12113
2004-03-04 06:00:41 +00:00
8ace44fe0d
Double-FP pseudo-registers.
...
llvm-svn: 12112
2004-03-04 05:15:03 +00:00
92c95f812d
Subtract instructions; minor cleanups
...
llvm-svn: 12111
2004-03-04 04:37:45 +00:00
d2e89190d9
Floating point regs
...
llvm-svn: 12110
2004-03-04 04:37:22 +00:00
956fb06a4a
Simple copyConstantToReg support, SETHIi and ORri
...
llvm-svn: 12107
2004-03-04 00:56:25 +00:00
165ff998e0
Support add - note, still missing important copyConstantToRegister stuff
...
llvm-svn: 12106
2004-03-03 23:03:14 +00:00
93e9878c2c
SPECIFY a target data to initialize the CBE target with. Until now we have
...
been using the default target data layout object to lower malloc instructions,
causing us to allocate more memory than we needed! This could improve the
performance of the CBE generated code substantially!
llvm-svn: 12088
2004-03-03 02:14:15 +00:00
87ed2a4096
Add a new constructor
...
llvm-svn: 12087
2004-03-03 02:12:47 +00:00
a6025e6480
Doxygenify some comments.
...
llvm-svn: 12064
2004-03-01 23:53:11 +00:00
f96405a1ce
Add this back, as its absence introduces assertions, and it seems to work now
...
that Instructions are annotable again
llvm-svn: 12045
2004-03-01 15:28:27 +00:00
e63e8ea884
fix bug in previous checkin
...
llvm-svn: 12044
2004-03-01 15:05:17 +00:00
427cec1395
TargetCacheInfo has been removed; its only uses were to propagate a constant
...
(16) into certain areas of the SPARC V9 back-end. I'm fairly sure the US IIIi's
dcache has 32-byte lines, so I'm not sure where the 16 came from. However, in
the interest of not breaking things any more than they already are, I'm going
to leave the constant alone.
llvm-svn: 12043
2004-03-01 06:43:29 +00:00
1f4642c47c
Handle passing constant integers to functions much more efficiently. Instead
...
of generating this code:
mov %EAX, 4
mov DWORD PTR [%ESP], %EAX
mov %AX, 123
movsx %EAX, %AX
mov DWORD PTR [%ESP + 4], %EAX
call Y
we now generate:
mov DWORD PTR [%ESP], 4
mov DWORD PTR [%ESP + 4], 123
call Y
Which hurts the eyes less. :)
Considering that register pressure around call sites is already high (with all
of the callee clobber registers n stuff), this may help a lot.
llvm-svn: 12028
2004-03-01 02:42:43 +00:00
5c7d3cda78
Fix a minor code-quality issue. When passing 8 and 16-bit integer constants
...
to function calls, we would emit dead code, like this:
int Y(int, short, double);
int X() {
Y(4, 123, 4);
}
--- Old
X:
sub %ESP, 20
mov %EAX, 4
mov DWORD PTR [%ESP], %EAX
*** mov %AX, 123
mov %AX, 123
movsx %EAX, %AX
mov DWORD PTR [%ESP + 4], %EAX
fld QWORD PTR [.CPIX_0]
fstp QWORD PTR [%ESP + 8]
call Y
mov %EAX, 0
# IMPLICIT_USE %EAX %ESP
add %ESP, 20
ret
Now we emit:
X:
sub %ESP, 20
mov %EAX, 4
mov DWORD PTR [%ESP], %EAX
mov %AX, 123
movsx %EAX, %AX
mov DWORD PTR [%ESP + 4], %EAX
fld QWORD PTR [.CPIX_0]
fstp QWORD PTR [%ESP + 8]
call Y
mov %EAX, 0
# IMPLICIT_USE %EAX %ESP
add %ESP, 20
ret
Next up, eliminate the mov AX and movsx entirely!
llvm-svn: 12026
2004-03-01 02:34:08 +00:00
fcb4f9d00b
Remove public header. It's been moved to lib/Target/SparcV9
...
llvm-svn: 12004
2004-02-29 19:13:20 +00:00
3859031b9b
Move the private MachineInstrAnnot.h into a private directory.
...
llvm-svn: 12003
2004-02-29 19:12:51 +00:00
9a4653edfa
Add instruction name description.
...
llvm-svn: 11998
2004-02-29 18:44:03 +00:00
0824ffc697
Use correct template for SHLD and SHRD instructions so that the memory
...
operand size is correctly specified.
llvm-svn: 11997
2004-02-29 09:19:40 +00:00
c7fd0770a0
Improve allocation order:
...
1) For 8-bit registers try to use first the ones that are parts of the
same register (AL then AH). This way we only alias 2 16/32-bit
registers after allocating 4 8-bit variables.
2) Move EBX as the last register to allocate. This will cause less
spills to happen since we will have 8-bit registers available up to
register excaustion (assuming we use the allocation order). It
would be nice if we could push all of the 8-bit aliased registers
towards the end but we much prefer to keep callee saved register to
the end to avoid saving them on entry and exit of the function.
For example this gives a slight reduction of spills with linear scan
on 164.gzip.
Before:
11221 asm-printer - Number of machine instrs printed
975 spiller - Number of loads added
675 spiller - Number of stores added
398 spiller - Number of register spills
After:
11182 asm-printer - Number of machine instrs printed
952 spiller - Number of loads added
652 spiller - Number of stores added
386 spiller - Number of register spills
llvm-svn: 11996
2004-02-29 09:17:01 +00:00
ea81b79a97
A big X86 instruction rename. The instructions are renamed to make
...
their names more decriptive. A name consists of the base name, a
default operand size followed by a character per operand with an
optional special size. For example:
ADD8rr -> add, 8-bit register, 8-bit register
IMUL16rmi -> imul, 16-bit register, 16-bit memory, 16-bit immediate
IMUL16rmi8 -> imul, 16-bit register, 16-bit memory, 8-bit immediate
MOVSX32rm16 -> movsx, 32-bit register, 16-bit memory
llvm-svn: 11995
2004-02-29 08:50:03 +00:00
2f80d586b8
Remove dead member variables of SparcV9SchedInfo and TargetSchedInfo
...
llvm-svn: 11994
2004-02-29 08:40:03 +00:00
1e36fb030c
Eliminate the X86-specific BMI functions, using BuildMI instead.
...
Replace uses of addZImm with addImm.
llvm-svn: 11992
2004-02-29 07:22:16 +00:00
9a97573267
Fix a miscompilation of 197.parser that occurs when you have single basic
...
block loops.
llvm-svn: 11990
2004-02-29 07:10:16 +00:00
ed01da8f0b
Adjust to change in TII ctor arguments
...
llvm-svn: 11987
2004-02-29 06:31:44 +00:00
f20abac9bc
Eliminate the distinction between "real" and "unreal" instructions
...
llvm-svn: 11986
2004-02-29 06:31:16 +00:00
ca89812db7
These two virtual methods are never called.
...
llvm-svn: 11984
2004-02-29 05:59:33 +00:00
71a899dea6
Remove a TON of flags that noone cares about
...
llvm-svn: 11983
2004-02-29 05:58:30 +00:00
59d9e9126d
Noone calls these virtual methods
...
llvm-svn: 11982
2004-02-29 05:58:16 +00:00
79d9a93a71
This is the only file in the system that uses this enum. eliminate it.
...
llvm-svn: 11981
2004-02-29 05:57:59 +00:00
e5f08917ae
Implement initial prolog/epilog code insertion methods.
...
llvm-svn: 11979
2004-02-29 05:18:30 +00:00
876f6f96d0
Use correct template for ADC instruction with memory operands.
...
llvm-svn: 11974
2004-02-29 02:18:17 +00:00
b1862e4d3b
Add an instruction selector capable of selecting 'ret void'
...
llvm-svn: 11973
2004-02-29 00:27:00 +00:00
fa63580517
SHLD and SHRD take 32-bit operands but an 8-bit immediate. Rename them
...
to denote this fact.
llvm-svn: 11972
2004-02-28 23:46:44 +00:00
4953ae085a
Floating point loads/stores act on memory operands. Rename them to
...
denote this fact.
llvm-svn: 11971
2004-02-28 23:42:35 +00:00
c6948fa762
Rename instruction templates to be easier to the human eye to
...
parse. The name is now I (operand size)*. For example:
Im32 -> instruction with 32-bit memory operands.
Im16i8 -> instruction with 16-bit memory operands and 8 bit immediate
operands.
llvm-svn: 11970
2004-02-28 23:09:03 +00:00
5b5dee4afb
Uncomment instructions that take both an immediate and a memory
...
operand but their sizes differ.
llvm-svn: 11969
2004-02-28 22:06:59 +00:00
194939086d
Each instruction now has both an ImmType and a MemType. This describes
...
the size of the immediate and the memory operand on instructions that
use them. This resolves problems with instructions that take both a
memory and an immediate operand but their sizes differ (i.e. ADDmi32b).
llvm-svn: 11967
2004-02-28 22:02:05 +00:00
72bb8fcb15
Change this so that LLC actually tries to run the code generator, though it will
...
immediately abort due to lack of an instruction selector. :)
llvm-svn: 11963
2004-02-28 20:21:45 +00:00
990c279f5c
SparcV8 now builds.
...
llvm-svn: 11960
2004-02-28 19:54:00 +00:00
daeeaa72cd
fine grainify namespacification
...
llvm-svn: 11959
2004-02-28 19:53:18 +00:00
1a3ee3e961
Finegrainify namespacification
...
llvm-svn: 11958
2004-02-28 19:52:49 +00:00
e40fd90b0b
Tab completion is our friend.
...
llvm-svn: 11957
2004-02-28 19:45:39 +00:00
0179fb5881
Clean up rules
...
llvm-svn: 11956
2004-02-28 19:43:40 +00:00
74598091a1
Bring this directory into "it actually compiles" land
...
llvm-svn: 11955
2004-02-28 19:37:18 +00:00
3290952f8b
Fix multiple inclusion problem
...
llvm-svn: 11954
2004-02-28 19:31:32 +00:00
2debead504
Do not generate instructions with mismatched memory/immediate sized
...
operands. The X86 backend doesn't handle them properly right now.
llvm-svn: 11944
2004-02-28 06:01:43 +00:00
24b3d0bdae
Further comment updates.
...
llvm-svn: 11933
2004-02-28 03:20:31 +00:00
f87966b8c4
Update comments.
...
llvm-svn: 11932
2004-02-28 03:12:31 +00:00
2dbc79df84
My previous commit broke the jit. The shift instructions always take
...
an 8-bit immediate. So mark the shifts that take immediates as taking
an 8-bit argument. The rest with the implicit use of CL are marked
appropriately.
A bug still exists:
def SHLDmri32 : I2A8 <"shld", 0xA4, MRMDestMem>, TB; // [mem32] <<= [mem32],R32 imm8
The immediate in the above instruction is 8-bit but the memory
reference is 32-bit. The printer prints this as an 8-bit reference
which confuses the assembler. Same with SHRDmri32.
llvm-svn: 11931
2004-02-28 02:56:26 +00:00
ffeef64177
Turn off the SparcV9MachineCodeDestructionPass for now, because it's buggy
...
llvm-svn: 11930
2004-02-27 21:15:40 +00:00
50d19bf1de
Correct DestroyMachineFunction's getPassName
...
llvm-svn: 11929
2004-02-27 21:01:14 +00:00
b10b04c5ec
Fix argument size for SHL, SHR, SAR, SHLD and SHRD families of
...
instructions.
llvm-svn: 11923
2004-02-27 19:46:30 +00:00
75ed0f67bf
Fix encoding of ADD and SUB family of instructions. Also rearrange
...
them so that they are consistent with AND, XOR, etc...
llvm-svn: 11922
2004-02-27 18:57:00 +00:00
58270fcf1f
Rename MRMS[0-7]{r,m} to MRM[0-7]{r,m}.
...
llvm-svn: 11921
2004-02-27 18:55:12 +00:00
9476b7cbe5
Add memory operand folding support for the SETcc family of
...
instructions.
llvm-svn: 11907
2004-02-27 16:13:37 +00:00
8d99063b38
Add memory operand folding support for SHLD and SHRD instructions.
...
llvm-svn: 11905
2004-02-27 15:03:18 +00:00
3537404299
Add memory operand folding support for SHL, SHR and SAR, SHLD instructions.
...
llvm-svn: 11903
2004-02-27 09:28:43 +00:00
f020dfb43c
Rename SHL, SHR, SAR, SHLD and SHLR instructions to make them
...
consistent with the rest and also pepare for the addition of their
memory operand variants.
llvm-svn: 11902
2004-02-27 06:57:05 +00:00
feb7c49ce4
Fixes for PR258 and PR259.
...
Functions with linkonce linkage are declared with weak linkage.
Global floating point constants used to represent unprintable values
(such as NaN and infinity) are declared static so that they don't interfere
with other CBE generated translation units.
llvm-svn: 11884
2004-02-26 22:20:58 +00:00
61719d48d2
Uncomment assertions that register# != 0 on calls to
...
MRegisterInfo::is{Physical,Virtual}Register. Apply appropriate fixes
to relevant files.
llvm-svn: 11882
2004-02-26 22:00:20 +00:00
7140e4696a
Use a map instead of annotations
...
llvm-svn: 11875
2004-02-26 08:02:17 +00:00
9192bbdad9
Fix some warnings, some of which were spurious, and some of which were real
...
bugs. Thanks Brian!
llvm-svn: 11859
2004-02-26 01:20:02 +00:00
1743c4090d
Instructions to call and return from functions.
...
llvm-svn: 11858
2004-02-26 00:37:12 +00:00
564654d654
SparcV8 regs are really 32-bit, not 64! Thanks, Chris.
...
llvm-svn: 11835
2004-02-25 21:03:02 +00:00
f8dcdcc83b
Clean up the tablegen descriptions for SparcV8.
...
llvm-svn: 11834
2004-02-25 21:02:21 +00:00
2122b969f9
Fix the SparcV8 register definitions that were imported from PPC template.
...
llvm-svn: 11833
2004-02-25 21:00:05 +00:00
0e3a7ca53e
SparcV8 has different types of instructions, but F1 is only used for CALL.
...
llvm-svn: 11832
2004-02-25 20:52:20 +00:00
64c9b223bd
Fix failures in 099.go due to the cfgsimplify pass creating switch instructions
...
where there did not used to be any before
llvm-svn: 11829
2004-02-25 19:30:19 +00:00
9a5bd7fca7
SparcV8 skeleton
...
llvm-svn: 11828
2004-02-25 19:28:19 +00:00
068b4596d4
Great renaming part II: Sparc --> SparcV9 (also includes command-line options and Makefiles)
...
llvm-svn: 11827
2004-02-25 19:08:12 +00:00
94e95d2b3e
Great renaming: Sparc --> SparcV9
...
llvm-svn: 11826
2004-02-25 18:44:15 +00:00
309327a4b5
Teach the instruction selector how to transform 'array' GEP computations into X86
...
scaled indexes. This allows us to compile GEP's like this:
int* %test([10 x { int, { int } }]* %X, int %Idx) {
%Idx = cast int %Idx to long
%X = getelementptr [10 x { int, { int } }]* %X, long 0, long %Idx, ubyte 1, ubyte 0
ret int* %X
}
Into a single address computation:
test:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
lea %EAX, DWORD PTR [%EAX + 8*%ECX + 4]
ret
Before it generated:
test:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
shl %ECX, 3
add %EAX, %ECX
lea %EAX, DWORD PTR [%EAX + 4]
ret
This is useful for things like int/float/double arrays, as the indexing can be folded into
the loads&stores, reducing register pressure and decreasing the pressure on the decode unit.
With these changes, I expect our performance on 256.bzip2 and gzip to improve a lot. On
bzip2 for example, we go from this:
10665 asm-printer - Number of machine instrs printed
40 ra-local - Number of loads/stores folded into instructions
1708 ra-local - Number of loads added
1532 ra-local - Number of stores added
1354 twoaddressinstruction - Number of instructions added
1354 twoaddressinstruction - Number of two-address instructions
2794 x86-peephole - Number of peephole optimization performed
to this:
9873 asm-printer - Number of machine instrs printed
41 ra-local - Number of loads/stores folded into instructions
1710 ra-local - Number of loads added
1521 ra-local - Number of stores added
789 twoaddressinstruction - Number of instructions added
789 twoaddressinstruction - Number of two-address instructions
2142 x86-peephole - Number of peephole optimization performed
... and these types of instructions are often in tight loops.
Linear scan is also helped, but not as much. It goes from:
8787 asm-printer - Number of machine instrs printed
2389 liveintervals - Number of identity moves eliminated after coalescing
2288 liveintervals - Number of interval joins performed
3522 liveintervals - Number of intervals after coalescing
5810 liveintervals - Number of original intervals
700 spiller - Number of loads added
487 spiller - Number of stores added
303 spiller - Number of register spills
1354 twoaddressinstruction - Number of instructions added
1354 twoaddressinstruction - Number of two-address instructions
363 x86-peephole - Number of peephole optimization performed
to:
7982 asm-printer - Number of machine instrs printed
1759 liveintervals - Number of identity moves eliminated after coalescing
1658 liveintervals - Number of interval joins performed
3282 liveintervals - Number of intervals after coalescing
4940 liveintervals - Number of original intervals
635 spiller - Number of loads added
452 spiller - Number of stores added
288 spiller - Number of register spills
789 twoaddressinstruction - Number of instructions added
789 twoaddressinstruction - Number of two-address instructions
258 x86-peephole - Number of peephole optimization performed
Though I'm not complaining about the drop in the number of intervals. :)
llvm-svn: 11820
2004-02-25 07:00:55 +00:00
d1ee55d439
* Make the previous patch more efficient by not allocating a temporary MachineInstr
...
to do analysis.
*** FOLD getelementptr instructions into loads and stores when possible,
making use of some of the crazy X86 addressing modes.
For example, the following C++ program fragment:
struct complex {
double re, im;
complex(double r, double i) : re(r), im(i) {}
};
inline complex operator+(const complex& a, const complex& b) {
return complex(a.re+b.re, a.im+b.im);
}
complex addone(const complex& arg) {
return arg + complex(1,0);
}
Used to be compiled to:
_Z6addoneRK7complex:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
*** mov %EDX, %ECX
fld QWORD PTR [%EDX]
fld1
faddp %ST(1)
*** add %ECX, 8
fld QWORD PTR [%ECX]
fldz
faddp %ST(1)
*** mov %ECX, %EAX
fxch %ST(1)
fstp QWORD PTR [%ECX]
*** add %EAX, 8
fstp QWORD PTR [%EAX]
ret
Now it is compiled to:
_Z6addoneRK7complex:
mov %EAX, DWORD PTR [%ESP + 4]
mov %ECX, DWORD PTR [%ESP + 8]
fld QWORD PTR [%ECX]
fld1
faddp %ST(1)
fld QWORD PTR [%ECX + 8]
fldz
faddp %ST(1)
fxch %ST(1)
fstp QWORD PTR [%EAX]
fstp QWORD PTR [%EAX + 8]
ret
Other programs should see similar improvements, across the board. Note that
in addition to reducing instruction count, this also reduces register pressure
a lot, always a good thing on X86. :)
llvm-svn: 11819
2004-02-25 06:13:04 +00:00
4b3514c173
Add a helper to create an addressing mode given all of the pieces.
...
llvm-svn: 11818
2004-02-25 06:01:07 +00:00
d825d30f42
add an inefficient way of folding structure and constant array indexes together
...
into a single LEA instruction. This should improve the code generated for
things like X->A.B.C[12].D.
The bigger benefit is still coming though. Note that this uses an LEA instruction
instead of an add, giving the register allocator more freedom. We should probably
never generate ADDri32's.
llvm-svn: 11817
2004-02-25 03:45:50 +00:00
f85e33cd79
Implement special case for storing an immediate into memory so that we don't need
...
an intermediate register.
llvm-svn: 11816
2004-02-25 02:56:58 +00:00
10a32da382
FunctionLiveVarInfo.h moved: include/llvm/CodeGen -> lib/Target/Sparc/LiveVar
...
llvm-svn: 11804
2004-02-24 19:46:00 +00:00
b471f0188f
Fix some unexpected fallout from the config.h changes. Because the CBE no
...
longer was getting this #include, it always fell back on the less precise
floating point initializer values, causing some testsuite failures.
llvm-svn: 11803
2004-02-24 18:34:10 +00:00
af2de4848e
Refactor rewinding code for finding the first terminator of a basic
...
block into MachineBasicBlock::getFirstTerminator().
This also fixes a bug in the implementation of the above in both
RegAllocLocal and InstrSched, where instructions where added after the
terminator if the basic block's only instruction was a terminator (it
shouldn't matter for RegAllocLocal since this case never occurs in
practice).
llvm-svn: 11748
2004-02-23 18:14:48 +00:00
cb185a34bb
Simplify code a bit, don't go off the end of the block, now that the current
...
block we are in might be empty
llvm-svn: 11744
2004-02-23 07:42:19 +00:00
4ffd4443ce
We were forgetting to add FP_REG_KILL instructions to basic blocks which will
...
eventually get an assignment due to elimination of PHIs.
llvm-svn: 11743
2004-02-23 07:29:45 +00:00
abb9162999
Work around a gas bug. Print '-9223372036854775808' as unsigned.
...
llvm-svn: 11729
2004-02-23 03:27:05 +00:00
7e90628a8a
Implement cast fp -> bool
...
llvm-svn: 11728
2004-02-23 03:21:41 +00:00
6590c29971
Stop passing iterators around by reference now that we have ilists!
...
Implement cast Type::ULongTy -> double
llvm-svn: 11726
2004-02-23 03:10:10 +00:00
378157c3d7
Add a new cmove instruction
...
llvm-svn: 11722
2004-02-23 01:16:05 +00:00
cdd56634b0
Only insert FP_REG_KILL instructions in MachineBasicBlocks that actually
...
use FP instructions. This reduces the number of instructions inserted in
176.gcc (for example) from 58074 to 101 (it doesn't use much FP, which
is typical). This reduction speeds up the entire code generator. In the
case of 176.gcc, llc went from taking 31.38s to 24.78s. The passes that
sped up the most are the register allocator and the 2 live variable analysis
passes, which sped up 2.3, 1.3, and 1.5s respectively. The asmprinter
pass also sped up because it doesn't print the instructions in comments :)
Note that this patch is likely to expose latent bugs in machine code passes,
because now basicblock can be empty, where they were never empty before. I
cleaned out regalloclocal, but who knows about linscan :)
llvm-svn: 11717
2004-02-22 19:47:26 +00:00
8358cc573d
Move MOTy::UseType enum into MachineOperand. This eliminates the
...
switch statements in the constructors and simplifies the
implementation of the getUseType() member function. You will have to
specify defs using MachineOperand::Def instead of MOTy::Def though
(similarly for Use and UseAndDef).
llvm-svn: 11715
2004-02-22 19:23:26 +00:00
fae7564027
Reduce the number of pointless copies inserted due to constant pointer refs.
...
Also, make an assertion actually fireable!
llvm-svn: 11713
2004-02-22 17:35:42 +00:00
fa3ebd6ad5
Fix bug in previous checkout: leave the iterator at the first instruction
...
AFTER the GEP that was emitted. :(
llvm-svn: 11712
2004-02-22 17:05:38 +00:00
6536519f6e
Completely rewrite how getelementptr instructions are expanded. This has two
...
(minor) benefits right now:
1. An extra dummy MOVrr32 is gone. This move would often be coallesced by
both allocators anyway.
2. The code now uses the gep_type_iterator to walk the gep, which should future
proof it a bit. It still assumes that array indexes are Longs though.
These don't really justify rewriting the code. The big benefit will come later
though.
llvm-svn: 11710
2004-02-22 07:04:00 +00:00
de51c65299
When folding memory operands in machine instructions be careful to
...
leave register operands with the same use/def flags as the original
instruction.
llvm-svn: 11709
2004-02-22 06:54:26 +00:00
5fc6ae2baf
Wow this is out of date. When we have _real_ code generator documentation,
...
this should be folded into it.
llvm-svn: 11705
2004-02-22 05:53:54 +00:00
87d72eb23f
The two address pass cannot handle two addr instructions where one incoming
...
value is a physreg and one is a virtreg. For this reason, disable copy folding
entirely for physregs. Also, use the new isMoveInstr target hook which gives us
folding of FP moves as well.
llvm-svn: 11700
2004-02-22 04:44:58 +00:00
73ffc88a8b
It is totally unacceptable to print out (literally) millions of zeros when
...
compiling 129.compress... so don't!
llvm-svn: 11649
2004-02-20 05:49:22 +00:00
6401b22fc2
Fix argument size for MOVSX and MOVZX instructions.
...
llvm-svn: 11576
2004-02-18 16:20:40 +00:00
30e73e3442
Add support for GlobalAddress's for alkis
...
llvm-svn: 11560
2004-02-17 18:23:55 +00:00
47ea17a852
These store to memory too.
...
llvm-svn: 11558
2004-02-17 17:53:48 +00:00
49794be442
These store to memory, not read from it.
...
llvm-svn: 11556
2004-02-17 17:46:50 +00:00
cf7b9392ea
Instructiosn with 1 memory operand have 4 operands in our
...
representation.. duh!
llvm-svn: 11554
2004-02-17 15:58:13 +00:00
f90da5f346
Align case statements.
...
llvm-svn: 11552
2004-02-17 15:50:41 +00:00
546513ccfd
Add TEST and XCHG memory operand support.
...
llvm-svn: 11550
2004-02-17 15:48:42 +00:00
f08064b714
Add OR and XOR memory operand support.
...
llvm-svn: 11549
2004-02-17 15:33:14 +00:00
65a5ee86ba
Peephole optimize SUBmi{16,32} into SUBmi{16,32}b when immediate is 8
...
bits wide.
llvm-svn: 11548
2004-02-17 15:14:29 +00:00
e9583082a6
ADDmi{16,32} should be in the next case statement.
...
llvm-svn: 11547
2004-02-17 15:10:11 +00:00
e5585328d8
Add memory operand folding support for MUL, DIV, IDIV, NEG, NOT,
...
MOVSX, and MOVZX.
llvm-svn: 11546
2004-02-17 09:14:23 +00:00
93398df103
Add memory operand folding for CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32}
...
and DECm{8,16,32} instructions.
llvm-svn: 11545
2004-02-17 08:49:20 +00:00
574c7c9ce9
Add CMP{rm,mr,mi}{8,16,32}, INCm{8,16,32} and DECm{8,16,32} instructions.
...
llvm-svn: 11544
2004-02-17 08:49:00 +00:00
d5ce14ddd1
Add SUB{rm,mr,mi}{8,16,32} instructions.
...
llvm-svn: 11543
2004-02-17 08:17:40 +00:00
7f615d7e9a
Add support for folding memory operands for ADC, SBB and SUB instructions.
...
llvm-svn: 11541
2004-02-17 08:08:51 +00:00
b591e5de31
Add support for ADC{rm.mr}32 and SBB{rm,mr}32.
...
llvm-svn: 11540
2004-02-17 08:06:31 +00:00
7ef6d2fd0e
Add a (hidden) option to print instructions that fail to fuse. It's looking
...
like compares and test's would be the next huge win...
llvm-svn: 11539
2004-02-17 08:03:47 +00:00
6974f4758a
Add support for folding memory operands in MOVri{8,16,32} instructions.
...
llvm-svn: 11538
2004-02-17 07:47:20 +00:00
c07eeaef6b
Expand the repertoire of the forms we can print and encode.
...
llvm-svn: 11537
2004-02-17 07:40:44 +00:00
a9363fda17
Disable this peephole for now. We can't keep track of the fact that the immediate is 8 bits,
...
but the memory reference is full sized.
llvm-svn: 11536
2004-02-17 07:36:32 +00:00
ca8f1c2716
Add an option to disable spill fusing in the X86 backend
...
llvm-svn: 11531
2004-02-17 06:30:34 +00:00
3abcdf3b90
Fix the mneumonics for the mov instructions to have the source and destination
...
order in the correct sense!! Arg!
llvm-svn: 11530
2004-02-17 06:28:19 +00:00
ebd90733b0
Fix the last crimes against nature that used the 'ir' ordering to use the
...
'ri' ordering instead... no it's not possible to store a register into an
immediate!
llvm-svn: 11529
2004-02-17 06:24:02 +00:00
9990476875
GRRR. Move instructions have swapped the order of the r/m operands.
...
llvm-svn: 11528
2004-02-17 06:20:20 +00:00
288e043e1b
Rename MOVi[mr] instructions to MOV[rm]i
...
llvm-svn: 11527
2004-02-17 06:16:44 +00:00
4c241855e6
Whoops, got my cases swapped.
...
llvm-svn: 11526
2004-02-17 06:02:15 +00:00
01dded2e69
Change to match the newer, simpler, interface
...
llvm-svn: 11525
2004-02-17 05:54:57 +00:00
ba30c776a6
Add support for folding memory operands into AND and IMUL's
...
llvm-svn: 11523
2004-02-17 05:46:06 +00:00
8d6eebf0d7
Scrunchify code, by adding helpers. No functionality changes.
...
llvm-svn: 11522
2004-02-17 05:35:13 +00:00
c9586411cf
Add mem forms of AND instructions
...
llvm-svn: 11521
2004-02-17 05:25:50 +00:00
cde4ade314
Add API to check and fold memory operands into instructions.
...
llvm-svn: 11519
2004-02-17 04:33:18 +00:00
818bcec247
Rename the IMULri* instructions to IMULrri, as they are actually three address
...
instructions. Add forms of these instructions that read from memory
llvm-svn: 11518
2004-02-17 04:26:43 +00:00
a5ef4a5da7
Add peephole optimizations for ADD [MEM], IMM8 instructions.
...
llvm-svn: 11511
2004-02-16 23:50:18 +00:00
f6ce2e313a
Add two more variants of add. Update comments.
...
llvm-svn: 11510
2004-02-16 23:48:42 +00:00
544c9781db
Add some ADD instructions that take memory operands for Alkis
...
llvm-svn: 11502
2004-02-16 18:19:31 +00:00
a95bd44282
Now that the lowerinvoke pass inserts calls to llvm.setjmp/llvm.longjmp, some
...
hacks can be banished. Also, this gives us the opportunity to emit special code
for the setjmp/longjmps which alows the elimination of one GCC warning for every
setjmp/longjmp site (which is often THOUSANDS in C++ programs). Yaay!
llvm-svn: 11484
2004-02-15 22:51:47 +00:00
bbf53937a4
Make dense maps keyed on physical registers smallerusing
...
MRegisterInfo::getNumRegs() instead of
MRegisterInfo::FirstVirtualRegister.
Also use MRegisterInfo::is{Physical,Virtual}Register where
appropriate.
llvm-svn: 11477
2004-02-15 21:37:17 +00:00
76b2ff4ded
Adjustments to support the new ConstantAggregateZero class
...
llvm-svn: 11474
2004-02-15 05:55:15 +00:00
7bea8084e0
Add support for the new ConstantAggregateZero class
...
llvm-svn: 11473
2004-02-15 05:54:27 +00:00
a9084948ff
Implement llvm.(frame|return)address(0) correctly. They are used by the LLVM JIT, among other
...
applications
llvm-svn: 11459
2004-02-15 01:04:03 +00:00
636e19d4b1
Fix problem in DEBUG code. I could be pointing past the end and
...
dereferencing it causes an assertion error.
llvm-svn: 11458
2004-02-15 00:46:41 +00:00
43e82e1152
Fix the 'have a framepointer' case, so that the frame pointer always points
...
to the old saved EBP.
llvm-svn: 11455
2004-02-15 00:15:37 +00:00
6a35516dcc
Add back machine code deleter pass until we get a MachineCode pass
...
that will be responsible for the creation of MachineFunctions and will
be required by all MachineFunctionPass passes.
llvm-svn: 11453
2004-02-15 00:03:15 +00:00
2e4acc0a73
Add support for the 'pop' instruction
...
llvm-svn: 11451
2004-02-14 21:06:02 +00:00
f54cd1524d
There is no reason to align the stack pointer if there are no callees of this
...
function!
llvm-svn: 11450
2004-02-14 20:11:07 +00:00
7dceed5ff9
The prologue/epilogue related method calls have no reason to return a value,
...
make them return void.
This allows us to avoid some costly MBB.size() calls
llvm-svn: 11448
2004-02-14 19:49:54 +00:00
9f75a55329
finegrainify namespacification, fix 80col prob
...
llvm-svn: 11445
2004-02-14 06:00:36 +00:00
d6a39eaa70
Urg, right. These need an input value...
...
llvm-svn: 11443
2004-02-14 04:47:23 +00:00
2f49d5bb35
Codegen llvm.memset into rep stos[bwd]. Simplify code for llvm.memcpy
...
llvm-svn: 11442
2004-02-14 04:46:05 +00:00
8bed37595d
add 'rep stos[bwd]' instructions
...
llvm-svn: 11441
2004-02-14 04:45:37 +00:00
f7c1088a36
Add support for the returnaddress and frameaddress intrinsics
...
llvm-svn: 11433
2004-02-14 02:55:36 +00:00
5a92240270
Use newly added next() and prior() utility functions.
...
llvm-svn: 11430
2004-02-14 01:18:34 +00:00
0997f207c2
Use intrinsic lowering like the rest of the backends. Get rid of crufty hacky
...
code that worked around problems in the mangler
llvm-svn: 11426
2004-02-14 00:31:10 +00:00
7b5f374a18
There is no need to emit a shift if the size is constant, which is common
...
llvm-svn: 11420
2004-02-13 23:36:47 +00:00
768fa7d206
Moved directory, update makefile
...
llvm-svn: 11417
2004-02-13 23:31:12 +00:00
1f9c6eb358
CBackend now lives here
...
llvm-svn: 11415
2004-02-13 23:29:20 +00:00
8cdd0215bf
Remove getAllocatedRegNum(). Use getReg() instead.
...
llvm-svn: 11393
2004-02-13 21:01:20 +00:00
cbf0667743
Squish warning
...
llvm-svn: 11375
2004-02-13 16:14:50 +00:00
8dc99feeaf
Add support for the rep movs[bwd] instructions, and emit them when code
...
generating the llvm.memcpy intrinsic.
llvm-svn: 11351
2004-02-12 17:53:22 +00:00
537805f315
Change interface so that we can add to the end of a basic block
...
without getting an assertion from ilist that we are dereferencing
ilist<T>::end().
llvm-svn: 11345
2004-02-12 08:11:04 +00:00
c07b64f3cb
Remove this MachineOpCodeFlags assertion - its test can never be false.
...
llvm-svn: 11342
2004-02-12 04:01:07 +00:00
80da865f77
Change MachineBasicBlock's vector of MachineInstr pointers into an
...
ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.
llvm-svn: 11340
2004-02-12 02:27:10 +00:00
b22186adf0
MachineInstr::getOpCode() --> getOpcode() in SPARC back-end.
...
llvm-svn: 11335
2004-02-11 20:47:34 +00:00
0d10bf8d72
s/getOpCode/getOpcode
...
llvm-svn: 11332
2004-02-11 19:26:28 +00:00
8f4142616d
Increase constness.
...
llvm-svn: 11322
2004-02-11 17:55:09 +00:00
2f21547208
Remove assert as the only integer registers on the sparc are physical.
...
llvm-svn: 11317
2004-02-11 06:04:51 +00:00
fcb99fe370
Fix previous broken commit. A MachineOperand may have opType ==
...
MO_VirtualRegister but if the register number is one of a physical
register is it considered as a physical register.
llvm-svn: 11315
2004-02-11 05:55:00 +00:00
adcc14d96a
Remove assert as it is meaningless. MachineOperands can be tagged as
...
MO_VirtualRegister but actually be representing a physical register.
llvm-svn: 11310
2004-02-11 04:52:30 +00:00
391e943817
Expose the "Other" value type to tablegen targets
...
llvm-svn: 11304
2004-02-11 03:08:45 +00:00
b21ec54e61
Add #include
...
llvm-svn: 11285
2004-02-10 21:18:55 +00:00
1cb6d2697d
Stop using this method
...
llvm-svn: 11282
2004-02-10 21:12:06 +00:00
8d0dc12c3e
Remove uses of MachineOperand::isVirtualRegister
...
llvm-svn: 11281
2004-02-10 20:55:47 +00:00
2d5feb5e04
Remvoe use of MO.isVirtualRegister(), turn an assertion into an assert()
...
llvm-svn: 11280
2004-02-10 20:47:24 +00:00
2aea68ccfd
Remove use of isPhysicalRegister
...
llvm-svn: 11277
2004-02-10 20:35:42 +00:00
92252f42c3
Don't use MachineOperator::is(Phys|Virt)Register
...
llvm-svn: 11276
2004-02-10 20:31:28 +00:00
259e98ed27
Tighten up checks
...
llvm-svn: 11274
2004-02-10 20:25:13 +00:00
ff04d76c57
Fix PR228: [sparc] Boolean constants are emitted as true and false
...
I will observe that the concept of using WriteAsOperand is completely broken,
but then we all knew that, didn't we?
llvm-svn: 11255
2004-02-10 05:16:44 +00:00
7f7a842bd6
Doxygenify comments.
...
llvm-svn: 11252
2004-02-09 23:18:42 +00:00
4dc5478fbc
Fix PR#226: When emitting padding, always emit it as bytes. Bytes can be
...
placed into any alignment situation.
llvm-svn: 11247
2004-02-09 22:15:33 +00:00
ac6db755c3
Adjust to the changed StructType interface. In particular, getElementTypes() is gone.
...
llvm-svn: 11228
2004-02-09 04:37:31 +00:00
56f9b190e1
Add a new (hidden) option that is useful for profiling.
...
llvm-svn: 11218
2004-02-09 01:47:10 +00:00
327426411e
Modify the two address instruction pass to remove the duplicate
...
operand of the instruction and thus simplify the register allocation.
llvm-svn: 11124
2004-02-04 22:17:40 +00:00
94b5c3cb91
Take away the default iostream argument of createMachineFunctionPrinterPass(),
...
at Chris's request.
llvm-svn: 11120
2004-02-04 21:41:01 +00:00
dbf4b42fde
IMULri* instructions do not require their first two registers operands
...
to be the same (IOW they are not two address instructions).
llvm-svn: 11117
2004-02-04 17:21:04 +00:00
d1b1992495
Generate ftst instructions for comparison against zero
...
llvm-svn: 11098
2004-02-03 18:54:04 +00:00
3c8c72c54f
Add the ftst instruction
...
llvm-svn: 11095
2004-02-03 07:27:50 +00:00
8161306139
Add support for one argument OneArgFP instructions
...
llvm-svn: 11094
2004-02-03 07:27:34 +00:00
63b61e8739
No need to declare implicit uses/defs of ST0
...
llvm-svn: 11081
2004-02-02 19:57:45 +00:00
30d26ac561
Generate the fchs instruction to negate a floating point number
...
llvm-svn: 11078
2004-02-02 19:31:38 +00:00
7af8ad6444
Add support for OneArgFPRW instructions, fix a couple of typeos
...
llvm-svn: 11077
2004-02-02 19:23:15 +00:00
ac2ced8554
Include PowerPC.h. Flesh out the stub versions of addPassesToEmitAssembly()
...
and addPassesToJITCompile() slightly.
llvm-svn: 11076
2004-02-02 19:06:36 +00:00
2458bd6507
Add comments describing how you would add prototypes for factory methods for
...
PowerPC-specific passes here.
llvm-svn: 11073
2004-02-02 19:05:28 +00:00
298fdd7eb1
Codegen -0.0 correctly. Do not use fldz! This is another -0.0 == +0.0 problem, arg.
...
llvm-svn: 11070
2004-02-02 18:56:30 +00:00
aeb8a80c71
FpMOV is also a move instruction.
...
llvm-svn: 11055
2004-02-01 08:22:16 +00:00
112902772a
Add some comments sketching out how this is to work eventually.
...
llvm-svn: 11026
2004-01-30 22:25:18 +00:00
201c487ad2
Add a new flag, which is only used for symmetry.
...
llvm-svn: 11025
2004-01-30 22:24:18 +00:00
4710add9dd
Add (currently disabled) support to the instruction selector to only insert
...
FP_REG_KILL instructions at the end of blocks involved with critical edges.
Fix a bug where FP_REG_KILL instructions weren't inserted in fall through
unconditional branches. Perhaps this will fix some linscan problems?
llvm-svn: 11019
2004-01-30 22:13:44 +00:00
f429a0e6dd
Add a new (static inline) std::ostream& << AllocInfo& method. Use it.
...
llvm-svn: 11002
2004-01-28 19:05:43 +00:00
f0cc848602
Add the JITInfo object, accessor & initializer.
...
llvm-svn: 10972
2004-01-23 06:39:30 +00:00
4880432af8
Add CodeEmitter and JITInfo stubs. Dump the old
...
PowerPCTargetMachine::addPassesToJITCompile() method, in favor of the
TargetJITInfo interface.
llvm-svn: 10971
2004-01-23 06:35:43 +00:00
c38abbd571
Build the PowerPC directory, so it is less likely to bit-rot (again)
...
llvm-svn: 10938
2004-01-21 21:16:10 +00:00
b14a3f73cd
Import of skeletal PowerPC backend I have had laying around for months...
...
llvm-svn: 10937
2004-01-21 21:13:19 +00:00
929d1d1ca1
Use the LLVM standard name mangling infrastructure instead of reinventing the
...
wheel.
llvm-svn: 10891
2004-01-15 22:44:19 +00:00
16d4009a1b
Include TargetRegInfo.h and declare SparcTargetMachine forward, to make this
...
header more easily includable.
llvm-svn: 10880
2004-01-15 18:17:07 +00:00
361c004b88
Make this assertion more self-explanatory.
...
llvm-svn: 10879
2004-01-15 18:15:58 +00:00
93cd755c05
Eliminate the isStringCompatible function, using ConstantArray::isString.
...
It's not clear why the code was looking for signed chars < 0, but it can't
matter to the assembler anyway, so the check goes away. This also fixes
compatibility with arrays of [us]byte that have constantexprs in them.
Also slightly restructure some code to be cleaner.
llvm-svn: 10854
2004-01-14 17:15:17 +00:00
ac2b198ec5
Eliminate the isStringCompatible function, using ConstantArray::isString.
...
It's not clear why the code was looking for signed chars < 0, but it can't
matter to the assembler anyway, so the check goes away.
llvm-svn: 10853
2004-01-14 17:14:42 +00:00
66f33ff6c2
Finegrainify namespacification
...
Using the SlotCalculator is total overkill for this file, a simple map
will suffice. Why doesn't this use the NameMangler interface?
llvm-svn: 10823
2004-01-13 21:27:59 +00:00
dbd9c33e5e
Remove dump-input option.
...
Make addPassesToEmitAssembly() look slightly more like addPassesToJITCompile().
llvm-svn: 10818
2004-01-13 19:26:21 +00:00
fe2aafe08a
Eliminate use of ConstantHandling itf
...
llvm-svn: 10782
2004-01-12 18:08:18 +00:00
975c8bde79
Output mov %REG = 0 instead of xor %REG, %REG, %REG to clear a
...
register so that LiveVariable analysis is not confused.
llvm-svn: 10773
2004-01-12 07:22:45 +00:00
4ee36320f4
Move sparc-specific livevar code into lib/Target/Sparc
...
llvm-svn: 10733
2004-01-09 18:15:24 +00:00
bb6fa4b327
Fix more incestuous #includage.
...
llvm-svn: 10732
2004-01-09 16:17:09 +00:00
3d874aebc2
Move InstrSelection into lib/Target/Sparc, as it's sparc specific. This
...
makes the incestuous #include'ing of sparc internal headers much less
disturbing. :)
llvm-svn: 10729
2004-01-09 06:22:34 +00:00
b9c7999881
Move lib/Codegen/RegAlloc into lib/Target/Sparc, as it is sparc specific
...
llvm-svn: 10728
2004-01-09 06:17:12 +00:00
5d236005b0
Clean up a lot of the code I added yesterday by exposing the IntrinsicLowering
...
implementation from the TargetMachine directly.
llvm-svn: 10636
2003-12-28 21:23:38 +00:00
52564b2071
Add TargetInstrInfo::isMoveInstr() to support coalescing in register
...
allocation.
llvm-svn: 10633
2003-12-28 17:35:08 +00:00
10cac58d23
Whoops, don't try to lower non intrinsic calls
...
llvm-svn: 10632
2003-12-28 09:53:23 +00:00
c45a033b42
implement support for the intrinsic lowering functionality
...
llvm-svn: 10629
2003-12-28 09:47:19 +00:00
dfc5631bfd
Eliminate some code that is not needed now that we have the intrinsic lowering pass
...
llvm-svn: 10628
2003-12-28 09:46:33 +00:00
bb661c18c8
finegrainify namespacification
...
add new getIntPtrType() method
llvm-svn: 10579
2003-12-22 05:01:15 +00:00
69aa1ccb07
Really release memory used by functions. Patch by Chris.
...
llvm-svn: 10572
2003-12-22 03:47:58 +00:00
2103574b32
Move FP_REG_KILL closer to the return instruction.
...
llvm-svn: 10567
2003-12-21 16:47:43 +00:00
27437e3318
Move FP_REG_KILL closer to the actual branch instruction.
...
llvm-svn: 10563
2003-12-20 17:28:15 +00:00
68cff6bf4d
Remove floating point killer pass. This is now implemented in the
...
instruction selector by adding a new pseudo-instruction
FP_REG_KILL. This instruction implicitly defines all x86 fp registers
and is a terminator so that passes which add machine code at the end
of basic blocks (like phi elimination) do not add instructions between
it and the branch or return instruction.
llvm-svn: 10562
2003-12-20 16:22:59 +00:00
452597611f
Finally, _actually delete the machine code_ for a function, after it has
...
been emitted. Also, since the FPK pass is causing memory access violations,
disable it.
llvm-svn: 10559
2003-12-20 10:20:19 +00:00
af4304f807
Fix memory leak in the stackifier, due to the machinebasicblocks not holding
...
instructions on an ilist
llvm-svn: 10556
2003-12-20 10:12:17 +00:00
d46cd68695
Finegrainify namespacification
...
Minor cleanups to killer pass
llvm-svn: 10555
2003-12-20 09:58:55 +00:00
9a4898939a
Hoist some sparc specific code into the sparc target
...
llvm-svn: 10554
2003-12-20 09:17:40 +00:00
ddec71c3b6
A minor cleanup for better encapsulation
...
llvm-svn: 10545
2003-12-20 02:03:14 +00:00
833c3c2597
Rip JIT specific stuff out of TargetMachine, as per PR176
...
llvm-svn: 10542
2003-12-20 01:22:19 +00:00
ee158ca708
* Converted C-style comments to C++
...
* Doxygenified comments
* Reordered #includes
llvm-svn: 10503
2003-12-17 22:08:20 +00:00
0f42585924
Reordered #includes.
...
llvm-svn: 10502
2003-12-17 22:06:28 +00:00
426275b96d
Doxygenified some comments, reduced extraneous space.
...
llvm-svn: 10501
2003-12-17 22:06:08 +00:00
b01a80aa94
Reorganized the Sparc backend to be more modular -- each different
...
implementation of a Target{RegInfo, InstrInfo, Machine, etc} now has a separate
header and a separate implementation file.
This means that instead of a massive SparcInternals.h that forces a
recompilation of the whole target whenever a minor detail is changed, you should
only recompile a few files.
Note that SparcInternals.h is still around; its contents should be minimized.
llvm-svn: 10500
2003-12-17 22:04:00 +00:00
aaba4639f8
Change interface of MachineOperand as follows:
...
a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
b) add isUse(), isDef()
c) rename opHiBits32() to isHiBits32(),
opLoBits32() to isLoBits32(),
opHiBits64() to isHiBits64(),
opLoBits64() to isLoBits64().
This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.
llvm-svn: 10461
2003-12-14 13:24:17 +00:00
fbeb3b02c3
Change preserve all claim to just preserve live variables and phielimination.
...
llvm-svn: 10460
2003-12-14 10:14:23 +00:00
904cd6d48c
Add a floating point killer pass. This pass runs before register
...
allocaton on the X86 to add information to the machine code denoting
that our floating point stackifier cannot handle virtual point
register that are alive across basic blocks. This pass adds an
implicit def of all virtual floating point register at the end of each
basic block.
llvm-svn: 10446
2003-12-13 05:36:22 +00:00
c6efb11f02
Modified cast so that it converts the int to a long before casting to
...
a pointer. This evades a warning emitted by GCC when we cast from
unsigned int (32 bit) to void * (64 bit) on SparcV9.
llvm-svn: 10435
2003-12-12 19:57:48 +00:00
2e7416cb04
Implement the TargetMachine::getJITStubForFunction method for X86, finegrainify
...
namespacification.
llvm-svn: 10430
2003-12-12 07:11:18 +00:00
6d760d7cb3
Add an option to enable the SSA based peephole optimizer.
...
Eventually this pass will provide substantially better code in the interim between when we
have a crappy isel and nice isel. Unfortunately doing so requires fixing the backend to
actually SUPPORT all of the fancy addressing modes that we now generate, and writing a DCE
pass for machine code. Each of these is a fairly substantial job, so this will remain disabled
for the immediate future. :(
llvm-svn: 10276
2003-12-01 05:18:30 +00:00
a913723309
Add a new SSA-based peephole optimizer which includes copy propagation and
...
folding of instructions into addressing modes. This creates lots of dead
instructions, which are currently not deleted. It also creates a lot of
instructions that the X86 backend currently cannot handle. :(
llvm-svn: 10275
2003-12-01 05:15:28 +00:00
128937bbe2
generalize the instruction types permitted a bit
...
llvm-svn: 10274
2003-12-01 05:13:56 +00:00
d8218923ae
Finegrainify namespacification
...
llvm-svn: 10270
2003-11-30 06:13:25 +00:00
84c0efc946
Support constant casting constant pointers to ints/uints, and/or
...
the other way around, instead of failing a large, tumor-like assertion.
llvm-svn: 10171
2003-11-22 07:18:25 +00:00
9ba9225b35
Constant shift expressions, meet InstSelectSimple. Yow!!
...
llvm-svn: 10170
2003-11-22 06:49:41 +00:00
e42b8fd298
Stub for constant shift expr support.
...
llvm-svn: 10168
2003-11-22 05:18:35 +00:00
d181666052
* Add code to flush the ICache, which any self-respecting SMC must do
...
* Restore registers *after* everything else to avoid any possible side effects
This fixes McCat-imp.
llvm-svn: 10147
2003-11-21 23:48:54 +00:00
8c09ecf0c9
Fix PR123
...
llvm-svn: 10069
2003-11-18 17:47:05 +00:00
0e2e1f121a
Include the file before we close the llvm namespace.
...
llvm-svn: 9954
2003-11-13 00:23:05 +00:00
6675f982de
Substantially re-organized this file:
...
* There is now only one pass to print out assembly instead of two
* It is a FunctionPass
* The Module-level printing of globals is now in doFinalization() method of the
FunctionPass
* The code has been reformatted to follow LLVM coding standards
* Some comments, not all, were doxygenified
* Last but not least, the function to create an instance of this pass is also no
longer a method in the UltraSparc class.
llvm-svn: 9953
2003-11-13 00:22:19 +00:00
2558e8c852
The function to create an instance of this pass is no longer a method of
...
the UltraSparc class.
llvm-svn: 9952
2003-11-13 00:19:02 +00:00
167026f8c8
The functions to create new instances of passes are no longer methods in the
...
UltraSparc class. Comments are also doxygen-compatible now.
llvm-svn: 9951
2003-11-13 00:17:20 +00:00
b26c6fa4eb
* Put command-line switches in their own namespace
...
* Pass creation functions are no longer in the UltraSparc class
llvm-svn: 9950
2003-11-13 00:16:28 +00:00
893e793739
Force a dependency on the .inc file, which must be generated!
...
llvm-svn: 9949
2003-11-13 00:05:09 +00:00
960707c335
Put all LLVM code into the llvm namespace, as per bug 109.
...
llvm-svn: 9903
2003-11-11 22:41:34 +00:00
75bc7cec4b
Fix PR103
...
llvm-svn: 9830
2003-11-09 07:08:34 +00:00
f8cb2419ee
Fix two typos I found in comments.
...
llvm-svn: 9806
2003-11-08 18:12:24 +00:00
a1eefa40dc
For some reason, LICM and GCSE like to crash the FunctionPassManager when they
...
are being added as FunctionPasses... Sigh.
llvm-svn: 9798
2003-11-08 00:01:39 +00:00
508cc3e7a9
Implement branching to a PC-relative constant (not a BasicBlock).
...
llvm-svn: 9793
2003-11-07 21:07:30 +00:00
3b2343eae9
PreSelection is not optional, it performs a necessary and vital transformation
...
for the Sparc backend: breaking up constant expressions. Thus, we cannot have it
guarded by a conditional, it should never be disabled.
Also, it's now available for the JIT since it is a FunctionPass.
llvm-svn: 9791
2003-11-07 20:33:25 +00:00
2c3068026a
Switch to emitting MachineConstantPool the way it was meant to be done.
...
llvm-svn: 9777
2003-11-07 18:06:26 +00:00
2133b0513d
Switch to using the standard representation of the constant pool -- namely, the
...
MachineConstantPool. This involved refactoring the two classes involved in
printing out Sparc assembly. In fact, they should share all this code anyway.
llvm-svn: 9776
2003-11-07 17:45:28 +00:00
faa42d264f
We accept TargetMachine as a const reference.
...
llvm-svn: 9775
2003-11-07 17:44:18 +00:00
bd4a8ed139
PreSelection and PeepholeOpts are now FunctionPasses.
...
llvm-svn: 9774
2003-11-07 17:43:43 +00:00
81c748c1e2
* Stop making a global for each constant that cannot live in an instruction;
...
it will be converted to a MachineConstantPool index during instruction
selection
* This is now eligible to become a FunctionPass since it does not have any side
effects outside of the function it is processing.
llvm-svn: 9773
2003-11-07 17:31:22 +00:00
bf9ed7ac1f
* Use the MachineConstantPool for storing constants instead of a hash_set;
...
* Do not create new globals for constants!
Also, order #includes as per coding style guide
llvm-svn: 9772
2003-11-07 17:29:48 +00:00
c16149d7dd
Use `basename $<` to get just the filename, not full path, for ease of reading.
...
llvm-svn: 9770
2003-11-07 17:26:27 +00:00
5285e9c9a0
Hopefully this will fix PR98
...
llvm-svn: 9762
2003-11-07 00:38:09 +00:00
395aef6bbe
Hopefully fix the objdir != srcdir issue
...
llvm-svn: 9761
2003-11-07 00:34:33 +00:00
72a4db8b92
Fix warnings building on sparc
...
llvm-svn: 9758
2003-11-06 21:30:05 +00:00
b4ad4c3d4c
* Make the comment header 80 columns long
...
* Alphabetize #includes
llvm-svn: 9751
2003-11-06 18:06:13 +00:00
e5b358c829
We know exactly what the value of $< is, so instead of using `basename $<` to
...
get just the filename and not the full path, just use the filename directly.
llvm-svn: 9730
2003-11-05 06:43:36 +00:00
9118a426d3
Change all machine basic block modifier functions in MRegisterInfo to
...
return the number of instructions added to/removed from the basic block
passed as their first argument.
Note: This is only needed because we use a std::vector instead of an
ilist to keep MachineBasicBlock instructions. Inserting an instruction
to a MachineBasicBlock invalidates all iterators to the basic
block. The return value can be used to update an index to the machine
basic block instruction vector and circumvent the iterator elimination
problem but this is really not needed if we move to a better
representation.
llvm-svn: 9704
2003-11-04 22:57:09 +00:00
47dfa641c3
Fix problems in previous changes. This fixes several regressions last night.
...
llvm-svn: 9694
2003-11-04 16:04:32 +00:00
b71c3f7430
Significantly simplify constant emission by unifying the stuff which used to build up
...
strings with the stuff that used to print to an ostream directly. We now NEVER build
up big strings, only to print them once they are formed.
llvm-svn: 9686
2003-11-03 20:19:49 +00:00
469e404370
Incorporate printSingleConstantValue into its single caller
...
llvm-svn: 9684
2003-11-03 19:44:05 +00:00
72e516f0d1
* Reformat some code
...
* Emit bools as 1/0 instead of true/false, fixing compilation of eon and
PR 83 & Jello/2003-11-03-GlobalBool.llx
llvm-svn: 9683
2003-11-03 19:33:45 +00:00
adc07972bc
Tweak sed commands so that they filter out more # stuff and also
...
work on Mac OS X. Also turn ${...} into $(...); we do not speak BSD
Make.
llvm-svn: 9589
2003-10-29 20:07:35 +00:00
37f4a4c184
Delete unused EmitByteSwap method
...
Implement mul/div/rem constant expressions
llvm-svn: 9424
2003-10-23 17:21:43 +00:00
3f45389172
Make code layout more consistent.
...
llvm-svn: 9418
2003-10-23 16:48:30 +00:00
998cabe4ff
* Order includes according to style guide
...
* Convert tabs to spaces
* Make code fit within 80 columns
llvm-svn: 9416
2003-10-23 16:22:08 +00:00
dbe73c5d6d
Add comments to describe what these functions actually do.
...
llvm-svn: 9370
2003-10-22 05:50:40 +00:00
8c0608cf0d
* Use <cmath> instead of <math.h>
...
* Order #includes according to LLVM coding standards
llvm-svn: 9369
2003-10-22 05:09:56 +00:00
cc0d34223d
Removed completely duplicated function comment (an identical one appears later).
...
llvm-svn: 9368
2003-10-22 04:55:09 +00:00
980d74c752
No, really, order the #includes correctly.
...
llvm-svn: 9367
2003-10-22 04:51:36 +00:00
88be700644
* Fix order of #includes to follow style guide
...
* It's no longer a BasicBlock pass: update comment on run() method
* Fix placement of braces to be consistent
* Delete extraneous whitespace
llvm-svn: 9361
2003-10-22 03:27:45 +00:00
53d8490186
Converted tabs to spaces.
...
llvm-svn: 9360
2003-10-22 03:10:26 +00:00
73d9355fea
Hrm, unbreak stuph :(
...
llvm-svn: 9334
2003-10-21 17:22:23 +00:00
a62228d01a
Fix preselection/lowerswitches bug
...
llvm-svn: 9333
2003-10-21 16:29:23 +00:00
4439aee504
Pull the PHI special case into it's own visit* method
...
llvm-svn: 9332
2003-10-21 16:09:23 +00:00
898a42afde
The lastOp operand is never used
...
llvm-svn: 9331
2003-10-21 16:06:07 +00:00
9583cfafc5
Added LLVM copyright notice.
...
llvm-svn: 9324
2003-10-21 15:29:18 +00:00
29265fe981
Added LLVM copyright header.
...
llvm-svn: 9321
2003-10-21 15:17:13 +00:00
2e2a0ed7e1
Preselection is _not_ a basicblock pass, because it adds global variables to
...
the module. This change converts it from being a basic block pass to being
a simple pass. This allows elimination of the annotation and simplification
of the logic for moving constants into global variables.
llvm-svn: 9320
2003-10-21 14:49:19 +00:00
8264e29e01
When opcodes like ADD were split into reg. and immed. versions (ADDi and ADDr),
...
this code wasn't fixed correctly so it missed copy operations that used ADDi.
llvm-svn: 9318
2003-10-21 12:29:45 +00:00
64e8a13b7b
Why does g++ not even generate a warning when you miss a break statement?
...
llvm-svn: 9317
2003-10-21 12:28:27 +00:00
af2df5b7f9
Implement the new varargs instructions and intrinsics.
...
llvm-svn: 9316
2003-10-21 11:25:09 +00:00
4436c49787
Added LLVM copyright notice to Makefiles.
...
llvm-svn: 9312
2003-10-20 22:26:57 +00:00
e7621515c0
Goodbye, AddRegNumToValues
...
llvm-svn: 9309
2003-10-20 20:44:03 +00:00
482202a601
Added LLVM project notice to the top of every C++ source file.
...
Header files will be on the way.
llvm-svn: 9298
2003-10-20 19:43:21 +00:00
ca1789d3f5
Minor leftover fixups from replaceMachineCodeForFunction () change.
...
llvm-svn: 9295
2003-10-20 17:59:09 +00:00
4bc3958c7b
Make replaceMachineCodeForFunction() return void.
...
llvm-svn: 9289
2003-10-20 15:17:12 +00:00
67a5a865ae
Make replaceMachineCodeForFunction return void.
...
llvm-svn: 9288
2003-10-20 15:15:17 +00:00
f187b7691d
Apparently the dependencies are wrong for this file, so it didn't rebuild it
...
when changing Instruction.def. :(
llvm-svn: 9286
2003-10-20 14:12:52 +00:00
6acb1bedb1
Emit x86 instructions for: A = B op C, where A and B are 16-bit registers,
...
C is a constant which can be sign-extended from 8 bits without value loss,
and op is one of: add, sub, imul, and, or, xor.
This allows the JIT to emit the one byte version of the constant instead of
the two or 4 byte version. Because these instructions are very common, this
can save a LOT of code space. For example, I sampled two benchmarks, 176.gcc
and 254.gap.
BM Old New Reduction
176.gcc 2673621 2548962 4.89%
254.gap 498261 475104 4.87%
Note that while the percentage is not spectacular, this did eliminate
124.6 _KILOBYTES_ of codespace from gcc. Not bad.
Note that this doesn't effect the llc version at all, because the assembler
already does this optimization.
llvm-svn: 9284
2003-10-20 05:53:31 +00:00
369246d855
Further cleanups and simplifications
...
llvm-svn: 9282
2003-10-20 04:48:06 +00:00
358e7c3edb
Eliminate code for pointer size and endianness emulation.
...
llvm-svn: 9281
2003-10-20 04:11:23 +00:00
42856eb1bd
The Grammar Police was here.
...
llvm-svn: 9280
2003-10-20 04:03:10 +00:00
97e1b55723
* Rename X86::IMULr16 -> X86::IMULrr16
...
* Implement R1 = R2 * C where R1 and R2 are 32 or 16 bits. This avoids an
extra copy into a register, reducing register pressure.
llvm-svn: 9278
2003-10-20 03:42:58 +00:00
b94550e537
Change the Opcode enum for PHI nodes from "Instruction::PHINode" to "Instruction::PHI" to be more consistent with the other instructions.
...
llvm-svn: 9269
2003-10-19 21:34:28 +00:00
bf87734fa0
* Multiplications by 2^X are turned into shifts. This factors code out of the
...
getelementptr code path for use by other code paths (like malloc and alloca).
* Optimize comparisons with zero
* Generate neg, not, inc, and dec instructions, when possible.
This gives some code size wins, which might translate into performance. We'll
see tommorow in the nightly tester.
llvm-svn: 9267
2003-10-19 21:09:10 +00:00
55a8ef0cc8
Add some new instructions. Wheee
...
llvm-svn: 9266
2003-10-19 19:25:35 +00:00
406ac8e741
.string adds an implicit zero at the end. This is not what we wanted.
...
This fixes PR#44.
llvm-svn: 9252
2003-10-19 02:51:01 +00:00
ee898b35a1
Fix bug: Jello/2003-10-18-PHINode-ConstantExpr-CondCode-Failure.llx
...
This also fixes miscompilation of 176.gcc.
llvm-svn: 9249
2003-10-19 00:26:11 +00:00
80a308c920
Add support for the new varargs intrinsics
...
llvm-svn: 9224
2003-10-18 05:56:40 +00:00
fb40334c25
Update the sparc backend to at least compile correctly with the new varargs stuff even if it's not all implemented yet.
...
llvm-svn: 9223
2003-10-18 05:55:58 +00:00
c42d7951f2
You can't just blat the address into memory, you have to blat its
...
displacement.
llvm-svn: 9210
2003-10-17 21:47:25 +00:00
1a7668a9fd
Implement replaceMachineCodeForFunction() for x86.
...
llvm-svn: 9204
2003-10-17 18:27:46 +00:00
2e24fcadf5
Refactor jump insertion code from CompilationCallback() into insertJumpAtAddr().
...
Make insertFarJumpAtAddr() return void, because nothing uses its return value.
Remove some commented-out code.
Implement replaceMachineCodeForFunction() for SPARC.
llvm-svn: 9203
2003-10-17 18:27:37 +00:00
240fc39b07
Add prototype for replaceMachineCodeForFunction().
...
llvm-svn: 9202
2003-10-17 18:27:25 +00:00
09d40333a2
Remove extra blank line.
...
llvm-svn: 9196
2003-10-17 18:09:10 +00:00
8faf8d93d5
Eliminate some extraneous code in SlotCalculator::insertVal().
...
Rename SlotCalculator::getValSlot() to SlotCalculator::getSlot(),
SlotCalculator::insertValue() to SlotCalculator::getOrCreateSlot(),
SlotCalculator::insertVal() to SlotCalculator::insertValue(), and
SlotCalculator::doInsertVal() to SlotCalculator::doInsertValue().
llvm-svn: 9190
2003-10-17 02:02:40 +00:00
c05684ad22
Fix typo in comment.
...
llvm-svn: 9187
2003-10-16 23:45:05 +00:00
068ad84038
Add support for 'weak' linkage.
...
llvm-svn: 9171
2003-10-16 18:29:00 +00:00
f95d9b99b3
Decrease usage of use_size()
...
llvm-svn: 9135
2003-10-15 16:48:29 +00:00
fdfe370406
Output a contorted sequence of instructions to make sure that we don't access
...
off the bottom of the stack. This fixes PR#41
llvm-svn: 9114
2003-10-14 19:09:05 +00:00
97c7a8ed1a
Disable the leaf function optimization, which is apparently not legal on
...
X86/linux. :( The problem is that a signal delivered while the function
is executing could clobber the functions stack. This is a partial fix
for PR41.
llvm-svn: 9113
2003-10-14 18:52:41 +00:00
6855f03c56
Remove WordsEmitted statistic; there's already a non-backend-specific
...
jello statistic for this (just divide #-bytes-of-code-emitted by 4).
Rewrite head-of-file comment.
llvm-svn: 9098
2003-10-13 19:51:20 +00:00
44d2c3514a
Regularize header file comments
...
llvm-svn: 9071
2003-10-13 03:32:08 +00:00
2797c131ef
Don't include "Config/stdlib.h".
...
llvm-svn: 9037
2003-10-10 19:12:22 +00:00
b8a4ed6543
Include <cstdio> instead of <stdio.h>.
...
llvm-svn: 9032
2003-10-10 18:46:52 +00:00
8b2bd4ed47
Fix spelling.
...
llvm-svn: 9027
2003-10-10 17:57:28 +00:00
4547ab19b0
Add # of printed instructions statistic to both the SPARC and X86 LLC backends.
...
llvm-svn: 8892
2003-10-06 15:41:21 +00:00
fb25374170
Add support for the Invoke instruction by using the LowerInvoke pass
...
llvm-svn: 8872
2003-10-05 19:16:09 +00:00
37225efa97
Instead of hacking in custom support for Invoke/Unwind, use the LowerInvoke pass
...
llvm-svn: 8871
2003-10-05 19:15:47 +00:00
5facafaabe
Moved enum and command-line option in separate file. Also added function that returns the user selected register allocator to the caller.
...
llvm-svn: 8819
2003-10-02 16:57:49 +00:00
8207a2c079
Change llc command line for register allocators
...
llvm-svn: 8815
2003-10-02 06:13:19 +00:00
3dfcbf1317
Revert previous change. For some reason this went into the main branch
...
llvm-svn: 8805
2003-10-01 19:40:13 +00:00
568e4386e8
Added command line option for linear scan allocator
...
llvm-svn: 8804
2003-10-01 19:38:10 +00:00
cda2885499
The comment seems irrelevant as the pass has become a BasicBlock pass.
...
llvm-svn: 8803
2003-10-01 05:24:50 +00:00
1440902484
Make sure to get the definition of getRegisterAllocator
...
llvm-svn: 8801
2003-09-30 22:24:00 +00:00
8b583a229d
RegisterAllocation.h is going away
...
llvm-svn: 8795
2003-09-30 20:15:04 +00:00
167d87443a
Add statistic for # of emitWord() calls.
...
llvm-svn: 8772
2003-09-30 17:49:41 +00:00
427929adfb
Fixed spelling.
...
llvm-svn: 8687
2003-09-23 17:28:11 +00:00
84b1140e2c
Fix spelling.
...
llvm-svn: 8686
2003-09-23 17:27:28 +00:00
49cf091005
Fix assertion so it doesn't not trip incorrectly.
...
llvm-svn: 8650
2003-09-21 07:55:27 +00:00
7af0df0015
Fix a typo in Sparc.cpp.
...
Update names of some pass creator fns in addPassesToEmitAssembly().
FunctionInfo is gone.
llvm-svn: 8599
2003-09-18 17:37:46 +00:00
310b1d899a
Rename the pass creator fn to mimic the other creator fn names.
...
llvm-svn: 8598
2003-09-18 17:37:35 +00:00
24e706c1ac
Fix (and properly doxygenify) some comments. Incorporate
...
functionality of FunctionInfo pass as doFinalization method.
Rename pass to match names of other passes like it.
Rename the pass creator fn to mimic the other creator fn names.
Include StringExtras for utostr().
Make symbol prologue/epilogue stuff redundant with
EmitBytecodeToAssembly, in preparation for refactoring.
llvm-svn: 8597
2003-09-18 17:37:25 +00:00
b4aa604093
Make the symbol prologue/epilogue stuff redundant with MappingInfo, in
...
preparation for refactoring.
Rename the pass creator fn to mimic the other creator fn names.
llvm-svn: 8596
2003-09-18 17:37:14 +00:00
256fc40375
Fix longjmp case so that, along with the call to abort(), we also
...
generate the appropriate CallArgsDescriptor and tmp. virtual regs.
llvm-svn: 8554
2003-09-16 05:56:22 +00:00
632cccf646
Be a little more specific about what is begin generated. Only print
...
command line if VERBOSE=1
llvm-svn: 8453
2003-09-10 19:52:54 +00:00
59068a0d71
Only emit inter-field-padding if the amount of padding is != 0
...
llvm-svn: 8452
2003-09-10 19:52:24 +00:00
732ae94521
Don't explicitly use $SourceDir to find the tblgen files. This causes make
...
some confusion when trying to generate files (it probably couldn't tell that
./file and $(SourceDir)/file may be the same file).
Now, just let VPATH find everything, and list the primary tblgen file first in
the list of dependencies so that we can just use $< to reference it in the make
rule.
This should hopefully fix the nightly tester.
llvm-svn: 8433
2003-09-10 14:10:44 +00:00
ded9899d2d
Updated to find source files using VPATH. This makes writing build rules
...
much cleaner and easier.
Labeled .td as a suffix for tblgen files in Makefile.rules.
Modified build rules so that source files generated during the build are placed
in the build directory and not the source directory (and not in a Debug
directory). This makes the system cleaner and allows us to have a read-only
source tree.
llvm-svn: 8424
2003-09-09 20:57:03 +00:00
230cffbeb3
* Simplify printConstantValueOnly by moving the tail padding stuff directly
...
into the struct case.
* Extend printConstantValueOnly to print .zero's if the initializer is zero
* Delete dead isConstantFunctionPointerRef function
* Emit the appropriate assembly for the various linkage types!
llvm-svn: 8417
2003-09-09 16:23:36 +00:00
04ecefe232
Eliminate support for the llvm.unwind intrinisic, using the Unwind instruction instead
...
llvm-svn: 8411
2003-09-08 19:44:26 +00:00
9c58cf6d03
Add support for the unwind instruction
...
llvm-svn: 8408
2003-09-08 18:54:55 +00:00
0d1a26ddc2
Checkin of autoconf-style object root.
...
Adjusted Makefile to work with new autoconf-style object root.
Specifically, use the new -I option of tblgen to find include files.
llvm-svn: 8379
2003-09-06 14:50:22 +00:00
c1ac706afb
Added some optimizations:
...
* Generate a single BA instead of 6-instruction JUMP if possible
(this occurs both in the creation and overwriting of the stub code)
* If possible, rewrite the ORIGINAL call to call the generated function
directly, thus bypassing the stub entirely
Also added some statistics on how often calls are overwritten and how often the
CompilationCallback is invoked.
llvm-svn: 8376
2003-09-05 22:59:31 +00:00
d189277f32
OptInfo is no longer required
...
llvm-svn: 8312
2003-09-01 20:41:07 +00:00
b49a8d7e01
No longer provide an optinfo, noone uses it
...
llvm-svn: 8311
2003-09-01 20:40:59 +00:00
825624e954
Inline simple comparison which is sparc specific anyway
...
llvm-svn: 8309
2003-09-01 20:38:03 +00:00
0792315409
Move private interfaces into private .h file
...
llvm-svn: 8306
2003-09-01 20:33:07 +00:00
8a3d3d26a5
Simplify code a bit
...
llvm-svn: 8301
2003-09-01 20:24:06 +00:00
eefb565449
LiveRange.h is now in lib/CodeGen/RegAlloc
...
llvm-svn: 8299
2003-09-01 20:17:13 +00:00
e80612a28e
LiveRangeInfo got moved into the lib/CodeGen/RegAlloc directory
...
llvm-svn: 8297
2003-09-01 20:12:17 +00:00
8c50571f12
IGNode got moved to lib/CodeGen/RegAlloc
...
llvm-svn: 8294
2003-09-01 20:00:08 +00:00
69382173e9
This file just needs LiveRange.h not IGNode.h
...
llvm-svn: 8293
2003-09-01 19:58:02 +00:00
3323829ecc
No longer include IGNode.h in the Sparc global header
...
llvm-svn: 8292
2003-09-01 19:56:48 +00:00
9770b83509
* Use alloca() to force GCC not to eliminate frame pointer
...
* Break apart saving and restoring registers into separate functions
* Instead of saving single and double FP registers, just save the double
registers -- aliasing helps preserve the single FP registers as well.
* Request just as much memory for a stub as we actually use
llvm-svn: 8200
2003-08-29 04:22:54 +00:00
147b66cd2b
Add support for the llvm.unwind intrinsic, which we codegen to just do an abort
...
until we implement unwinding.
Add support for the invoke instruction, which codegens just like a call with
a branch after it.
The end effect of this change is that programs using the invoke instruction,
but never unwinding, will work fine. Programs that unwind will abort until
we get unwind support.
llvm-svn: 8187
2003-08-28 21:23:43 +00:00
4fd144acc8
Targets should configure themselves based on a Module, not some wierd flags
...
llvm-svn: 8132
2003-08-24 19:49:48 +00:00
2a3b4e5bc7
Implement: Jello/test-constantexpr.ll
...
llvm-svn: 8127
2003-08-24 19:19:47 +00:00
e34e200e16
Add support for 'any' pointer size and endianness
...
llvm-svn: 8120
2003-08-24 13:49:22 +00:00
43450cb075
Change all #include'd files to be :: rules instead of : rules
...
llvm-svn: 8019
2003-08-21 20:37:17 +00:00
a592cac43c
Add support for the sig(set|long)jmp intrinsics
...
llvm-svn: 7951
2003-08-18 16:06:09 +00:00
7eb05a170a
Spell `necessary' correctly.
...
llvm-svn: 7944
2003-08-18 14:43:39 +00:00
4b422520ca
Fix ABI issue: Longs really do need to be only 4 byte aligned on X86.
...
This bug caused miscompilation of programs using 'struct stat', but only if
compiled with support for 64-bit filesystems. This could in theory effect
other things, but only if the LLVM code shared data structures with native code.
llvm-svn: 7928
2003-08-17 23:20:40 +00:00
f365176472
Rename -emitmaps to -enable-maps
...
llvm-svn: 7913
2003-08-16 00:23:16 +00:00
0238ea5d69
Now that the JIT memory manager allocates as many bytes as necessary rather than
...
rounding up to a page, we need to request (num instrs * 4) bytes. However, I
think that 64 bytes is overkill for the stub function.
llvm-svn: 7888
2003-08-15 18:03:06 +00:00
7d98bf2921
Fix register and parameter numbers in saving double FP registers.
...
llvm-svn: 7884
2003-08-15 16:15:28 +00:00
3830ba4cd8
Adjust to new API, add expandCall stub
...
llvm-svn: 7873
2003-08-15 04:51:59 +00:00
7235d86507
Add support for unconditional branches and for emitting JE instructions
...
llvm-svn: 7872
2003-08-15 04:50:49 +00:00
572c69ea1e
Add a bunch of new node types, including a new Void dummy register class
...
llvm-svn: 7870
2003-08-15 04:35:14 +00:00
a12864b1bd
* Must save FP registers when calling CompilationCallback(), because FP
...
registers are global, are NOT windowed, and hence can be clobbered!
* Removed unused register shorthand notations
* Fixed and cleaned up comments in inline assembly
llvm-svn: 7853
2003-08-15 00:26:50 +00:00
4aab2b25b3
Since we now have TableGen editing modes for VIM and (X)Emacs, we no longer need
...
to mark TableGen description files with "C++ mode".
llvm-svn: 7841
2003-08-14 15:16:28 +00:00
bf0c0100f6
Restore 'nice name' to pass
...
llvm-svn: 7840
2003-08-14 14:43:24 +00:00
8c14ba96ca
Factory methods for function passes now return type FunctionPass *.
...
llvm-svn: 7839
2003-08-14 06:09:32 +00:00
74db4c7e27
Unbreak SPARC backend: addPassesToJITCompile and
...
addPassesToEmitMachineCode now both take a FunctionPassManager.
llvm-svn: 7837
2003-08-14 06:04:59 +00:00
cbd3a40626
Factory methods for function passes now return type FunctionPass *.
...
Get rid of RegisterLLC, which can't handle FunctionPasses anyway.
llvm-svn: 7836
2003-08-14 06:04:49 +00:00
ec8519d6b6
Unbreak SPARC backend: addPassesToJITCompile and
...
addPassesToEmitMachineCode now both take a FunctionPassManager.
Factory methods for function passes now return type FunctionPass *.
llvm-svn: 7835
2003-08-14 06:04:29 +00:00
ed474bb329
X86 static backend: smacked
...
Function at a time: smacked
Who you gonna call!!! :-)
llvm-svn: 7826
2003-08-13 19:02:09 +00:00
89207943a1
Factory methods for FunctionPasses now return type FunctionPass *.
...
llvm-svn: 7823
2003-08-13 18:18:15 +00:00
845b5af4d4
addPassesToJITCompile and addPassesToEmitMachineCode now take a
...
FunctionPassManager, to support function-at-a-time compilation and
emission of code.
llvm-svn: 7821
2003-08-13 18:17:27 +00:00
02cbe2824c
addPassesToJITCompile now takes a FunctionPassManager, to support
...
function-at-a-time compilation and emission of code.
Separate addPassesToEmitAssembly from addPassesToJITCompile, because
the latter requires you to use FunctionPasses, and the former might
diverge anyway.
llvm-svn: 7817
2003-08-13 18:15:52 +00:00
1a6f2b83ab
Factory methods for FunctionPasses now return type FunctionPass *.
...
Correct one of the functions' comments.
llvm-svn: 7816
2003-08-13 18:15:29 +00:00
1600c4a70c
Factory methods for FunctionPasses now return type FunctionPass *.
...
Revert (to v1.55) one of the hunks of Chris's change that messed up the
%-register workaround.
llvm-svn: 7815
2003-08-13 18:15:15 +00:00
ec611ae0d0
Adjust files for move of mapping info stuff into the Sparc directory
...
llvm-svn: 7802
2003-08-13 02:38:16 +00:00
dd306efa11
Just incorporating some notes I wrote for myself into a place where they won't
...
get lost...
llvm-svn: 7798
2003-08-13 00:30:48 +00:00
d6f22ad8d3
Disable emitting LLVM-to-MI maps, by default.
...
Add -emitmaps options to turn this back on.
llvm-svn: 7774
2003-08-12 15:51:02 +00:00
58dc2187ac
Rename DNVT_bool to DNVT_i1 to be consistent with type system
...
llvm-svn: 7768
2003-08-12 04:28:21 +00:00
a8ae6c570f
Add support for basicblocks, setCC instructions, and branches
...
llvm-svn: 7767
2003-08-12 04:17:29 +00:00
029ed09323
Fix va_arg to generate LDDFi for floating point values, instead of LDXi.
...
All non-FP cases use LDXi as before.
llvm-svn: 7765
2003-08-12 03:04:05 +00:00
7606fa0d41
Add basic support for 16 and 32 bit function arguments!
...
llvm-svn: 7755
2003-08-11 21:30:00 +00:00
6088a0b4cb
add frameidx support
...
Make load work
Make type inference infer from Arg1 to arg0 as well as from arg0 to arg1
llvm-svn: 7754
2003-08-11 21:29:40 +00:00
1a2e6f7917
Sort #includes, eliminate #include of "llvm/Type.h" which was redundant
...
llvm-svn: 7746
2003-08-11 20:06:16 +00:00
262c832aea
Cygwin apparently works with %'s on registers!
...
llvm-svn: 7745
2003-08-11 20:04:57 +00:00
1ae8eb0021
Whoops, accidental checkin. :(
...
llvm-svn: 7743
2003-08-11 19:35:46 +00:00
9a59f58d90
Add a new -enable-cygwin-compatible-output argument, which make the output more
...
consumably by the cygwin assembler. This is really just a nasty hack until we
get real target triple support.
llvm-svn: 7742
2003-08-11 19:35:26 +00:00
12b32533cc
Print % signs before register names; turn off "noprefix" mode in gas output.
...
Fixes test case test/Programs/LLVMSource/2003-08-03-ReservedWordGlobal.ll.
Also: Refactor implicit-uses printing into its own method.
Remove a couple of unused variables.
llvm-svn: 7737
2003-08-11 19:05:46 +00:00
2df6ea2f38
Register argument to va_start must be marked as defined!
...
llvm-svn: 7734
2003-08-11 18:42:47 +00:00
2923637f63
Add (ret int) expander so that we can at least write testcases
...
llvm-svn: 7730
2003-08-11 15:48:00 +00:00
1117639691
Converted tabs to spaces.
...
llvm-svn: 7728
2003-08-11 15:38:50 +00:00
1024b0ef59
Removed `-debug' so that spurious printouts of patterns are not seen at
...
compilation time.
llvm-svn: 7727
2003-08-11 15:30:20 +00:00
5acb68de53
Remove dead code
...
llvm-svn: 7726
2003-08-11 15:24:02 +00:00
7fed97d00a
Add patterns for multiply, and, or, and xor
...
llvm-svn: 7725
2003-08-11 15:23:25 +00:00
c914a4847b
add support for more nodes
...
llvm-svn: 7724
2003-08-11 15:23:05 +00:00
e5b80dfdf1
Until the pattern matching instruction selector is finished, enable debug output from it
...
llvm-svn: 7722
2003-08-11 15:11:01 +00:00
e61db425e8
Add support for a pattern matching instruction selector. This is still in
...
the early implementation phases, so it is disabled by default
llvm-svn: 7719
2003-08-11 14:59:22 +00:00
3e2e0fb7ee
Make imm be a leaf instead of a nonterminal
...
llvm-svn: 7708
2003-08-10 19:51:16 +00:00
1fe74d144b
Implement LLVM intrinsics `llvm.setjmp' and `llvm.longjmp' as follows:
...
* setjmp() simply returns 0
* longjmp() simply calls abort()
llvm-svn: 7676
2003-08-07 15:43:46 +00:00
6e4a358f72
Fix sanity-checking in 'maskUnsigned' code to be more precise:
...
use or def-and-use operands can be substituted after one def-only
operand has been substituted.
llvm-svn: 7674
2003-08-07 15:01:26 +00:00
eaa5b964bb
Update tablegen interfaces
...
llvm-svn: 7672
2003-08-07 13:52:22 +00:00
8706805dae
This register is never used, disable it.
...
llvm-svn: 7661
2003-08-07 04:49:16 +00:00
b611692487
Changing command-line option formats to be more consistent with LLVM style.
...
llvm-svn: 7658
2003-08-06 23:25:25 +00:00
8f18938d1c
* Renamed option from `nopreselect' to `nopreopt' since it disables more than
...
just PreSelection
* Wrapped code at 80 columns
* Added the DecomposeMultiDimRefs Pass to the JIT compilation path
llvm-svn: 7657
2003-08-06 23:06:21 +00:00
79226d066e
Use the registers g1 and g5 as temporaries for making far jumps and far calls,
...
because saving i1 and i2 to their ``designated'' stack slots corrupts unknown
memory in other functions, standard libraries, and worse.
In addition, this has the benefit of improving JIT performance because we
eliminate writing out 4 instructions in CompilationCallback() and 2 loads and 2
stores.
llvm-svn: 7653
2003-08-06 22:19:18 +00:00
792b48f4d1
1. Bug fix: was using SLL instead of SLLX for ULongTy. Chump.
...
2. Handle fp-to-uint conversions directly here instead of relying on
a pre-transformation to replace them with the 2-step conversion.
3. Use size rather than explicitly checking types when deciding what
opcodes to use, wherever possible. This is less error prone (the
bug fix above was not the first time!).
4. Float-to-pointer casts shd now work though this hasn't been tested.
llvm-svn: 7645
2003-08-06 18:48:40 +00:00
26125cbeb5
Remove conversion of fp-to-uint cast into a multi-step cast:
...
this is not an optional transformation on SPARC and is now handled
directly by instruction selection.
llvm-svn: 7644
2003-08-06 18:42:49 +00:00
4510698acb
SparcV9CodeEmitter.cpp:
...
* Doxygen-ified comments
* Added capability to make far calls (i.e., beyond 30 bits in CALL instr)
which implies that we need to delete function references that were added by
the call to addFunctionReference() because the actual call instruction is 10
instructions away (thanks to 64-bit address construction)
* Cleaned up code that generates far jumps by using an array+loop
SparcV9CodeEmitter.h:
* Explained more of the side-effects of emitFarCall()
llvm-svn: 7639
2003-08-06 16:20:22 +00:00
fb2054c40b
Completely eliminate the isVoid TSFlag, shifting over all other fields
...
llvm-svn: 7636
2003-08-06 15:32:20 +00:00
19d25b3c41
add a pattern for RET, immediates no longer need to be explicitly typed
...
llvm-svn: 7635
2003-08-06 15:31:35 +00:00
0c4dd1ea09
Start adding usefulness to the DAG node definitions, add a new Expander
...
class
llvm-svn: 7634
2003-08-06 15:31:02 +00:00
21343336d6
This method has now been changed to preserve flags for us!
...
llvm-svn: 7603
2003-08-05 16:59:24 +00:00
1d6ba3e359
Factor shared code
...
llvm-svn: 7600
2003-08-05 16:34:44 +00:00
1e88cfb42e
* Removed `using' declaration, now use full namespace qualifier std::string
...
* Simplified code by using an inline function instead of copy-pasted code
llvm-svn: 7597
2003-08-05 16:01:50 +00:00
5c68269dfd
* Set annul bit to be 0, because the Sparc backend currently does not use it.
...
* Use the name of the predict field instead of just the const 1 in the
Instruction.
llvm-svn: 7592
2003-08-05 14:34:38 +00:00
7c257321c7
This is the real fix for the previous register allocator problem.
...
Physical registers should not float around.
llvm-svn: 7587
2003-08-05 00:48:47 +00:00
f7586ceeb2
Reformatted code to match the prevalent LLVM style; fit code into 80 columns.
...
llvm-svn: 7586
2003-08-05 00:02:06 +00:00
8f7304a32d
ElectricFence found this bug where we were reading past the vector boundary.
...
llvm-svn: 7585
2003-08-04 23:48:40 +00:00
148747e162
Add patterns for (mov R, R) (mov R, I) and subtracts. The moves are to enable
...
testing, the subtracts are because I was in the neighborhood.
llvm-svn: 7581
2003-08-04 21:18:19 +00:00
44cdcf013f
Change comments into something that TableGen can read!
...
llvm-svn: 7580
2003-08-04 21:08:29 +00:00
0d74debd07
Allow instructions to have a DAG pattern associated with them.
...
Define a few preliminary node types.
llvm-svn: 7579
2003-08-04 21:07:37 +00:00
6aa90493a3
Rename register classes to be upper case to make it obvious that they are X86
...
specific in the tree patterns
llvm-svn: 7578
2003-08-04 20:58:29 +00:00
22c550e442
There is nothing special about noops anymore
...
llvm-svn: 7568
2003-08-04 05:11:37 +00:00
78fac3b8b6
There is nothing special about noops now
...
llvm-svn: 7567
2003-08-04 05:11:19 +00:00
9fb7e0a425
Transition to using 'let X = y' instead of 'set X = y'.
...
llvm-svn: 7565
2003-08-04 05:03:18 +00:00
2551080937
transition to using let instead of set
...
llvm-svn: 7564
2003-08-04 04:59:56 +00:00
cb7489c102
Transition to using let instead of set
...
llvm-svn: 7563
2003-08-04 04:58:12 +00:00
796684b8c7
Fix Bug: test/Regression/Jello/2003-08-03-CallArgLiveRanges.llx
...
llvm-svn: 7558
2003-08-04 02:12:48 +00:00
fdd6784e1d
Simplify some constant expressions
...
llvm-svn: 7556
2003-08-04 01:04:59 +00:00
876353b107
Remove illegal, unsupported escapes. This fixes program: Ptrdist-bc
...
llvm-svn: 7552
2003-08-03 23:42:17 +00:00
5dcb654662
* Sort #includes, remove dupliates
...
* Use .zero to emit padding between struct elements
* Emit .comm symbols when we can, this dramatically reduces the amount of gunk we have to print
* Print global variable identifiers next to initializer more nicely.
llvm-svn: 7551
2003-08-03 23:37:09 +00:00
0b2c347eac
Specify custom name for registers to get the ()'s in the name.
...
llvm-svn: 7547
2003-08-03 22:12:47 +00:00
9c66ed8503
Allow specifying custom names for registers
...
llvm-svn: 7546
2003-08-03 22:12:37 +00:00
bb8bdc04a7
Start using tablegen'd instruction enum list
...
llvm-svn: 7542
2003-08-03 21:57:05 +00:00
637eebbfc1
Resort tables
...
llvm-svn: 7541
2003-08-03 21:56:36 +00:00
df14300577
Lump the base opcode in with the X86 TargetSpecific flags
...
llvm-svn: 7540
2003-08-03 21:56:22 +00:00
05e2f385a7
* Start using tablegen'd instruction descriptions
...
* Fix bug in the createNOP method, which was not marking the operands of the
generated XCHG as useanddef. I don't think this method is actually used,
so it wasn't breaking anything, but it should be fixed anyway...
llvm-svn: 7539
2003-08-03 21:55:55 +00:00
553f6c1e1d
Start using tablegenerated instruction descriptions
...
llvm-svn: 7538
2003-08-03 21:54:59 +00:00
59a4a91703
Add new TableGen instruction definitions
...
llvm-svn: 7537
2003-08-03 21:54:21 +00:00
1d4d4f0d8b
Remove the old .def file, it is now obsolete
...
llvm-svn: 7536
2003-08-03 21:54:06 +00:00
6c8a40895b
Rearrange fields yet again: Don't instantiate these lists ONCE PER INSTRUCTION.
...
llvm-svn: 7535
2003-08-03 21:52:28 +00:00
3663901941
Set debug types
...
llvm-svn: 7532
2003-08-03 21:14:38 +00:00
a8c3cff30f
Add Target class for X86 target
...
llvm-svn: 7523
2003-08-03 18:19:37 +00:00
aad0d9c6ef
The RegisterInfo class is obsolete
...
llvm-svn: 7522
2003-08-03 18:18:48 +00:00
6a7439fb42
Remove the RegisterInfo class in favor of a general Target class. Add instrinfo stuff
...
llvm-svn: 7521
2003-08-03 18:18:31 +00:00
e1453c3afc
Tell CVS to ignore all .inc files
...
llvm-svn: 7513
2003-08-03 15:50:17 +00:00
8b31688bb1
Switch over to tablegen generated header files
...
llvm-svn: 7512
2003-08-03 15:48:55 +00:00
a4741a94ff
Switch over to TableGen generated register file description
...
llvm-svn: 7511
2003-08-03 15:48:14 +00:00
5da8e80c46
Initial checkin of X86.td file
...
llvm-svn: 7510
2003-08-03 15:47:49 +00:00
731953bc5c
Initial checkin of X86 Register File description
...
llvm-svn: 7509
2003-08-03 15:47:25 +00:00
b6bcc0689c
Fix typeos in comments
...
llvm-svn: 7505
2003-08-03 13:50:14 +00:00
58cbc61516
Make it easier to debug by exposing a temporary
...
llvm-svn: 7504
2003-08-03 13:49:25 +00:00
d20486a0d9
Rename fields
...
llvm-svn: 7498
2003-08-01 22:21:49 +00:00
1007f033d4
Move DEBUG to Debug.h
...
llvm-svn: 7497
2003-08-01 22:21:34 +00:00
fea54c2511
DEBUG got moved to Debug.h
...
llvm-svn: 7495
2003-08-01 22:19:03 +00:00
c0eb77c24c
Remove makefile complexity by always running tablegen with its final output
...
directory.
llvm-svn: 7485
2003-08-01 20:34:56 +00:00
89f9397668
Add all arithmetic operators to ConstantExprToString().
...
Note that some generated operators (like &, | or ^) may
not be supported by the assembler -- but if they've got
this far, it's better to generate them and let the assembler decide.
llvm-svn: 7476
2003-08-01 15:55:53 +00:00
16c2b62d13
*Both* operands of divide need sign-extension before divide (if smaller
...
than machine register size), not just the second operand.
llvm-svn: 7475
2003-08-01 15:54:38 +00:00
36fcc5d8b3
Put back the separate pass to decompose multi-dimensional references
...
since it is *necessary* for correct code generation. Only optional
transformations belong in the PreOpts pass (which needs to be renamed
from PreSelection to PreOpts).
llvm-svn: 7474
2003-08-01 15:53:24 +00:00
75c817a482
encode size information into each ValueType
...
Add new RegisterInfo class
llvm-svn: 7469
2003-08-01 05:18:03 +00:00
238dadc37c
This method is long dead
...
llvm-svn: 7460
2003-08-01 03:48:42 +00:00
a0e679e299
Remove more obsolete comments
...
llvm-svn: 7455
2003-07-31 17:56:05 +00:00
d02051b512
Changed pointer to the JIT code to its current location, under LLI.
...
llvm-svn: 7454
2003-07-31 17:50:35 +00:00
a2d9f40693
I think local symbols in X86 GAS have to start with .L, not just
...
.; so I have changed the basic block markers to start with .L. I also
broke up a >80char line.
llvm-svn: 7452
2003-07-31 17:38:52 +00:00
2b3ac6be6a
Add comments
...
Make the register classes optionally take code fragments for allocation_order_*
llvm-svn: 7441
2003-07-30 22:16:41 +00:00
a979d4dd27
We no longer need to preprocess SparcV9.td before sending it through tablegen
...
llvm-svn: 7437
2003-07-30 21:00:37 +00:00
4f6b98900c
When emitting a constant, check for ConstantExpr before
...
ordinary (primitive) types since ConstantExprs may be of primitive type!
llvm-svn: 7418
2003-07-30 12:54:47 +00:00
33a3edad1b
Conform to the new interface for describing target registers... even though
...
it's currently not used.
llvm-svn: 7416
2003-07-30 05:51:34 +00:00
e45b699cf6
Add all of the necessary classes to describe the contents of the MRegister.h implementation
...
for a target.
llvm-svn: 7415
2003-07-30 05:50:12 +00:00
3f368e3432
Only regenerate the .inc file if IT has changed, not just if the .td files
...
have changed.
llvm-svn: 7414
2003-07-30 05:49:17 +00:00
ea6aac412d
Use target specific interface instead of forcing it to be target-generic
...
llvm-svn: 7413
2003-07-30 05:33:48 +00:00
8418e36143
No this file is not actually Sparc.td :)
...
llvm-svn: 7405
2003-07-29 23:07:13 +00:00
4f94bedfa6
Do not use 'cpp' directly
...
llvm-svn: 7404
2003-07-29 23:04:41 +00:00
6a561beb35
Add namespace specifier, add flags used by the X86 BE
...
llvm-svn: 7403
2003-07-29 23:02:49 +00:00
0f918540b6
* Cleaned up and corrected comments wrt instruction formats
...
* Enabled STXFSR instructions
llvm-svn: 7400
2003-07-29 21:21:20 +00:00
fb8f64a590
Make emitFarCall() public, and add a few comments to functions.
...
llvm-svn: 7399
2003-07-29 20:52:56 +00:00
e895c2e241
Unify all constant evaluations that depend on register size
...
in ConvertConstantToIntType.
llvm-svn: 7395
2003-07-29 19:59:23 +00:00
2b630b4ec2
Rename 'dump-asm' to 'dump-input' and really print it just before code-gen.
...
llvm-svn: 7394
2003-07-29 19:58:00 +00:00
dbc0eb6a2d
Bug fix: don't unnecessarily pretty-print control-characters, some of
...
which were wrong (particularly, '\a' for '\007').
llvm-svn: 7393
2003-07-29 19:57:34 +00:00
648ce40adf
Add ConvertConstantToIntType() to unify all constant handling
...
that depends on machine register size.
Moved insertCallerSavingCode() to PhyRegAlloc and
moved isRegVolatile and modifiedByCall to TargetRegInfo: they are all
machine independent. Remove several dead functions.
llvm-svn: 7392
2003-07-29 19:54:41 +00:00
2353584afc
Add code to support stack spill/temp offsets that don't fit in the
...
immed. field. Moved insertCallerSavingCode() to PhyRegAlloc: it is
now machine independent. Remove all uses of PhyRegAlloc.
llvm-svn: 7391
2003-07-29 19:53:21 +00:00
0db560d8f6
* Correctly emit a far call if the target address does not fit into 30 bits
...
instead of assert()ing
* Fixed a nasty bug where '07' was used instead of register 'o7'
llvm-svn: 7382
2003-07-29 19:00:58 +00:00
bbc8db5266
Move "register flags" definition the type of registers to be fully fledged
...
value types
llvm-svn: 7377
2003-07-29 05:14:16 +00:00
ae92d0bba6
Specify the value type for the register, not just the size.
...
llvm-svn: 7357
2003-07-28 04:25:36 +00:00
845ed843f1
Instead of specifying the SIZE of the register, go so far as to specify
...
what value type it is.
llvm-svn: 7356
2003-07-28 04:24:59 +00:00
a2e2f5cc45
Rename function to be more consistent with filename
...
llvm-svn: 7352
2003-07-26 23:49:58 +00:00
e1b4e68396
We don't modify the LLVM rep, remain const correct
...
llvm-svn: 7345
2003-07-26 23:06:00 +00:00
ba21b33499
If the pass changes _anything_ it must return true
...
llvm-svn: 7344
2003-07-26 23:05:37 +00:00
99dbdf7391
This code doesn't modify the LLVM structure, keep stuff const
...
llvm-svn: 7343
2003-07-26 23:04:00 +00:00
536b19220c
(1) Major fix to the way unused regs. are marked and found for the FP
...
Single and FP double reg types (which share the same reg class).
Now all methods marking/finding unused regs consider the regType
within the reg class, and SparcFloatRegClass specializes this code.
(2) Remove machine-specific regalloc. methods that are no longer needed.
In particular, arguments and return value from a call do not need
machine-specific code for allocation.
(3) Rename TargetRegInfo::getRegType variants to avoid unintentional
overloading when an include file is omitted.
llvm-svn: 7334
2003-07-25 21:12:15 +00:00
9b17ad16c4
1. Fix a case that was marking the invalid reg. num. (-1) as used,
...
causing a nasty array bound error later.
2. Fix silly typo causing logical shift of unsigned long to use
SRL instead of SRLX.
llvm-svn: 7330
2003-07-25 21:08:58 +00:00
46f8b71376
Use unified CWriter-X86/Printer name mangler. Do not bother using
...
SlotCalculator in CWriter. (Unfortunately, all this means a lot of
X86/Printer's methods have to be de-constified again. Oh well.)
llvm-svn: 7299
2003-07-24 20:20:44 +00:00
0054c3b5b3
It doesn't appear that we need to #include these.
...
llvm-svn: 7291
2003-07-24 17:48:53 +00:00
391f69b0ff
Constify most methods. We could have constified doInitialization and
...
doFinalization too except that would have made them shadow, not override,
the parent class :-P.
Allow *any* constant cast expression between pointers and longs,
or vice-versa, or any widening (not just same-size) conversion that
isLosslesslyConvertibleTo approves. This fixes oopack.
llvm-svn: 7288
2003-07-24 17:30:45 +00:00
a92dce471b
Printer.cpp: Ditch addRequired/getAnalysis, because they leave
...
Printer::doFinalization() out in the cold. Now we pass in a TargetMachine
to Printer's constructor and get the TargetData from the TargetMachine.
Don't pass TargetMachine or MRegisterInfo objects around in the Printer.
Constify TargetData references.
X86.h: Update comment and prototype of createX86CodePrinterPass().
X86TargetMachine.cpp: Update callers of createX86CodePrinterPass().
llvm-svn: 7275
2003-07-23 20:25:08 +00:00
c3998cb090
Add, rewrite, and/or reformat many comments.
...
Stop passing ostreams around: we already have one perfectly good ostream
and we can all share it.
Stop stashing a pointer to TargetData in the Pass object, because that will
lead to a crash if there are no functions in the module (ouch!) Instead,
use addRequired() and getAnalysis(), like we always should have done.
Move the check for ConstantExpr up before the check for isPrimitiveType,
because we need to be able to catch e.g. ubyte (cast bool false to ubyte),
whose type is primitive but which is nevertheless a ConstantExpr, by calling
our specialized handler instead of the AsmWriter. This would result in
assembler errors when we would try to output something like ".byte (cast
bool false to ubyte)".
GC some unused variable declarations.
llvm-svn: 7265
2003-07-23 18:37:06 +00:00
f26a8ee580
Remove redundant const qualifiers from cast<> expressions
...
llvm-svn: 7253
2003-07-23 15:30:06 +00:00
6077c3195f
Simplify code by using ConstantInt::getRawValue instead of checking to see
...
whether the constant is signed or unsigned, then casting
llvm-svn: 7252
2003-07-23 15:22:26 +00:00
c783297812
Simplify code a bit
...
llvm-svn: 7217
2003-07-21 19:56:49 +00:00
bd2d0577fb
Added special consideration for instrumentation strategy
...
llvm-svn: 7208
2003-07-20 15:39:30 +00:00
26bb3c1df6
Please, save your applause^H^H^H^H^H^H^H^Hflames for the end...
...
Avoid a fall-through in the (stubby) treatment of the longjmp intrinsic
call which causes llc & lli to core-dump.
Add a sort-of treatment of cast double to ulong. I am not really sure
what a user should expect to see upon casting a negative FP value to
unsigned long long. But with what is given here, I was able to write
a program that could cast -123.456 to ulong and back and get -123.0,
which seems like a step in the right direction. GCC seems to give you
0. I don't know if I'd consider that useful.
These cases were coming up in GNU coreutils-5.0.
llvm-svn: 7205
2003-07-18 20:23:43 +00:00
ac7c5a5241
Use getClassB for load and store; we don't want to abort when we
...
try to load or store through a bool*.
llvm-svn: 7195
2003-07-17 21:30:06 +00:00
e32251b56d
Fixed the number translation scheme for the integer condition code registers: it
...
now works in instructions which require a 2-bit or 3-bit INTcc code.
Incidentally, that means that the representation of INTcc registers is now the
same in both integer and FP instructions. Thus, code became much simpler and
cleaner.
llvm-svn: 7185
2003-07-16 20:30:40 +00:00
bc0ecb29c8
The name should really be `simm11' to follow the naming convention, but this has
...
no change in functionality.
llvm-svn: 7184
2003-07-16 20:27:44 +00:00
d49975cf29
No need for a second immediate field if the class already inherits one.
...
llvm-svn: 7182
2003-07-15 21:27:14 +00:00
4cf012d845
Encode predict = 1 by default, because the Sparc assembler does this.
...
llvm-svn: 7181
2003-07-15 21:26:49 +00:00
384cb5dd10
Correctly handle calls to functions which are further away than 2**32 bits will
...
allow, i.e. make a sequence of instructions to enable an indirect call using
jump-and-link and 2 temporary registers (which we save and ultimately restore).
Warning: if the delay slot of a function call is used to do meaningful work and
not just a NOP, this behavior is incorrect. However, the Sparc backend does not
yet utilize the delay slots effectively, so it is not necessary to make an
overly complicated algorithm for something that's not used.
llvm-svn: 7178
2003-07-15 19:09:43 +00:00
b402819ddf
* Added support for the %ccr register
...
* FP double registers are now coded correctly
* Removed function which converted registers based on register types, it was
broken (because regTypes are broken)
llvm-svn: 7175
2003-07-14 23:26:03 +00:00
7fdaab4f68
The word `separate' only has one `e'.
...
llvm-svn: 7173
2003-07-14 17:20:40 +00:00
b99d684839
If we have a constant pointer reference to a function, we were printing
...
out the entire llvm disassembly for the function at global constant-output
time, which caused the assembler to barf in 164.gzip. This fixes that
particular problem (though 164.gzip has other problems with X86 llc.)
llvm-svn: 7168
2003-07-11 21:57:01 +00:00
5b04987a4c
Fix some serious floating-point bugs (fixes test cases such as Oscar,
...
Fhourstones, McCat-vor, and many others...)
Printer.cpp: Print implicit uses for AddRegFrm instructions. Break gas
bug workarounds up into separate stanzas of code for each bug. Add new
workarounds for fild and fistp.
X86InstrInfo.def: Add O_ST0 implicit uses for more FP instrs where they
obviously apply. Also add PrintImplUses flags for FP instrs where they
are necessary for gas to understand the output.
llvm-svn: 7165
2003-07-11 18:18:35 +00:00
4f420ce3a3
Several important bug fixes:
...
(1) Cannot use ANDN(ot), ORN, and XORN for boolean ops, only bitwise ops.
(2) Conditional move instructions must distinguish signed and unsigned
condition codes, e.g., MOVLE vs. MOVLEU.
(3) Conditional-move-on-register was using the cond-move-on-cc opcodes,
which produces a valid-looking instruction with bogus registers!
(4) Here's a really cute one: dividing-by-2^k for negative numbers needs to
add 2^k-1 before shifting, not add 1 after shifting. Sadly, these
are the same when k=0 so our poor test case worked fine.
(5) Casting between signed and unsigned values was not correct:
completely reimplemented.
(6) Zero-extension on unsigned values was bogus: I was only doing the
SRL and not the SLLX before it. Don't know WHAT I was thinking!
(7) And the most important class of changes: Sign-extensions on signed values.
Signed values are not sign-extended after ordinary operations,
so they must be sign-extended before the following cases:
-- passing to an external or unknown function
-- returning from a function
-- using as operand 2 of DIV or REM
-- using as either operand of condition-code setting operation
(currently only SUBCC), with smaller than 32-bit operands
Also, a couple of improvements:
(1) Fold cast-to-bool into Not(bool). Need to do this for And, Or, XOR also.
(2) Convert SetCC-Const into a conditional-move-on-register (case 41)
if the constant is 0. This was only being done for branch-on-SetCC-Const
when the branch is folded with the SetCC-Const.
llvm-svn: 7159
2003-07-10 20:07:54 +00:00
8ea738a9ff
Bug fix in creating constants: need 1U << 31, not 1 << 31.
...
llvm-svn: 7158
2003-07-10 19:48:19 +00:00
2f90c823a2
Fold cast-to-bool into not. Later, this should also be folded into other
...
boolean operations: AND, OR, XOR.
llvm-svn: 7157
2003-07-10 19:47:42 +00:00
6528067646
Several fixes to handling of int CC register:
...
(1) An int CC live range must be spilled if there are any interferences,
even if no other "neighbour" in the interf. graph has been allocated
that reg. yet. This is actually true of any class with only one reg!
(2) SparcIntCCRegClass::colorIGNode sets the color even if the LR must
be spilled so that the machine-independent spill code doesn't have to
make the machine-dependent decision of which CC name to use based on
operand type: %xcc or %icc. (These are two halves of the same register.)
(3) LR->isMarkedForSpill() is no longer the same as LR->hasColor().
These should never have been the same, and this is necessary now for #2 .
(4) All RDCCR and WRCCR instructions are directly generated with the
phony number for %ccr so that EmitAssembly/EmitBinary doesn't have to
deal with this.
llvm-svn: 7151
2003-07-10 19:42:11 +00:00
ea6e7a5d72
Elaborated assembly syntax of instructions in the comments.
...
llvm-svn: 7120
2003-07-07 22:18:42 +00:00
25a49f0cf1
Removed unnecessary assignment (it was taken care by a superclass) and clarified
...
some comments.
llvm-svn: 7119
2003-07-07 22:18:06 +00:00
c48e3fdffd
Insert workaround for GAS bug in assembling FLD/FSTP XWORD PTR [...]
...
instructions, by outputting them as bytes.
llvm-svn: 7115
2003-07-07 18:34:20 +00:00
c1db0fdd7e
Moved RegClassIDs enum to be next to the RegTypes enum.
...
llvm-svn: 7114
2003-07-07 16:52:39 +00:00
55c8e21073
Correction to last fix: Pointer types do not return true in Type::IsIntegral().
...
llvm-svn: 7113
2003-07-06 22:50:31 +00:00
d09c4c34c0
Major bug fix though it happened rarely (only on a compare after an
...
integer overflow):
We need to use %icc and not %xcc for comparisons on 32-bit or smaller
integer values.
llvm-svn: 7111
2003-07-06 20:13:59 +00:00
c4499d6cb1
Make the RegClassID values public -- there is no other way to get them.
...
llvm-svn: 7109
2003-07-06 19:53:59 +00:00
bb95605448
Apparently, the "regType" and "regClass" used in the Sparc backend are not both
...
correct: empirically, "regType" is wrong for a number of registers. Thus, one
can only rely on the "regClass" to figure out what kind of register one is
dealing with.
This change switches to using only "regClass" and adds a few extra DEBUG() print
statements and a few clean-ups in comments and code, mostly minor.
llvm-svn: 7103
2003-07-03 18:36:47 +00:00
20d93ca01d
* Force all "don't care" bits to 0 so that there are absolutely no unset bits in
...
the TableGen descriptions; all unset bits are thus errors.
* As a result, found and fixed instructions where some operands were not
actually assigned into the right portion of the instruction.
llvm-svn: 7074
2003-07-02 19:37:48 +00:00
eccc0dac91
The classes F4_3 and F4_4 have an `rd' operand that needs to be set.
...
llvm-svn: 7073
2003-07-02 18:27:47 +00:00
81951e1142
Properly fix instruction syntax in comments, using `imm' for instructions that
...
use an immediate value instead of a register.
llvm-svn: 7072
2003-07-02 18:15:43 +00:00
6f9caec57f
Fixed instruction syntax in the comments (specifies how instr is used).
...
llvm-svn: 7071
2003-07-02 18:02:58 +00:00
7a4abf89fa
Force fixed-size but large alloca objects to the dynamically allocated
...
area to avoid using up precious stack space within the 4095 offset limit
from %fp. Such objects that would themselves live at a large offset
were being put there already so this is a simple change.
llvm-svn: 7066
2003-07-02 06:59:22 +00:00
cf952cb504
(1) Major bug fix: DecomposeArrayRef() replaces its argument instr. and
...
deletes it, but we were merrily trying to fix the operands of that
instruction anyway! Instead, fix the replacement instruction.
(2) An Improvement: Check for and extract global values in all operands,
not just in known pointer operands. For example, they can occur in
call arguments, and probably other unforeseeable places as well.
This also eliminates the special-case handling of Load and Store.
llvm-svn: 7053
2003-07-02 01:23:15 +00:00
b5f8ada255
Bug/case fixes:
...
(1) select: Ok to convert a pointer to a float or double.
(2) regalloc: Some MachineInstr* for caller-saving code before a call
were being inserted before and after the call!
(3) Don't insert the caller-saving instructions in the
MachineCodeForInstruction for the Call instruction.
*All* instructions generated by register allocation need to be
recorded in those maps, but it needs to be done uniformly.
llvm-svn: 7051
2003-07-02 01:13:57 +00:00
3ef61afb76
Merged in autoconf branch. This provides configuration via the autoconf
...
system.
llvm-svn: 7014
2003-06-30 21:59:07 +00:00
53426e6526
Setjmp should always return zero if we don't implement longjmp. This avoids
...
leaving trash in the register, fixing anagram
llvm-svn: 7013
2003-06-30 19:35:54 +00:00
7ac937e011
Until there is a setjmp/longjmp transformation pass, codegen setjmp as a noop
...
and longjmp as an abort!
llvm-svn: 6977
2003-06-29 16:42:32 +00:00
c1e4ee0f50
Nice tasty llc fixes. These should fix LLC for x86 for everything in
...
SingleSource except oopack and Oscar. (Sorry, Oscar.)
include/llvm/Target/TargetInstrInfo.h: Remove virtual print method. Add
accessors for ImplicitUses/Defs.
lib/Target/TargetInstrInfo.cpp: Remove virtual print method. If you
really wanted this, just use MI->print(O, TM); instead...
lib/Target/X86:
FloatingPoint.cpp: ...like this.
X86InstrInfo.h: Remove virtual print method. Define the PrintImplUses
target-specific flag bit.
X86InstrInfo.def: Add the PrintImplUses flag to all the instructions
which implicitly use CL, because the assembler needs to see the CL in
order to generate the right instruction.
Printer.cpp: Ditch fnIndex at Chris's request. Now we use CurrentFnName
to name constants in the constant pool for each function instead. This
avoids keeping state between runOnMachineFunction() invocations, which
is a no-no. Having MangledGlobals be global is a bogon I'd like to get
rid of too, but making it a static member of Printer causes link errors
(why???).
Make NumberForBB into a member of Printer instead of a global, too.
Make printOp and printMemReference into methods of Printer.
X86InstrInfo::print is now Printer::printMachineInstruction, because
TargetInstrInfo::print is history. (Because of this, we have to qualify
the names of some TargetInstrInfo methods we call.)
Print out the ImplicitUses field of any instruction we print that has
the PrintImplUses bit set.
llvm-svn: 6924
2003-06-27 00:00:48 +00:00
4ab222142f
Number constants from constant pool as CPIf_i where f is the function index
...
and i is the constant pool index.
llvm-svn: 6920
2003-06-26 18:02:30 +00:00
dda8abec9b
Integrate the C writer's name mangler.
...
llvm-svn: 6908
2003-06-25 22:00:39 +00:00
25e766aca5
First draft of X86 LLC backend. This should be OK for small programs like
...
Shootout, but it has some issues with bigger programs. Work in progress.
llvm-svn: 6907
2003-06-25 18:01:07 +00:00
50b1d41ad4
Add the padding needed for variable-size alloca's, which should work now.
...
llvm-svn: 6859
2003-06-23 02:13:57 +00:00
53b843fc04
Do not use the inefficient, fixed function, CBW, CDQ, ... instructions
...
llvm-svn: 6844
2003-06-22 03:31:18 +00:00
6e1ec2394f
Minor simplification to 64-bit instsel
...
llvm-svn: 6831
2003-06-21 18:15:27 +00:00
22f54501be
For 16 and 32-bit multiplies, use the IMUL instruction instead of the MUL instruction.
...
This allows us to not force the use of the EAX/AX registers!
llvm-svn: 6830
2003-06-21 17:16:58 +00:00
2a67e0cf02
Add IMULr16 & IMULr32 instructions
...
llvm-svn: 6829
2003-06-21 17:13:35 +00:00
df1230ecf2
Generate code for LONG indexes to getelementptr instructions more efficiently
...
llvm-svn: 6828
2003-06-21 16:01:24 +00:00
9cb6b02dc9
Some preprocessors doen't support // comments and get confused
...
llvm-svn: 6821
2003-06-20 23:14:50 +00:00
f6aaa90e8d
RDCCR defines arg. #1 , not arg. #2 .
...
llvm-svn: 6796
2003-06-20 11:32:11 +00:00
272c8871d7
Fix output bug: Intel asm comment character is #, not ;.
...
llvm-svn: 6792
2003-06-19 19:58:32 +00:00
2181d1f1a2
RECAPITALIZE all the names of pseudo-instructions, and add a comment explaining
...
the convention.
:-)
llvm-svn: 6791
2003-06-19 19:41:13 +00:00
f6de19a095
Rename many instructions to their Intel asm-compatible names. This
...
involves removing the [bwl] suffixes from instruction names, as well
as some other distinguishing marks (32/64/80 on fp insns, _i suffixes, etc.)
Lowercase all instr. names as well for consistency's sake.
llvm-svn: 6790
2003-06-19 19:34:44 +00:00
259fdbc230
Add Initialization and Finalization methods for the Printer pass,
...
to print various things on a module-by-module basis (currently, only the
former is used).
Don't print < > around names. The assembler can't take it.
Print pseudoinstructions only as comments. The poor little assembler can't
take that, either.
llvm-svn: 6789
2003-06-19 19:32:32 +00:00
ac94bab876
lib/Target/X86/X86TargetMachine.{cpp,h}: Add initial version
...
(non-working) of llc guts for X86, and add a prototype for it.
llvm-svn: 6779
2003-06-18 21:43:21 +00:00
cf8c4f5fe4
lib/Target/Sparc/Sparc.cpp:
...
Move LowerAllocations, PrintFunction, and SymbolStripping passes, and
the corresponding -disable-strip and -d options, over here to the SPARC
target-specific bits of llc. Rename -d to -dump-asm.
tools/llc/Makefile:
Reindent. Add x86 library so that llc compiles again.
tools/llc/llc.cpp:
Remove support for running arbitrary optimization passes. Use opt instead.
Remove LowerAllocations, PrintFunction, and SymbolStripping passes, as noted
above.
Allow user to select a backend (x86 or SPARC); default to guessing from
the endianness/pointer size of the input bytecode file.
Fix typos.
Delete empty .s file and exit with error status if target does not support
static compilation.
llvm-svn: 6776
2003-06-18 21:14:23 +00:00
d768c51f1b
These instructions really take three operands. This fixes some assertions
...
llvm-svn: 6765
2003-06-18 15:09:02 +00:00
7a719ed20c
Isolate machine-dependent use of <alloca.h> in "Support/Alloca.h",
...
so that we can easily change its use to be conditional on the result of
an autoconf test later.
llvm-svn: 6723
2003-06-16 21:54:01 +00:00
3bcde17e00
Rename FInfo.cpp to FunctionInfo.cpp, eliminate FInfo.h
...
llvm-svn: 6712
2003-06-16 15:31:52 +00:00
617ea34a6d
move contents of include/llvm/Reoptimizer/Mapping/FInfo.h into here, it is sparc internal
...
llvm-svn: 6711
2003-06-16 15:31:09 +00:00
cb9ef2bccc
Fix invalid number of arguments problem
...
llvm-svn: 6692
2003-06-16 12:03:00 +00:00
fafd3d2b31
Updated for the new projects Makefile.
...
llvm-svn: 6678
2003-06-11 13:49:11 +00:00
11ecb1d8ca
Fix warnings on Sparc
...
llvm-svn: 6658
2003-06-06 18:25:33 +00:00
ff61facc3c
Print address out as hex.
...
llvm-svn: 6657
2003-06-06 09:53:28 +00:00
ad2ab66d89
Added 'r' and 'i' versions to WRCCR.
...
llvm-svn: 6656
2003-06-06 09:52:58 +00:00
2969ec5266
* Changed Bcc instructions to behave like BPcc instructions
...
* BPA and BPN do not take a %cc register as a parameter
* SLL/SRL/SRA{r,i}5 are there for a reason - they are ONLY 32-bit instructions
* Likewise, SLL/SRL/SRAX{r,i}6 are only 64-bit
* Added WRCCR{r,i} opcodes
llvm-svn: 6655
2003-06-06 09:52:23 +00:00
0941cd11c8
* Removed PreSelection pass because that is now done in the JIT
...
* Removed instruction scheduling as it is too slow to run in a JIT environment
* Removed other passes because they aren't necessary and can slow JIT down
llvm-svn: 6652
2003-06-06 07:11:16 +00:00
b7f76d32fe
Fixed a bunch of test cases in test/Regression/Jello which could not get the
...
address of a floating-point (allocated via ConstantPool) correctly.
llvm-svn: 6647
2003-06-06 04:41:22 +00:00
65d29b87e3
Add statistic for # machine instrs emitted
...
Add GROSS HACK to get CompilationCallback to work when compiled in release mode
llvm-svn: 6646
2003-06-06 04:00:05 +00:00
905ffcb780
* If a global is not a function, just ask the MachineCodeEmitter for the addr
...
* Do not block a print statement with a DEBUG() guard if we're going to abort()
llvm-svn: 6645
2003-06-06 03:35:37 +00:00
ee21ccc607
The SUB*i instructions belong to a different class than their SUB*r brethren.
...
llvm-svn: 6644
2003-06-06 03:34:47 +00:00
1c1568ed68
Put all debug print statements under the DEBUG() guard to make output clean so
...
that tests can automatically diff the output.
llvm-svn: 6642
2003-06-06 00:26:11 +00:00
ee964e2690
Fixed confusion between register classes and register types.
...
Now %fcc registers are recognized correctly.
llvm-svn: 6640
2003-06-05 23:51:10 +00:00
97a04b24cc
Added missing directive to store the instruction name.
...
llvm-svn: 6639
2003-06-05 23:35:11 +00:00
90fd75efa4
Moved predict and annul fields to the end of each individual instruction
...
class, because they are currently unused.
llvm-svn: 6638
2003-06-05 23:33:15 +00:00
fd394b766a
Do not preset the cc register, the instructions actually use it.
...
llvm-svn: 6637
2003-06-05 23:30:27 +00:00
82dca3714f
Minor tuning -- avoid a non-inlinable function call on every operand.
...
Also, reorder a couple of functions for inlining.
llvm-svn: 6635
2003-06-05 21:12:56 +00:00
27afe52c4c
Added lazy function resolution to the JIT.
...
llvm-svn: 6633
2003-06-05 20:52:06 +00:00
9ac56f847f
* The textual output of (non-)predicted FP branches is the same.
...
* Stop mapping FBcc instructions to deprecated opcodes, map to FBPcc instead.
* Fixed opf in FCMPxy instructions.
llvm-svn: 6632
2003-06-05 20:51:37 +00:00
f6db070e65
Implement generation of cmp R, C to not use an extra register
...
llvm-svn: 6627
2003-06-05 19:30:30 +00:00
06250116a8
Special case simple binary operator X op C
...
This avoid generating a register to hold C, which in turn speeds up the
register allocator by a lot: ~9% on 164.gzip and ~17% on 256.bzip2. This
also speeds up other passes. This also speeds up execution of the program
marginally, and makes the asm much easier to read. :)
llvm-svn: 6626
2003-06-05 18:28:55 +00:00
1b84b0b928
Add instructions for (add|sub|and|or|xor)ri(8|16|32)
...
llvm-svn: 6625
2003-06-05 18:25:08 +00:00
cbbe7ac699
All store instructions really want 'rd' in the first field.
...
Special cases: STFSRx and STXFSRx - they operate on predefined rd=0 or rd=1, and
expect %fsr as the parameter in assembly. They are disabled (since not used)
until an encoding, both for code generation and output, is chosen.
llvm-svn: 6619
2003-06-05 01:06:10 +00:00
98467a7a18
Added missing 'rs1' field to F3_rdrs1imm13, 'rd' to F3_rdrs1rs2.
...
llvm-svn: 6618
2003-06-05 00:39:45 +00:00
98eee41e0e
lib/CodeGen/Mapping/MappingInfo.cpp:
...
Update file comment to contain a bunch of the overview mapping-info
documentation previously buried within the file.
Remove some unnecessary include/using stmts.
Rename pass to MappingInfoCollector.
Rewrite a lot of it so it doesn't use global instance variables and so
it outputs into MappingInfo objects and then dumps those out, instead of going
straight to an assembly file.
Change name of factory to getMappingInfoCollector.
Fold prologue & epilogue writers into MappingInfo methods.
lib/Target/Sparc/FInfo.cpp:
Correct file comment to reflect above change
lib/Target/Sparc/Sparc.cpp:
Change name of factory to getMappingInfoCollector.
llvm-svn: 6617
2003-06-04 22:07:12 +00:00
44b2d7a56f
Add file comment. Include <vector> and <string>. Update include guards
...
to reflect file's current location. Add definition of class
MappingInfo.
llvm-svn: 6616
2003-06-04 22:02:47 +00:00
365a47bdbb
Revert brians patch to get mapping info working again
...
sorry dude
llvm-svn: 6615
2003-06-04 21:01:12 +00:00
cbf828dd0d
Had to comment out a line in outByte() to get it to compile because Out and tmp were
...
undeclared. I was not sure what Brian wanted, so I will let him fix this. But now it compiles.
llvm-svn: 6614
2003-06-04 20:53:46 +00:00
efafdf8046
* Instead of re-inventing the MachineConstantPool emitter that's already given
...
in Emitter.cpp, just convert the Sparc version of the constant pool into
what's already supported and inter-operate.
* Implemented a first pass at lazy function resolution in the JITResolver. That
required adding a SparcV9CodeEmitter pointer to simplify generating
bit-patterns of the instructions.
* SparcV9CodeEmitter now creates and destroys static TheJITResolver, which makes
sense because the SparcV9CodeEmitter is the only user of TheJITResolver, and
lives for the entire duration of the JIT (via PassManager which lives in VM).
* Changed all return values in the JITResolver to uint64_t because of the 64-bit
Sparc architecture.
* Added a new version of getting the value of a GlobalValue in the
SparcV9CodeEmitter, which now works for already-generated functions (JITted or
library functions).
* Removed little-used and unused functions, cleaning up the internal view of the
SparcV9CodeEmitter.
llvm-svn: 6612
2003-06-04 20:01:13 +00:00
49833da4bf
Make writeNumber() void. Get ready to decouple it from .byte directive output.
...
llvm-svn: 6609
2003-06-04 18:17:22 +00:00
7be5063ccc
Added the 4.7 instruction class and all the FMOVcc instructions in them.
...
llvm-svn: 6601
2003-06-04 04:48:31 +00:00
11cfb6f7dc
Comment out opcodes currently unused in the Sparc backend.
...
llvm-svn: 6597
2003-06-04 02:57:55 +00:00
fee44070a1
No really, you _cannot use_ getelementptr on an unsized type: that makes
...
no sense.
llvm-svn: 6595
2003-06-04 02:35:35 +00:00
37586db4b5
Added instruction format class 3.15 and floating-point compare instructions.
...
llvm-svn: 6594
2003-06-04 02:26:14 +00:00
680ee9f634
Undo one of those last fixes -- it was incorrect.
...
llvm-svn: 6593
2003-06-04 02:10:37 +00:00
46666cfcdd
Avoid generating a getelementptr instruction of a function
...
llvm-svn: 6591
2003-06-04 01:24:40 +00:00
49e14432c2
Make the write*map methods more self-contained. Document some more.
...
llvm-svn: 6589
2003-06-03 19:30:15 +00:00
fd2a8f5868
Remove usage of typedef
...
llvm-svn: 6583
2003-06-03 15:41:58 +00:00
0addbab5e2
Add namespace comments for doxygen
...
llvm-svn: 6581
2003-06-03 15:31:23 +00:00
71ab329f08
I documented this file, in an attempt to understand it, with a view toward
...
rewriting it. I also vacuumed out all the commented-out code and
inaccurate comments, etc.
(We need to put the mapping information in a data structure so that we can
pass it out to the JIT, instead of automagically converting it to .byte
directives.)
llvm-svn: 6574
2003-06-03 07:56:05 +00:00
0521493aa9
Use the new -o tablegen option
...
llvm-svn: 6572
2003-06-03 05:06:33 +00:00
2712333e5f
Constants are laid out in memory in PC-relative form.
...
llvm-svn: 6568
2003-06-03 03:24:12 +00:00
c8728a147e
Added opcode conversion for conditional move of integers.
...
llvm-svn: 6567
2003-06-03 03:23:35 +00:00
cdf6256940
* Convert load/store opcodes from register to immediate forms.
...
* Stop code from wrapping to the next line.
llvm-svn: 6566
2003-06-03 03:21:58 +00:00
3cdf52a644
Convert load/store opcodes from register to immediate forms, if necessary.
...
llvm-svn: 6565
2003-06-03 03:20:57 +00:00
b54bf54065
Store instructions are different from other Format 3.1/3.2 instructions in that
...
they prefer the destination register to be last. Thus, two new classes were made
for them that accomodate for having this layout of operands (F3_1rd, F3_2rd).
llvm-svn: 6564
2003-06-03 03:20:14 +00:00
bbd10f96a2
* Added section A.34: Move FP register on int reg condition (FMOVr)
...
* Labeled sections that are not currently used in the Sparc backend as not
requiring completion at this time.
llvm-svn: 6562
2003-06-03 01:16:27 +00:00
e9465fc1d4
* Removed unused classes (rd field is always mentioned last); fixed comments.
...
* Added instruction classes which start building from rs1, then rs2, and rd.
* Fixed order of operands in classes 4.1 and 4.2; added 4.6 .
llvm-svn: 6561
2003-06-03 01:13:53 +00:00
ace89ff224
* Removed unused classes: the rd field is always mentioned as the last reg.
...
* Added new classes which start building from rs1, adding rs2, and then rd.
* Fixed order of operands in classes 3.11, 3.12, 3.16, and 3.17 .
* Fixed comments to reflect Real Life (tm).
* Removed "don't care" commented out assignments and dead classes (#if 0).
llvm-svn: 6560
2003-06-03 01:11:58 +00:00
4485c795a9
The rd field goes after the immediate field in format 2.1 instructions.
...
llvm-svn: 6559
2003-06-03 01:04:04 +00:00
f545b2402f
Added MOVR (move int reg on register condition), aka comparison with zero.
...
None of these instructions are actually used in the Sparc backend, so no changes
were required in the instruction selector.
llvm-svn: 6549
2003-06-02 21:16:54 +00:00
843d6933a0
SparcInstr.def: added 'r' and 'i' versions of MOV(F)cc instructions
...
SparcInstrSelection.cpp:
* Fixed opcodes to return correct 'i' version since the two functions are each
only used in one place.
* Changed name of function to have an 'i' in the name to signify that they each
return an immediate form of the opcode.
* Added a warning if either of the functions is ever used in a context which
requires a register-version opcode.
SparcV9_F4.td: fixed class F4_3, added F4_4 and notes that F4_{1,2} need fixing
SparcV9.td: added the MOV(F)cc instructions
llvm-svn: 6548
2003-06-02 20:55:14 +00:00
609b55c255
* Added casts to/from floating-point to integers.
...
* Changed // comments to #ifdef 0 to maintain syntax highlighting.
llvm-svn: 6546
2003-06-02 19:08:37 +00:00
55c6331637
Clean up after merging in SparcEmitter.cpp; branches and return work again.
...
llvm-svn: 6536
2003-06-02 05:24:46 +00:00
7b66a726f8
Minor cleanups
...
llvm-svn: 6535
2003-06-02 05:21:06 +00:00
f9162dc713
Eliminated a compiler warning due to casting to a different-sized datatype.
...
llvm-svn: 6531
2003-06-02 04:13:58 +00:00
ce62d36615
Merged in tools/lli/JIT/SparcEmitter.cpp, coupled with the JITResolver taken
...
from lib/Target/X86/X86CodeEmitter.cpp .
llvm-svn: 6530
2003-06-02 04:12:39 +00:00
29848417f3
Renamed MachineCodeEmitter.cpp -> X86CodeEmitter.cpp as it conflicts with the
...
target-independent lib/CodeGen/MachineCodeEmitter.cpp; preserved CVS history.
llvm-svn: 6528
2003-06-02 03:28:00 +00:00
bca71e4735
Deal with %lo/%lm/%hm/%hh flags in getMachineOpValue().
...
llvm-svn: 6522
2003-06-02 02:13:26 +00:00
3bb2a00849
Move X86 specific code out of the JIT into the X86 backend
...
llvm-svn: 6516
2003-06-01 23:23:50 +00:00
13dffdefef
Make the .inc file depend on $(TBLGEN), so that changes to TableGen followed
...
by a re-link of TableGen will notify Make to rebuild the .inc file.
llvm-svn: 6512
2003-06-01 04:52:51 +00:00
4536fcd57b
* Implement cast (long|ulong) to bool
...
* Fix cast of (short|ushort|int|uint) to bool to work right
llvm-svn: 6510
2003-06-01 03:38:24 +00:00
bf37f7de1b
Add RR forms of test instruction
...
llvm-svn: 6509
2003-06-01 03:37:46 +00:00
e6c3ee6b07
Add map info for arguments to call (copies)
...
llvm-svn: 6503
2003-06-01 02:48:23 +00:00
372086c87b
Add support for shl and shr for 64 bit integer types
...
llvm-svn: 6499
2003-06-01 01:56:54 +00:00
ea447da8a8
Add definitions for TEST instructions
...
llvm-svn: 6498
2003-06-01 01:56:39 +00:00
70f158330c
Add new cmovne32 instruction
...
llvm-svn: 6496
2003-06-01 00:05:15 +00:00
ba6f8e274a
Several bug fixes: globals in call operands were not being pulled out;
...
globals in some other places may not have been pulled out either;
globals in phi operands were being put just before the phi instead of
in the predecessor basic blocks.
llvm-svn: 6466
2003-05-31 07:34:57 +00:00
a83804a29a
Extensive changes to the way code generation occurs for function
...
call arguments and return values:
Now all copy operations before and after a call are generated during
selection instead of during register allocation.
The values are copied to virtual registers (or to the stack), but
in the former case these operands are marked with the correct physical
registers according to the calling convention.
Although this complicates scheduling and does not work well with
live range analysis, it simplifies the machine-dependent part of
register allocation.
llvm-svn: 6465
2003-05-31 07:32:01 +00:00
96b801ab56
Reverting previous beautification changes.
...
llvm-svn: 6464
2003-05-31 07:27:17 +00:00
bf69b7fe69
Removed useless code -- the byte order of output code is correct as is.
...
llvm-svn: 6462
2003-05-31 06:26:06 +00:00
23937091f0
The 'rd' register is consistently mentioned last in instruction definitions.
...
Created new classes from which instructions inherit their ordering of fields.
llvm-svn: 6461
2003-05-31 06:25:19 +00:00
c4f029f8ba
* Put back into action SLL/SRL/SRA{r,i}6 instructions
...
* Fixed page numbers referring to the Sparc manual
llvm-svn: 6460
2003-05-31 06:24:29 +00:00
8d5316769f
Code beautification, no functional changes.
...
llvm-svn: 6459
2003-05-31 06:22:37 +00:00
0b3a70c25b
Enabling some of these passes causes lli to break
...
llvm-svn: 6457
2003-05-31 04:23:04 +00:00
87cbd97710
The actual order of parameters in a 2-reg-immediate assembly instructions is
...
"rs1, imm, rd": most importantly, rd goes last.
llvm-svn: 6456
2003-05-31 04:22:26 +00:00
5bf351c880
Added:
...
* ability to save BasicBlock references to be resolved later
* register remappings from the enum values to the real hardware numbers
llvm-svn: 6449
2003-05-30 20:17:33 +00:00
0757de607a
Fixed the namespace to match SparcInternals.h; added notes on some missing
...
sections of instructions.
llvm-svn: 6448
2003-05-30 20:15:59 +00:00
8747377292
The register types need to be visible outside of the class to be useful.
...
For one, converting register numbers based on class in the code emitter.
llvm-svn: 6447
2003-05-30 20:12:42 +00:00
a853af587a
Moved and expanded convertOpcodeFromRegToImm() to conver more opcodes.
...
Code beautification for the rest of the code: changed layout to match the rest
of the code base.
llvm-svn: 6446
2003-05-30 20:11:56 +00:00
c1830a472a
Make LLI behave just like LLC with regard to the compile passes it uses.
...
llvm-svn: 6444
2003-05-30 20:00:13 +00:00
39dfa6a920
Made the register and immediate versions of instructions consecutive.
...
llvm-svn: 6439
2003-05-30 19:14:01 +00:00
f6e4dce74c
Because the format of the shift instructions is `shift r, shcnt, r', the
...
instructions of format 3.12 and 3.13 cannot inherit from F3rdrs1, because that
implies that the two registers are the first two parameters to the instruction.
Thus I made the instructions inherit from F3rd again, and manually added an rs1
field AFTER the shcnt field in the instruction, which maps to the appropriate
place in the instruction.
The other changes are just elimination of unnecessary spaces.
llvm-svn: 6437
2003-05-30 18:06:10 +00:00
d380f29377
Makefile: Make SparcV9CodeEmitter.inc depend on SparcV9_F*.td as well.
...
SparcV9_F3.td: F3_12 and F3_13 instructions have rd and rs1 fields. Also,
their fields were totally screwed up. This seems to fix the problem.
llvm-svn: 6429
2003-05-30 08:02:14 +00:00
6ada87e6eb
Since there is now another derived .inc file, ignore them all.
...
llvm-svn: 6411
2003-05-29 20:15:27 +00:00
9175a5de53
Use an absolute path to TableGen because not everyone (e.g. automatic tester)
...
has their path set up by this point.
llvm-svn: 6410
2003-05-29 20:09:56 +00:00
bb053cefe8
Added the target-independent part of TableGen data.
...
llvm-svn: 6403
2003-05-29 18:48:17 +00:00
35d5512f34
When TableGen finds an error in the SparcV9.td file, it exits with a non-zero
...
exit code. This, in turn, makes an empty file SparcV9CodeEmitter.inc, and only
much later, produces a link error because the key function that TableGen creates
isn't found.
Using a temporary file in the middle forces a good .INC file to be generated by
TableGen, and it will keep trying until you fix the input file.
llvm-svn: 6392
2003-05-29 05:29:22 +00:00
794c8a1334
Fixed to use the correct format of the instruction.
...
llvm-svn: 6390
2003-05-29 04:53:56 +00:00
376dac2eed
This should work better with re-generating the SparcV9CodeEmitter.inc file.
...
Also, added a rule to delete the generated .inc file on `make clean'.
llvm-svn: 6389
2003-05-29 03:32:49 +00:00
ea4f498395
* Broke up SparcV9.td into separate files as it was getting unmanageable
...
* Added some Format 4 classes, but not instructions
* Added notes on missing sections with FIXMEs
* Added RDCCR instr
llvm-svn: 6388
2003-05-29 03:31:43 +00:00
fded35952a
Fixed ordering of elements in instructions: although the binary instructions
...
list (rd, rs1, imm), in that order (bit-wise), the actual assembly syntax is
instr rd, imm, rs1, and that is how they are constructed in the instruction
selector. This fixes the discrepancy.
Also fixed some comments along the same lines and fixed page numbers referring
to where instructions are described in the Sparc manual.
llvm-svn: 6384
2003-05-28 17:49:29 +00:00
2c35144ce5
Add dependency to make TableGen rule fire.
...
llvm-svn: 6383
2003-05-28 17:41:09 +00:00
07b60f8e2e
Fixed an error preventing compilation.
...
llvm-svn: 6381
2003-05-27 22:48:28 +00:00
481dfdb523
Added the 'r' and 'i' annotations to instructions as their opcode names have
...
changed.
llvm-svn: 6380
2003-05-27 22:44:44 +00:00
7975661a8e
Keep track of the current BasicBlock being processed so that a referencing
...
MachineInstr can later be patched up correctly.
llvm-svn: 6378
2003-05-27 22:41:44 +00:00
af96d39c04
Added 'r' and 'i' annotations to instructions as SparcInstr.def has changed.
...
llvm-svn: 6377
2003-05-27 22:40:34 +00:00
96ce62a105
Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.
...
Non-obvious change: since I have changed ST and STD to be STF and STDF to
(a) closer resemble their name (NOT assembly text) in the Sparc manual, and
(b) clearly specify that they they are floating-point opcodes,
I made the same changes in this file.
llvm-svn: 6376
2003-05-27 22:39:01 +00:00
da83883ef1
Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.
...
Here I had to make one non-trivial change: add a function to get a version of
the opcode that takes an immediate, given an opcode that takes all registers.
This is required because sometimes it is not known at construction time which
opcode is used because opcodes are passed around between functions.
llvm-svn: 6375
2003-05-27 22:37:00 +00:00
8bde6a688c
Added 'r' or 'i' annotations to instructions, as SparcInstr.def has changed.
...
llvm-svn: 6373
2003-05-27 22:35:43 +00:00
cb801a6884
Added entries for each of the instructions with annotations ('r' or 'i').
...
llvm-svn: 6372
2003-05-27 22:33:39 +00:00
db69bebc89
One of the first major changes to make the work of JITting easier: adding
...
annotations on instructions to specify which format they are (i.e., do they take
2 registers and 1 immediate or just 3 registers) as that changes their binary
representation and hence, code emission.
This makes instructions more like how X86 defines them to be. Now, writers of
instruction selection must choose the correct opcode based on what instruction
type they are building, which they already know. Thus, the JIT doesn't have to
do the same work by `discovering' which operands an instruction really has.
As this involves lots of small changes to a lot of files in lib/target/Sparc,
I'll commit them individually because otherwise the diffs will be unreadable.
llvm-svn: 6371
2003-05-27 22:32:38 +00:00
8110439ff6
* Allow passing in an unsigned configuration to allocateSparcTargetMachine()
...
a default value is set in the header file.
* Fixed some code layout to make it more consistent with the rest of codebase
* Added addPassesToJITCompile() with relevant passes
llvm-svn: 6369
2003-05-27 22:24:48 +00:00
8b28140662
Moved generation of the SparcV9CodeEmitter.inc file higher in the Makefile so
...
that Makefile.common would see it.
llvm-svn: 6367
2003-05-27 22:04:38 +00:00
5641434438
Add prototypes to add passes to JIT compilation and code emission.
...
Also, added annotations to how instructions are modified (reg/imm operands).
Added prototype for adding register numbers to values pass for interfacing with
the target-independent register allocators in the JIT.
llvm-svn: 6366
2003-05-27 22:01:10 +00:00
e195b7c0fc
Broke out class definition from SparcV9CodeEmitter, and added ability to take a
...
MachineCodeEmitter to make a pass-through debugger -- output to memory and to
std::cerr.
llvm-svn: 6363
2003-05-27 21:45:05 +00:00
3e9272fb29
SparcV9CodeEmitter.cpp is a part of the Sparc code emitter. The main function
...
that assembles instructions is generated via TableGen (and hence must be built
before building this directory, but that's already the case in the top-level
Makefile).
Also added is .cvsignore to ignore the generated file `SparcV9CodeEmitter.inc',
which is included by SparcV9CodeEmitter.cpp .
llvm-svn: 6357
2003-05-27 20:07:58 +00:00
d452b60678
Added definitions for a bunch of floating-point instructions.
...
llvm-svn: 6356
2003-05-27 20:03:29 +00:00
631006ba48
Renamed opIsDef to opIsDefOnly.
...
llvm-svn: 6340
2003-05-27 00:03:17 +00:00
8adb9944aa
Added special register class containing (for now) %fsr.
...
Fixed spilling of %fcc[0-3] which are part of %fsr.
Moved some machine-independent reg-class code to class TargetRegInfo
from SparcReg{Class,}Info.
llvm-svn: 6339
2003-05-27 00:02:22 +00:00
3ee4e2a3c1
Bug fix: right shift for int divide-by-power-of-2 was incorrect for
...
negative values. Need to add one to a negative value before right shift!
llvm-svn: 6334
2003-05-25 21:59:47 +00:00
5f36d741db
Bug fix: padding bytes within a structure should go after each field!
...
llvm-svn: 6333
2003-05-25 21:59:09 +00:00
5b941461b1
Bug fix: sign-extension was not happening for C = -MININT since C == -C!
...
llvm-svn: 6332
2003-05-25 21:58:11 +00:00
c9a0a1d728
Add support for compiling varargs functions.
...
llvm-svn: 6325
2003-05-25 15:59:47 +00:00
e2402c65d0
Reword to remove reference to how things worked in the past.
...
llvm-svn: 6323
2003-05-24 01:08:43 +00:00
d21a02ad58
Implement the TargetInstrInfo's createNOPinstr() and isNOPinstr() interface.
...
llvm-svn: 6320
2003-05-24 00:09:50 +00:00
39968bbc46
Cleaned up code layout; no functional changes.
...
llvm-svn: 6312
2003-05-23 19:20:57 +00:00
c42dc745db
Fixed `volatile' typo.
...
llvm-svn: 6266
2003-05-21 19:34:28 +00:00
f865cc44ab
Cleaned up code layout, spacing, etc. for readability purposes and to be more
...
consistent with the style of LLVM's code base (and itself! it's inconsistent in
some places.)
No functional changes were made.
llvm-svn: 6265
2003-05-21 18:48:06 +00:00
6532e427b4
* Fix divide by zero error with empty structs
...
* Empty structs should have ALIGNMENT 1, not SIZE 1.
llvm-svn: 6263
2003-05-21 18:08:44 +00:00
2a651d7a0e
Cleaned up code layout, spacing, etc. for readability purposes and to be more
...
consistent with the style of LLVM's code base (and itself! it's inconsistent in
some places.)
No functional changes were made.
llvm-svn: 6262
2003-05-21 18:05:35 +00:00
352f7ac072
Namespacified `vector' and `cerr' to always use the `std::' namespace.
...
Eliminated `using' directives.
llvm-svn: 6261
2003-05-21 17:59:06 +00:00
56f4fa10fd
Sparc instruction opcodes now all live under the `V9' namespace.
...
llvm-svn: 6249
2003-05-20 20:32:24 +00:00
9c105cd27f
Clean up #includes
...
llvm-svn: 6173
2003-05-13 20:21:19 +00:00
3fa7b77ddf
Make abort more explicit
...
llvm-svn: 6151
2003-05-12 21:16:26 +00:00
d4e5409f35
Remove the assertion failure of course... doh
...
llvm-svn: 6150
2003-05-12 20:39:39 +00:00
5069283493
Implement casts from unsigned integers to floating point
...
llvm-svn: 6148
2003-05-12 20:36:13 +00:00
6c906adb73
Make error messages more useful than jsut an abort
...
llvm-svn: 6146
2003-05-12 20:16:58 +00:00
b1eee00034
Remove wierd printout
...
llvm-svn: 6145
2003-05-12 20:10:12 +00:00
786bd8849a
Do not insert multiple initializations for the same value in a PHI node
...
llvm-svn: 6113
2003-05-12 14:22:21 +00:00
74b65ee219
This blank line has GOT to go.
...
llvm-svn: 6057
2003-05-09 03:28:13 +00:00
93c8eddd75
Add support for Add, Sub, And, Or, & Xor constant exprs
...
llvm-svn: 6049
2003-05-08 20:49:25 +00:00
b257aab658
Add support for variable argument functions!
...
llvm-svn: 6046
2003-05-08 19:44:13 +00:00
25e907dae4
Added the initial version of the TableGen description for the Sparc backend.
...
llvm-svn: 6021
2003-05-07 21:52:39 +00:00
d964c3b9fd
IMPLICIT_DEF was not the beautiful elegant solution I thought it was going
...
to be. In fact, it made stuff worse. :(
llvm-svn: 6013
2003-05-07 19:21:28 +00:00
37ffac92d5
Emit pseudo instructions to indicate that some registers are live on entrance
...
and exit of the function. This fixes bug: Jello/2003-05-06-LivenessClobber.llx
and the Fhourstones benchmark
llvm-svn: 6010
2003-05-06 21:32:22 +00:00
4b1e02df8f
Don't have a cow with new pseudo instructions
...
llvm-svn: 6009
2003-05-06 21:31:47 +00:00
8788d6e122
Add two new pseudo instructions
...
llvm-svn: 6008
2003-05-06 21:31:31 +00:00
effa5ba1ac
The Hyphenation-Adding Committee is now in session.
...
llvm-svn: 5986
2003-05-03 02:18:17 +00:00
3ed86610cd
Eliminate use of NonCopyable so that doxygen documentation doesn't link
...
the Annotation classes with the noncopyable classes for no reason
llvm-svn: 5973
2003-05-01 20:28:45 +00:00
4f6cdbdf81
Remove two fields from TargetData which are target specific.
...
llvm-svn: 5963
2003-04-26 20:11:09 +00:00
25900cf220
The promotion rules are the same for all targets, they are set by the C standard.
...
llvm-svn: 5962
2003-04-26 19:47:36 +00:00
21d4509d76
IntegerRegSize is always 8 for sparc
...
llvm-svn: 5961
2003-04-26 19:44:35 +00:00
2a2338f1ba
Fix bogus assert
...
llvm-svn: 5949
2003-04-25 21:58:54 +00:00
b05f851d59
Whoops, 32 bit targets have _4_ byte pointers, not _32_ byte pointers!
...
llvm-svn: 5937
2003-04-25 06:06:43 +00:00
afdf01ef62
Fix compatibility bug: X86 aligns doubles to 4 bytes, not 8!
...
llvm-svn: 5935
2003-04-25 06:05:57 +00:00
efbae9cff1
Fix obvious type-o
...
llvm-svn: 5932
2003-04-25 05:23:10 +00:00
e483398516
Allow for easy detection of when a "default" TargetData is created by the
...
passmanager, which is never the right thing to do.
llvm-svn: 5922
2003-04-25 02:50:45 +00:00
42516baf76
add a new targetdata ctor to create a target data appropriate to the module
...
llvm-svn: 5903
2003-04-24 19:09:05 +00:00
13cafd041a
Trivial cleanup
...
llvm-svn: 5899
2003-04-24 18:35:51 +00:00
ec6f16eae6
Fix iterator invalidation problem with cast instructions
...
llvm-svn: 5876
2003-04-23 17:57:48 +00:00
2670371c9a
Implement the constantexpr CAST instruction correctly
...
llvm-svn: 5875
2003-04-23 17:22:12 +00:00
524608ab79
Add support for the Switch instruction by running the lowerSwitch pass first
...
llvm-svn: 5867
2003-04-23 16:24:55 +00:00
dd4745241f
It's "necessary"...
...
llvm-svn: 5848
2003-04-22 20:20:11 +00:00
e569e992d8
It's "necessary" to spell "necessarily" correctly.
...
llvm-svn: 5833
2003-04-22 17:54:23 +00:00
5b348718df
Add support for a simple constantexpr: cast of one ptr type to another
...
llvm-svn: 5829
2003-04-21 21:33:44 +00:00
379a8d2d1c
Add new linkage types to support a real frontend
...
llvm-svn: 5786
2003-04-16 20:28:45 +00:00
30f40d94cc
Rename -no-* to -disable-*
...
llvm-svn: 5642
2003-02-26 20:00:41 +00:00
ae1f73b4f5
Remove wierd case that can never happen
...
llvm-svn: 5623
2003-02-25 20:27:09 +00:00
76e9f774dd
Don't emit unneccesary branch instructions!
...
llvm-svn: 5328
2003-01-16 18:07:23 +00:00
4769c1bef8
Fix problem with invalidated iterator
...
llvm-svn: 5327
2003-01-16 18:07:13 +00:00
2f983fcce3
Implement optimization folding setcc into branch.
...
llvm-svn: 5324
2003-01-16 16:43:00 +00:00
8c59d64041
Add more flavors of branch instructions
...
llvm-svn: 5323
2003-01-16 16:42:45 +00:00
b2809dc6b5
Implement code to keep the stack pointer aligned to an 8 byte boundary.
...
This improves the performance of the power benchmark by a few percent.
This will be neccesary for SSE code, which requires 16 byte alignment of
the stack.
llvm-svn: 5320
2003-01-16 02:20:12 +00:00
9e75444c8b
Handle frame offset due to return address pushed on the stack
...
llvm-svn: 5319
2003-01-15 22:57:35 +00:00
dea36ca100
Move sparc specific code into the Sparc backend
...
llvm-svn: 5317
2003-01-15 21:36:50 +00:00
4f596d7a2c
Fix warnings
...
llvm-svn: 5316
2003-01-15 21:36:30 +00:00
f9fd59148c
Adjust to simpler interfaces
...
Eliminate dependency on RegClass.h
llvm-svn: 5315
2003-01-15 21:14:32 +00:00
a23969b669
#include RegClass.h explicitly
...
llvm-svn: 5307
2003-01-15 19:57:07 +00:00
90fc665489
Move private header to private directory
...
llvm-svn: 5305
2003-01-15 19:50:44 +00:00
d840ccd2e0
Prune #includes
...
llvm-svn: 5303
2003-01-15 19:48:13 +00:00
e58cd301cd
Use BuildMI more
...
llvm-svn: 5299
2003-01-15 19:23:34 +00:00
8145abb99e
Fix bug found by regtests
...
llvm-svn: 5294
2003-01-15 18:11:11 +00:00
1ebaa90f48
Use BuildMI more, Create*Instruction less
...
llvm-svn: 5291
2003-01-15 17:47:49 +00:00
33be2a23ee
X86 backend should never use addMReg
...
llvm-svn: 5288
2003-01-15 00:04:14 +00:00
71aa7afc27
* Elimiante a bunch of functions from InstrSelectionSupport.h, replacing users
...
of them with BUildMI calls instead.
* Fix def information in instructions generated by prologepilog inserter
llvm-svn: 5287
2003-01-15 00:03:28 +00:00
24c1d5e551
Rename llvm/Analysis/LiveVar/FunctionLiveVarInfo.h -> llvm/CodeGen/FunctionLiveVarInfo.h
...
llvm-svn: 5284
2003-01-14 23:05:08 +00:00
b4d58d7f9e
Rename MachineInstrInfo -> TargetInstrInfo
...
llvm-svn: 5272
2003-01-14 22:00:31 +00:00
c49ca9ce58
Minor cleanups
...
llvm-svn: 5266
2003-01-14 20:32:10 +00:00
cf53bcf8e4
New files
...
llvm-svn: 5260
2003-01-13 01:01:59 +00:00
962d5befb3
* No longer need lowerallocation pass
...
* Add X86 Stackifier pass
* Add peephole optimizer pass
llvm-svn: 5233
2003-01-13 00:51:23 +00:00
c39dc9e648
rename FP -> fp*
...
llvm-svn: 5232
2003-01-13 00:50:46 +00:00
06e07162fc
* Move frame and constant pool indexes to first argument of memory reference
...
so we can put an offset in there as well...
* Fix long/ulong stuff
llvm-svn: 5231
2003-01-13 00:50:33 +00:00
9fe3518dc0
* Some instructions take 64 bit integers, add an Arg type for it
...
* Add flags for different types of FP pseudo instrs
llvm-svn: 5230
2003-01-13 00:49:24 +00:00
5cc425a8e1
* Function calls clobber fp registers
...
* Use new M_TERMINATOR_FLAG flag
* Add ::Void flag on several instructions so def-use info is correct!
* Implement MANY FP instructions
* Finalize pseudo FP instructions
* Add set of Pseudo FP instruction description flags
* Add support for MOVim instrs
* Add support for 64 bit support instrs, like adc sbb, etc
* Add conditional move
llvm-svn: 5229
2003-01-13 00:48:46 +00:00
7878563ff9
Add support for frame and constant pool references
...
llvm-svn: 5228
2003-01-13 00:45:53 +00:00
61e1195e89
Move passes out to Passes.h
...
llvm-svn: 5227
2003-01-13 00:45:29 +00:00
888a8084b6
Add speculation
...
llvm-svn: 5226
2003-01-13 00:35:08 +00:00
956e8379f9
* Implement rudimentary output of the constant pool
...
* Implement support for MRMS?m instructions
* Add Arg64 support
* Add support for frame indexes and constant pool indexes
*
llvm-svn: 5225
2003-01-13 00:35:03 +00:00
d4ba62218e
* Add support for FP registers ST*
...
* Add support for the constant pool & constant pool indices
* Add support for MRMS?m instructions
* Fix FP Prefix emission
* Add support for global addresses and external symbols
llvm-svn: 5224
2003-01-13 00:33:59 +00:00
6c0daf795a
* Adjust to use new interfaces, eliminating CurReg stuff
...
* Support arbitrary FP constants
* Fix bugs in frame layout for function calls and incoming arguments
* Insert copies for constant arguments to PHI nodes into the BOTTOM of
predecessor blocks, not the top.
* Implement _floating point_ support: setcc, return, load, store, cast
* Fix several bugs in the cast instruction
* Abstract out call emission and load/store for FP
* Implement malloc/free without previous lowering pass.
* Make use of new forms of MachineOperand
* Implement _long_ support!
* Fix many bugs in FP support
* Change branch from je/jne to je/jmp
* Simplify code generated for GEP instructions
llvm-svn: 5223
2003-01-13 00:32:26 +00:00
0d5644bb6d
Start renaming MachineInstrInfo -> TargetInstrInfo
...
llvm-svn: 5221
2003-01-13 00:26:36 +00:00
f9781b59ab
More renamings of Target/Machine*Info to Target/Target*Info
...
llvm-svn: 5204
2002-12-29 03:13:05 +00:00
42d59219c7
Rename MachineOptInfo to TargetoptInfo
...
Rename MachineCacheInfo to TargetCacheInfo
llvm-svn: 5203
2002-12-29 02:50:35 +00:00
83d835da2a
Rename MachineOptInfo to TargetoptInfo
...
Rename MachineCacheInfo to TargetCacheInfo
llvm-svn: 5202
2002-12-29 02:50:33 +00:00
26c23467c5
Rename FunctionFrameInfo to MachineFrameInfo
...
llvm-svn: 5201
2002-12-28 21:08:28 +00:00
871e591e34
Rename MachineFrameInfo to TargetFrameInfo.h
...
llvm-svn: 5199
2002-12-28 21:00:25 +00:00
2ca5e23403
Put class in anonymous namespace
...
llvm-svn: 5197
2002-12-28 20:42:56 +00:00
0ccedc254c
Eliminate unneccesary file
...
llvm-svn: 5191
2002-12-28 20:34:47 +00:00
d2577010d5
Capture more information in ctor
...
llvm-svn: 5190
2002-12-28 20:34:18 +00:00
362b26c37e
Implement the TargetFrameInfo interface
...
llvm-svn: 5189
2002-12-28 20:33:52 +00:00
9a81e69439
* Initialize new FrameInfo member
...
* most pass ctors no longer take TM arguments
* New prolog/epilog insertion pass
llvm-svn: 5188
2002-12-28 20:33:32 +00:00
e6fb194716
Changes to match new MRegisterInfo api
...
llvm-svn: 5187
2002-12-28 20:32:54 +00:00
1d79b4ce86
*** Implement frame pointer elimination on X86!
...
* Include contents of X86RegisterClasses.cpp into here
* Adjustments to register api to work with new frame manager
* Eliminate moveImm2Reg, getFramePointer, and getStackPointer
* Cleanup and simplify prolog/epilog code generation
* Prolog/epilog are MUCH more efficient now.
llvm-svn: 5186
2002-12-28 20:32:28 +00:00
9a9739e517
Contents merged with X86RegisterInfo.cpp
...
llvm-svn: 5185
2002-12-28 20:30:15 +00:00
59a20d7b6d
* Remove implementations of previously pure virtual functions that are not any longer.
...
llvm-svn: 5184
2002-12-28 20:29:41 +00:00
365ede3748
* Minor reformatting
...
* Remove some size suffixes [bwl]
* Add new ADJCALLSTACKDOWN & ADJCALLSTACKUP pseudo instrs
* Call instructions are M_CALL not M_BRANCH!
* Disable push and pop instructions
* Add new ANDri32 instr
llvm-svn: 5183
2002-12-28 20:29:14 +00:00
ef5a8f912c
New addFrameReference function
...
llvm-svn: 5182
2002-12-28 20:26:58 +00:00
4937643df9
* Most pass ctor functions don't take TM arguments anymore
...
* New createPrologEpilogCodeInserter() function
llvm-svn: 5181
2002-12-28 20:26:16 +00:00
1520c5ab2a
* Convert to a MachineFunctionPass
...
* Don't take a TM as a ctor parameter
* Print [X - Y] instead of [X + -Y] when possible
llvm-svn: 5180
2002-12-28 20:25:38 +00:00
d24f633394
* Convert to a MachineFunctionPass
...
* ctor doesn't take TM argument
* handle direct ESP references correctly!
llvm-svn: 5179
2002-12-28 20:24:48 +00:00
51553e0700
* Use the new Abstract Frame Manager to handle incoming arguments and
...
fixed size allocas
* Revamp call emission to work with new frame manager
llvm-svn: 5178
2002-12-28 20:24:02 +00:00
d47aac9d4b
* Rename machineFrameInfo to targetFrameInfo
...
* Constant pool and frame info is no longer directly in MachineFunction
llvm-svn: 5177
2002-12-28 20:21:29 +00:00
fe9b705bed
* Rename MachineFrameInfo to TargetFrameInfo
...
* Move some sparc specific code here from Target files
llvm-svn: 5176
2002-12-28 20:20:24 +00:00
b9feac398f
* TargetData is no longer directly accessable from TM
...
* s/unsigned int/unsigned/
llvm-svn: 5175
2002-12-28 20:19:44 +00:00
a41b89a829
* TargetData is no longer directly accessable from TargetMachine
...
* Constpool & frame info is no longer directly in MachineFunction
llvm-svn: 5174
2002-12-28 20:18:21 +00:00
525e3af36c
* Frame & const pool info is no longer directly in MachineFunction
...
llvm-svn: 5173
2002-12-28 20:17:43 +00:00
d2a67df791
* Changes to be a MachineFunctionPass
...
* Frame information is now stuck in MachineFunctionInfo instead of directly
in MachineFunction.
* Don't require a TM as an argument to the ctor
llvm-svn: 5172
2002-12-28 20:16:08 +00:00
4d84d49f75
* Don't access TargetData directly
...
* Changes because frame info is not in MachineFunction directly anymore
llvm-svn: 5171
2002-12-28 20:15:01 +00:00
a76f456a60
* Simplify Value classes
...
* Add initial support for FP constants
* Add initial FP support for several instructions
llvm-svn: 5154
2002-12-25 05:13:53 +00:00
6ecc6a72c9
* Use new pseudo instr form for instructions
...
* Mark CALLpcrel as a RawFrm instruction as required
* Eliminate invalid BSWAP16 instruction
* Add xchg instructions
* Add initial support for FP instructions
llvm-svn: 5153
2002-12-25 05:11:46 +00:00
e98ca19112
Add FP instr prefix byte support
...
Add Pseudo instr class
llvm-svn: 5152
2002-12-25 05:09:59 +00:00
36703cd02a
Add support for FP prefixes
...
llvm-svn: 5151
2002-12-25 05:09:21 +00:00
7c10f4f5d4
Add printer support for Pseudo instructions
...
llvm-svn: 5150
2002-12-25 05:09:01 +00:00
c9f3bbb5d2
Initial support for FP registers
...
llvm-svn: 5149
2002-12-25 05:08:03 +00:00
dafa31658f
New simpler spill interface
...
llvm-svn: 5148
2002-12-25 05:07:09 +00:00
4997a840bc
Adjustments to match new simpler spill interface
...
llvm-svn: 5147
2002-12-25 05:06:43 +00:00
55aaff5590
Free machine code
...
llvm-svn: 5146
2002-12-25 05:06:21 +00:00
a32b4055be
Changes to allow for a configurable target machine that allows big endian and/or long pointer operation
...
llvm-svn: 5131
2002-12-24 00:04:01 +00:00
cfcd0603d0
Changes to compile with GCC 2.96
...
Changes to support configurable pointer size and endianness
llvm-svn: 5130
2002-12-24 00:03:11 +00:00
ccc2c7e8a7
Sparc is not little endian
...
llvm-svn: 5129
2002-12-24 00:02:38 +00:00
d8201972bf
Fix compilation on gcc 2.96
...
llvm-svn: 5116
2002-12-23 23:46:55 +00:00
871abd8187
Add definition for the bswap instruction
...
*** FIX: the encoding of the SUB instruction
llvm-svn: 5115
2002-12-23 23:46:31 +00:00
e218f7924c
Add support for the bswap instruction
...
llvm-svn: 5114
2002-12-23 23:46:00 +00:00
6e7c821dc0
Fix warning
...
llvm-svn: 5109
2002-12-20 04:13:28 +00:00
5526b21e93
CBW doesn't modify AL
...
llvm-svn: 5108
2002-12-20 04:13:11 +00:00
67e555d1ec
fix warning
...
llvm-svn: 5107
2002-12-20 04:12:48 +00:00
b437b7de1a
Don't force setCC instructions into AL
...
llvm-svn: 5104
2002-12-18 01:44:31 +00:00
b54343a64f
Add comments, switch uses/defs to match InstrInfo.def file
...
llvm-svn: 5102
2002-12-18 01:05:54 +00:00
fc9af85395
Add reg clobber list for direct calls
...
Represent empty use/def list as a null pointer
llvm-svn: 5101
2002-12-18 01:05:31 +00:00
4cb8af96b3
Update to use new interface for register info
...
llvm-svn: 5098
2002-12-17 04:19:17 +00:00
0eece84186
New file
...
llvm-svn: 5097
2002-12-17 04:03:08 +00:00
eaf58b03b2
Round number of bytes allocated on the stack up to a multiple of 4 so that the
...
stack remains aligned
llvm-svn: 5095
2002-12-17 03:15:26 +00:00
d9c6f2a6d3
Local register allocator is now stable enough for use, it passes all tests
...
llvm-svn: 5094
2002-12-17 02:51:15 +00:00
5afbc4c387
Register allocator is responsible for spilling callee saved regs
...
llvm-svn: 5092
2002-12-17 02:48:57 +00:00
2e6f17f136
Build add instructions of the correct form!
...
llvm-svn: 5090
2002-12-16 23:36:57 +00:00
e92fb346d3
Two fixes:
...
* Only load incoming arguments into virtual registers once at the
beginning of the function
* Assign different virtual registers to each reference to constants/globals
llvm-svn: 5088
2002-12-16 22:54:46 +00:00
c87fcde854
Fix prolog/epilog in the presence of alloca
...
llvm-svn: 5087
2002-12-16 22:29:30 +00:00
e92f1bb011
Make sure stack manipulation refers to ESP the right number of times
...
llvm-svn: 5086
2002-12-16 22:29:06 +00:00
5c59014a1b
Add some special cases to make common getelementptr cases easier to read/faster
...
llvm-svn: 5084
2002-12-16 19:32:50 +00:00
6b5ca53493
Finish implementation of alias list impl
...
llvm-svn: 5083
2002-12-16 19:31:48 +00:00
e0c25aaf99
Add mechanism to select register allocator to use
...
llvm-svn: 5079
2002-12-16 16:15:51 +00:00
d44d25323d
Try #2 to get alias set stuff to work
...
llvm-svn: 5077
2002-12-16 16:14:51 +00:00
9b83781030
Add comments
...
llvm-svn: 5076
2002-12-16 15:57:44 +00:00
36d6f4a303
Add info about register aliases, add prototype for createLocalRegisterAllocator
...
llvm-svn: 5075
2002-12-16 15:55:51 +00:00
4cf76c23e8
Add info about register file aliasing
...
llvm-svn: 5074
2002-12-16 15:55:25 +00:00
855b784523
Add information about register file aliasing
...
llvm-svn: 5073
2002-12-16 15:54:59 +00:00
e5bbc24516
Add call clobber info
...
llvm-svn: 5072
2002-12-16 15:54:42 +00:00
0b9f0b5faf
Rename createSimpleX86RegisterAllocator to createSimpleRegisterAllocator
...
llvm-svn: 5071
2002-12-16 14:38:13 +00:00
6ebe959530
brg
...
Fix some bugs in use of MBB vs. BB and iterators that are invalidated before
we use them.
Reference targetClass by enum name, not by number.
llvm-svn: 5069
2002-12-16 04:23:29 +00:00
3c1b59ca59
Correct the setting of Def flags on registers that are modified!
...
llvm-svn: 5065
2002-12-15 22:38:47 +00:00
d06650ade1
Give passes nice names!
...
llvm-svn: 5059
2002-12-15 21:13:40 +00:00
e2533336f5
Simplify interfaces used by regalloc to insert code
...
llvm-svn: 5052
2002-12-15 20:06:35 +00:00
094fd5e758
Changes to make new TargetRegisterClass interface.
...
llvm-svn: 5050
2002-12-15 19:29:34 +00:00
0d1447d64a
* Simplify TargetRegisterClass implementations
...
* Change regclass iterators to use an extra level of pointers
llvm-svn: 5047
2002-12-15 18:40:36 +00:00
3263e5787f
Add support to cast from a bool type
...
Add support for boolean constants
add getClassB method
llvm-svn: 5034
2002-12-15 08:02:15 +00:00
ce35108606
Use MachineOperand::isFoo methods instead of our own global functions
...
llvm-svn: 5033
2002-12-15 08:01:39 +00:00
c4eb1ed23c
Implement indirect function calls
...
llvm-svn: 5024
2002-12-13 14:13:27 +00:00
ca8eb8af18
Make function code generation printing debug-only.
...
llvm-svn: 5023
2002-12-13 13:16:14 +00:00
a1cf9a7c0a
Fix bork in doMultiply
...
llvm-svn: 5021
2002-12-13 13:07:42 +00:00
f1874b0677
Add sanity checks
...
llvm-svn: 5020
2002-12-13 13:04:04 +00:00
3374ec7c1b
Cleaned up the code: factored out switch/case into a separate function, put
...
constants in an array for quick lookup. Stole the idea from elsewhere in
Jello.
llvm-svn: 5017
2002-12-13 12:00:06 +00:00
d4c5013c04
Insert phi code at top of block
...
llvm-svn: 5015
2002-12-13 11:52:34 +00:00
61edd534b4
lib/Target/X86/InstSelectSimple.cpp:
...
The MachineBasicBlock variable name patrol hereby fines Chris Lattner
one bag of nachos, for shadowing global names while his license to do so
was under suspension.
llvm-svn: 5014
2002-12-13 11:39:18 +00:00
0a37046358
Implement cast bool to X
...
llvm-svn: 5012
2002-12-13 11:31:59 +00:00
85b78b7372
Rename all BMI MachineBasicBlock operands to MBB.
...
Try to mess around with emitGEPOperation's elementSizeReg to make it work,
again.
llvm-svn: 5011
2002-12-13 11:22:48 +00:00
825be9ad5d
Finish up iterator stuph
...
llvm-svn: 5009
2002-12-13 10:50:40 +00:00
121ae7d3a7
Treat longs as ints => pretend they're all 32-bit values and squeeze them into
...
32-bit registers.
llvm-svn: 5008
2002-12-13 10:43:09 +00:00
e189edf272
Code gen phi's correctly
...
llvm-svn: 5004
2002-12-13 10:09:43 +00:00
2889d2e50c
Print X86 PHI nodes in a sane manner
...
llvm-svn: 5003
2002-12-13 09:59:26 +00:00
78401cbb3c
Added moveReg2Reg() and moveImm2Reg() to accomodate moving data around due to
...
PHI nodes.
llvm-svn: 5001
2002-12-13 09:54:12 +00:00
eaeacc5872
lib/Target/X86/InstSelectSimple.cpp: Start counting arguments with 2,
...
because arguments start two stack slots off of EBP. Break out of the
for loop once the argument is found. Increment the counter at the end
of the loop instead of the beginning. Use addRegOffset and compute
the scale * index part at compile time instead of using the fancy
load instruction. Just because an instruction set has wacky addressing
modes doesn't mean we ought to use them (at least, if you believe Dave
Patterson).
lib/Target/X86/X86InstrBuilder.h: Add some comments.
test/Regression/Jello/test-loadstore.ll: Let main return int 0.
llvm-svn: 4999
2002-12-13 09:28:50 +00:00
44876fdee4
InstSelectSimple.cpp: Give promote32 a comment. Add initial
...
implementation of getReg() for arguments.
MachineCodeEmitter.cpp: Fix using EBP with index, scale and no
displacement (whew!) due to Chris.
Printer.cpp: Fix printing out index and scale in memory references.
llvm-svn: 4998
2002-12-13 07:56:18 +00:00
179519bf77
Implement getelementptr constant exprs
...
Implement ConstantPointerRefs
Treat long/ulongs as if they were integers. A hack, but an effective one
llvm-svn: 4995
2002-12-13 06:56:29 +00:00
4e2c30d894
brg
...
InstSelectSimple.cpp: Add stub implementation of visitFreeInst.
Add comments that mention how we are failing to implement malloc/free.
Add initial implementation of visitAllocaInst.
X86TargetMachine.cpp: Include llvm/Transforms/Scalar.h.
Add LowerAllocations pass before instruction selection.
jello/Makefile: Add scalaropts.a.
llvm-svn: 4994
2002-12-13 06:46:31 +00:00
e791322602
Emit the right form of mod/rm mod field
...
llvm-svn: 4986
2002-12-13 05:05:05 +00:00
e600a4ebe8
Nicify a bit
...
llvm-svn: 4985
2002-12-13 05:04:37 +00:00
82f1580ee8
Fix encoding of CBW instruction
...
llvm-svn: 4983
2002-12-13 04:41:31 +00:00
862f3ef8bc
Moves now select correct opcode based on the data size.
...
llvm-svn: 4981
2002-12-13 04:24:53 +00:00
1176170c16
Remove extranous #include
...
llvm-svn: 4980
2002-12-13 04:12:24 +00:00
ec0bc92146
Rename MemArg* to Arg*
...
llvm-svn: 4979
2002-12-13 03:51:55 +00:00
343e4b1810
Make mem size an assert
...
Add mem size flags to all instructions using an imm
llvm-svn: 4978
2002-12-13 03:50:13 +00:00
2ef75daf78
This is supposed to provide correct size for datatypes. Supposedly.
...
llvm-svn: 4977
2002-12-13 02:13:15 +00:00
7b21678aed
Added the flag to mark instructions which are really 2-address instructions in
...
X86, but would be 3-address in any normail architecture.
llvm-svn: 4974
2002-12-12 23:19:11 +00:00
5e91d38ecb
This checkin is brought to you by the brian gaeke allnighter fund.
...
(lib/Target/X86) InstSelectSimple.cpp:
Include llvm/DerivedTypes.h and iostream.
Refactor visitMul out into a wrapper around doMultiply(), so that we
can do multiplications on temporary values when we are doing
getelementptrs.
Refactor part of getReg out into makeAnotherReg, so that we can create
registers willy-nilly to hold temporary values, when we are doing
getelementptrs.
Add stub implementations of visitMallocInst and visitAllocaInst.
Add initial implementation of visitGetElementPtrInst.
In copyConstantToRegister:
We throw a *lot* of our asserts here. So, when we want to throw an
assert, print out to stderr whatever expr or whatever constant made
us barf.
Support copying ConstantPointerNull to register, using a move immediate
of zero.
Rename FLDr4 and FLDr8 to FLDr32 and FLDr64, so that they match the meanings
of the numbers in the other instruction names. All uses modified.
Teach visitCallInst to extract byte- and short-class return values
from subregs of EAX. Add a FIXME note about how we would do it for
float-class return values.
Add a FIXME note about how we would cast float to int and back.
X86InstrInfo.def:
Rename FLDr4 and FLDr8 to FLDr32 and FLDr64, so that they match the meanings
of the numbers in the other instruction names. All uses modified.
(tools/jello) GlobalVars.cpp:
Include iostream.
If we have to emit a floating-point constant to memory, gamble and use
the same method as for ints.
If we have to emit a ConstantPointerNull to memory, try using a "void *"
and "NULL".
Otherwise, if we are going to throw an assert, print out whatever constant
made us barf, first.
llvm-svn: 4973
2002-12-12 15:33:40 +00:00
9cf5718665
Implement a lot of cast functionality (no FP or 64)
...
llvm-svn: 4944
2002-12-06 10:49:33 +00:00
a4a10fe88b
Target/X86/Printer.cpp: Add sizePtr function, and use it instead of
...
" <SIZE> PTR " string when emitting assembly.
Target/X86/X86InstrInfo.def: Tidy up a bit:
Squashed everything down to 118 chars wide, wrapping lines so that
comment is at the same point on each line. Rename "NoImpRegs" as
"NoIR". (most instructions have NoImpRegs twice on a line, so this
saves 10 columns).
Also, annotate various instructions with flags for size of memory operand.
(MemArg16, MemArg32, MemArg64, etc.)
Target/X86/X86InstrInfo.h: Define flags for size of memory operand.
(MemArg16, MemArg32, MemArg64, etc.)
llvm-svn: 4932
2002-12-05 08:30:40 +00:00
83e62f14dd
Implemented functions for emitting prologues and epilogues;
...
removed EBP from the list of callee-saved registers (it isn't one).
llvm-svn: 4929
2002-12-04 23:57:03 +00:00
ab2ffedb38
Added push and pop instructions.
...
llvm-svn: 4928
2002-12-04 23:56:26 +00:00
e21336000b
Fix handling of function calls that return void
...
llvm-svn: 4925
2002-12-04 23:50:28 +00:00
4859c65d48
Implement initial support for return values from call instructions
...
llvm-svn: 4924
2002-12-04 23:45:28 +00:00
81c7a3a84c
Adjust the stack pointer after a function call, proportional to the number of
...
arguments pushed onto the stack.
llvm-svn: 4922
2002-12-04 19:22:53 +00:00
dfa9cfa67f
Added instructions to add/subtract imm32 to/from a reg32.
...
llvm-svn: 4921
2002-12-04 19:15:22 +00:00
fb8032dc84
Fix bogus assertion failures
...
llvm-svn: 4919
2002-12-04 17:32:52 +00:00
8d79e5c9d9
Avoid bad assertion
...
llvm-svn: 4918
2002-12-04 17:28:40 +00:00
82cc643401
Remove think-o assertion
...
llvm-svn: 4917
2002-12-04 17:18:30 +00:00
ccf17c6564
Avoid crashing on Arguments, just silently miscompile
...
llvm-svn: 4916
2002-12-04 17:15:34 +00:00
1af9bebcda
storeReg2RegOffset() and loadRegOffset2Reg() now take the iterator by value
...
instead of by reference, since they return the modified iterator.
llvm-svn: 4914
2002-12-04 17:14:13 +00:00
0d28502c32
Moved buildReg2RegClassMap() into from X86RegisterInfo to MRegisterInfo, since
...
it is target-independent.
llvm-svn: 4911
2002-12-04 16:47:04 +00:00
7b1ec5ed3a
Add a "Lazy Function Resolution in Jello" section
...
Remove some todo's
llvm-svn: 4910
2002-12-04 16:12:54 +00:00
bc98081090
Fix a bug I introduced in a previous change
...
llvm-svn: 4909
2002-12-04 06:56:56 +00:00
6425a502a6
Add support for referencing global variables/functions
...
llvm-svn: 4907
2002-12-04 06:45:19 +00:00
d9522256d3
Added support for callee- and caller-save registers.
...
llvm-svn: 4897
2002-12-03 23:11:21 +00:00
64261741c7
Fix broken ret opcode, grr...
...
llvm-svn: 4895
2002-12-03 22:50:02 +00:00
645b7548bf
Fix instsel for calls
...
llvm-svn: 4891
2002-12-03 20:30:12 +00:00
6a0874071b
Fix the build
...
llvm-svn: 4884
2002-12-03 18:15:59 +00:00
b676857358
brg
...
Add support for cast ... to bool in visitCastInst (it's a start, anyways...)
llvm-svn: 4883
2002-12-03 07:36:03 +00:00
8052f8006b
Split the machine code emitter completely out of the printer
...
llvm-svn: 4882
2002-12-03 06:34:06 +00:00
0d80874f6c
* Move information about Implicit Defs/Uses into X86InstrInfo.def.
...
* Expose information about implicit defs/uses of register through the
MachineInstrInfo.h file.
llvm-svn: 4877
2002-12-03 05:42:53 +00:00
c6d6d62c8e
Initialize implicit uses/defs fields for sparc backend to empty list
...
llvm-svn: 4876
2002-12-03 05:41:54 +00:00
5485c079d1
brg
...
X86Implicit.cpp, X86Implicit.h: New files.
InstSelectSimple.cpp: Add some clarifications in visitCallInst comments.
llvm-svn: 4874
2002-12-03 00:51:09 +00:00
15fbd61664
More support for machine code emission: raw instructions
...
llvm-svn: 4872
2002-12-02 21:56:18 +00:00
1207ccdbc1
Expose explicit type
...
llvm-svn: 4871
2002-12-02 21:50:41 +00:00
db31bbad6b
Start implementing MachineCodeEmitter
...
llvm-svn: 4870
2002-12-02 21:44:34 +00:00
58743b9f78
Eliminate OtherFrm
...
llvm-svn: 4868
2002-12-02 21:40:58 +00:00
d5823603fa
Remove comment
...
Remove handling of OtherFrm
llvm-svn: 4867
2002-12-02 21:40:46 +00:00
787a9de685
Initial support for machine code emission
...
llvm-svn: 4866
2002-12-02 21:24:12 +00:00
aa15563510
Fix order of operands on a store from reg to [reg+offset].
...
llvm-svn: 4857
2002-12-02 21:10:35 +00:00
08cd1edaa9
Add rawfrm flags
...
llvm-svn: 4841
2002-12-01 23:25:59 +00:00
7dcb1436da
Don't add implicit regs
...
llvm-svn: 4840
2002-12-01 23:24:58 +00:00
2ad3501d3f
brg
...
InstSelectSimple.cpp: Refactor out conversion of byte, short -> int
from visitReturnInst() to new method, promote32().
Use it in both visitReturnInst() and visitCallInst().
llvm-svn: 4839
2002-11-30 11:57:28 +00:00
23953e0f8a
brg
...
InstSelectSimple.cpp: First draft of visitCallInst method, handling
int/float args.
X86InstrInfo.def: Add entries for CALL with 32-bit pc relative arg, and
PUSH with 32-bit reg arg.
llvm-svn: 4838
2002-11-29 12:01:58 +00:00
4ba2cb110a
brg
...
InstSelectSimple.cpp: Add some comments that say what I'm going to do for
calls and casts.
llvm-svn: 4832
2002-11-26 10:43:30 +00:00
5014e38273
Oops. Got the MOVrm and MOVmr mixed up. Fixed. We can now print out
...
instructions correctly.
llvm-svn: 4830
2002-11-22 23:15:27 +00:00
55cf6bfae4
Enable the register allocator pass.
...
llvm-svn: 4829
2002-11-22 22:45:07 +00:00
bde217d7a9
Added methods to read/write values to stack in .h, fixed implementation in
...
.cpp to return the iterator correctly.
llvm-svn: 4827
2002-11-22 22:43:47 +00:00
1a72c637fb
Added -*- C++ -*- mode to the comments.
...
llvm-svn: 4826
2002-11-22 22:42:50 +00:00
4ea94a4be0
Add a simple way to add memory locations of format [reg+offset]
...
llvm-svn: 4825
2002-11-22 22:42:12 +00:00
aa91eae6af
lib/Target/X86/InstSelectSimple.cpp: Add visitCallInst, visitCastInst.
...
llvm-svn: 4821
2002-11-22 11:07:01 +00:00
e5330c4adf
Handle cmp Reg, 0 correctly
...
llvm-svn: 4819
2002-11-21 23:30:00 +00:00
f435afc268
Printing support for more stuff
...
llvm-svn: 4818
2002-11-21 22:49:46 +00:00
174a94007d
Don't add implicit operands
...
llvm-svn: 4817
2002-11-21 22:49:20 +00:00
b35341ee25
Fix off by one bug
...
llvm-svn: 4816
2002-11-21 22:48:15 +00:00
af7bd2c6b5
Add fixme
...
llvm-svn: 4815
2002-11-21 22:48:01 +00:00
1c80d37765
Minor code cleanups
...
llvm-svn: 4814
2002-11-21 21:04:50 +00:00
4fbd8a2f78
Implement printing of store instructions
...
llvm-svn: 4813
2002-11-21 21:03:39 +00:00
61fafd35f5
The big change here is to handle printing/emission of X86II::MRMSrcMem
...
instructions. Right now the only users are load instructions, and Misha's
spill code
llvm-svn: 4812
2002-11-21 20:44:15 +00:00
cf7c225e06
Remove implicit information from instruction selector
...
llvm-svn: 4811
2002-11-21 18:54:29 +00:00
e8885d949a
Add printing information for MUL and DIV
...
llvm-svn: 4810
2002-11-21 18:54:14 +00:00
5e50475adb
Fix a bug that prevented compilation of multiple functions
...
llvm-svn: 4809
2002-11-21 17:26:58 +00:00
7939ecc8eb
Remove opcode information for instructions that are completely defined now
...
llvm-svn: 4805
2002-11-21 17:12:55 +00:00
1f9530508b
Add printing support for sahf & setcc
...
llvm-svn: 4804
2002-11-21 17:10:57 +00:00
c868841ad6
Add printing support for /0 /1 type instructions
...
llvm-svn: 4803
2002-11-21 17:09:01 +00:00
a6eb52fcf7
Add support for /0 /1, etc type instructions
...
llvm-svn: 4802
2002-11-21 17:08:49 +00:00
41e2d4cdcf
Rename the SetCC X86 instructions to reflect the fact that they are the
...
register versions
llvm-svn: 4800
2002-11-21 16:19:42 +00:00
45ddd59da5
Simplify setcc code a bit
...
llvm-svn: 4799
2002-11-21 15:52:38 +00:00
177e928a46
Support Registers of the form (B8+ rd) for example
...
llvm-svn: 4798
2002-11-21 02:00:20 +00:00
3a3ac9d225
Dont' set flags
...
llvm-svn: 4797
2002-11-21 01:59:50 +00:00
6985c19b61
Implement printing more, implement opcode output more
...
llvm-svn: 4796
2002-11-21 01:33:44 +00:00
dfbfd81217
Huge diff do to reindeinting comments.
...
Basically just adds OpSize flags for instructions that need them.
llvm-svn: 4795
2002-11-21 01:33:28 +00:00
c48d0fa9a2
Add new prefix flag
...
llvm-svn: 4794
2002-11-21 01:32:55 +00:00
f03132f014
Print another class of instructions correctly, giving us: xorl EDX, EDX
...
for example.
llvm-svn: 4793
2002-11-21 00:30:01 +00:00
95e6287734
Booleans are types too. And they get stored in bytes. And InstructionSelection
...
doesn't assert fail. And everyone's happy. Yay!
llvm-svn: 4792
2002-11-21 00:25:56 +00:00
c4841a7738
X86 target builds fine now
...
llvm-svn: 4786
2002-11-20 20:17:03 +00:00
53d2de923a
Add definitions for function headers from MRegisterInfo.h:
...
Some functions are in X86RegisterInfo.cpp, others, because of the data they
need, are in X86RegisterClasses.cpp, which also defines some register classes:
byte, short, and int.
llvm-svn: 4784
2002-11-20 18:59:43 +00:00
6e5d493e0f
Check not only for MO_VirtualRegister, but MO_MachineRegister as well when
...
printing out assembly. After all, we want the real thing too.
llvm-svn: 4783
2002-11-20 18:56:41 +00:00
55d5f15a40
Don't build X86 target yet
...
llvm-svn: 4780
2002-11-20 18:37:37 +00:00
eaaceb1210
Add mapping in MachineFunction from SSA regs to Register Classes. Also,
...
uncovered a bug where registers were not being put in a map if they were not
found...
llvm-svn: 4776
2002-11-20 00:58:23 +00:00
ade1143692
Sigh. Fixed some speling.
...
llvm-svn: 4775
2002-11-20 00:56:42 +00:00
310afc5f8c
Thanks to the R8, R16, and R32 macros, I can now deal with registers that
...
belong to different register classes easier.
llvm-svn: 4773
2002-11-20 00:47:40 +00:00
a648bc6674
Brian Gaeke says:
...
lib/Target/X86/InstSelectSimple.cpp: Add a little something to
visitBranchInst which supports conditional branches.
lib/Target/X86/X86InstrInfo.def: Add defs of JNE, JE, CMPri8
llvm-svn: 4755
2002-11-19 09:08:47 +00:00
5812f06b30
Start trying to print instructions more correctly. For now we also print out the opcode for each instruction as well.
...
llvm-svn: 4743
2002-11-18 06:56:51 +00:00
cf72e52df3
Expose base opcode
...
llvm-svn: 4742
2002-11-18 06:56:24 +00:00
0018e8d5fc
Start to add more information to instr.def
...
llvm-svn: 4741
2002-11-18 05:37:11 +00:00
f2e00c62ab
Add instruction annotation about whether it has a 0x0F opcode prefix
...
llvm-svn: 4740
2002-11-18 01:59:28 +00:00
c6f7457e90
Add more void flags
...
llvm-svn: 4739
2002-11-18 01:37:48 +00:00
dbdacac022
Set the void flag on instructions that should get it
...
llvm-svn: 4738
2002-11-18 01:34:36 +00:00
63d8375f80
Pass on a targetmachine
...
llvm-svn: 4736
2002-11-17 23:22:03 +00:00
5fd53046b0
Arrange to have a TargetMachine available in X86InstrInfo::print
...
llvm-svn: 4734
2002-11-17 23:20:37 +00:00
b79ccae887
Wow, I'm incapable of the simplest things today...
...
llvm-svn: 4732
2002-11-17 23:05:21 +00:00
afce16dec8
Rename registers to follow the intel style of all caps
...
llvm-svn: 4731
2002-11-17 23:03:46 +00:00
5961102d31
Fix misleading indentation
...
llvm-svn: 4730
2002-11-17 22:57:23 +00:00
9289d7d693
Reorganize printing interface a bit
...
llvm-svn: 4728
2002-11-17 22:53:13 +00:00
8693803b48
Add default implementation of printing interface
...
llvm-svn: 4727
2002-11-17 22:53:03 +00:00
64c3bb99ed
Fix minor detail
...
llvm-svn: 4725
2002-11-17 22:33:26 +00:00
cb57e5ca17
Fix Mul/Div clobbers
...
llvm-svn: 4718
2002-11-17 21:56:38 +00:00
ecdb49d74a
Fix a few typos, implement load/store
...
llvm-svn: 4716
2002-11-17 21:11:55 +00:00
c682b4a9ab
Add functions to buld X86 specific constructs
...
llvm-svn: 4714
2002-11-17 21:03:35 +00:00
6fd0ef303d
Add information about memory index representation
...
llvm-svn: 4712
2002-11-17 20:33:26 +00:00
e86f98e06c
Add load/store instructions
...
llvm-svn: 4711
2002-11-17 20:33:12 +00:00
09fddd97fb
Switch visitRet to use getClass()
...
llvm-svn: 4710
2002-11-17 20:07:45 +00:00
e74543584a
include/llvm/CodeGen/MachineInstrBuilder.h: Add addClobber() inline
...
convenience method. Fix typo in comment.
lib/Target/X86/InstSelectSimple.cpp: Explicitly specify some implicit uses.
Use MOVZX/MOVSX instead of MOV instructions with sign extend instructions.
Take out LEAVE instructions.
32-bit IDIV and DIV use CDQ, not CWQ (CWQ is a typo).
Fix typo in comment and remove some FIXME comments.
lib/Target/X86/Printer.cpp: Include X86InstrInfo.h and llvm/Function.h.
Add some simple code to Printer::runOnFunction to iterate over
MachineBasicBlocks and call X86InstrInfo::print().
lib/Target/X86/X86InstrInfo.def: Make some more instructions with
implicit defs "Void". Add more sign/zero extending "move" insns
(movsx, movzx).
lib/Target/X86/X86RegisterInfo.def: Add EFLAGS as a register.
llvm-svn: 4707
2002-11-14 22:32:30 +00:00
b2687880e2
InstSelectSimple.cpp: (visitReturnInst) Add return instructions with return
...
values.
X86InstrInfo.def: add LEAVE instruction.
llvm-svn: 4691
2002-11-11 19:37:09 +00:00
9cbe229704
Add instruction selection code and tests for setcc instructions
...
llvm-svn: 4603
2002-11-07 17:59:21 +00:00
a281003e5e
Remove a nasty little semi-colon someone introduced which
...
prevented any machine instrs from being printed!
llvm-svn: 4557
2002-11-06 00:34:26 +00:00
781986c436
Implement signed and unsigned division and remainder
...
llvm-svn: 4508
2002-11-02 20:54:46 +00:00
d12e1bc777
Implement multiply operator
...
llvm-svn: 4506
2002-11-02 20:28:58 +00:00
e823fb32f4
* Implement subtract
...
* Merge add code into logical code
llvm-svn: 4503
2002-11-02 20:13:22 +00:00
dd873d2179
shuffle code around a bit, implement and, or, xor
...
llvm-svn: 4502
2002-11-02 20:04:26 +00:00
abe3280ad9
Add PHI node support, add comment for branch function
...
llvm-svn: 4500
2002-11-02 19:45:49 +00:00
16af2d5aa8
Implement unconditional branching support
...
llvm-svn: 4498
2002-11-02 19:27:56 +00:00
cfb187f6bb
* Fix nonconstant shift case
...
* Turn table into 2d table
llvm-svn: 4496
2002-11-02 01:41:55 +00:00
ff3d28f403
Use a more table driven approach to handling types. Seems to simplify the
...
code a bit
llvm-svn: 4493
2002-11-02 01:15:18 +00:00
63f4e752cd
Make switch statements denser, but only because of the follow-on patch
...
llvm-svn: 4492
2002-11-02 00:49:56 +00:00
122b73b7a6
* Remove dead variable
...
* Shift amount is always guaranteed to be 8 bits
llvm-svn: 4491
2002-11-02 00:44:25 +00:00
6e2d676829
InstSelectSimple.cpp: Include llvm/iOther.h for ShiftInst.
...
Add ISel::visitShiftInst() to instruction select shift instructions.
Add a comment in visitAdd about how to do 64 bit adds.
X86InstrInfo.def: Add register-to-register move opcodes and shift opcodes.
llvm-svn: 4477
2002-10-31 23:03:59 +00:00
8cdd50d177
Reassociate pass now works
...
llvm-svn: 4473
2002-10-31 17:16:18 +00:00
9f205ddfdd
In getID(), don't call getValidSymbolName to mangle external names!
...
llvm-svn: 4451
2002-10-30 20:16:38 +00:00
6c34c0baf5
Add lots more info
...
llvm-svn: 4450
2002-10-30 06:04:46 +00:00
c9e1efd0f8
Make sure to set the destination register correctly
...
llvm-svn: 4444
2002-10-30 01:49:01 +00:00
87b84a6913
Set the destination register field based on the target specific flags
...
llvm-svn: 4442
2002-10-30 01:15:31 +00:00
60c59d5b4e
Add flag to specify when no value is produced by an instruction
...
llvm-svn: 4441
2002-10-30 01:09:34 +00:00
c1d7563566
Sparc backend doesn't use target specific flags yet
...
llvm-svn: 4440
2002-10-30 01:07:12 +00:00
858a4a6595
Implement the new optional getRegisterInfo
...
llvm-svn: 4437
2002-10-30 00:56:18 +00:00
d7a855668d
Print machine code after instruction selection
...
llvm-svn: 4434
2002-10-30 00:47:49 +00:00
e3ceb17d54
Make sure to pass the LLVM basic block in
...
llvm-svn: 4433
2002-10-30 00:47:40 +00:00
7ee171b717
Construct annotation, to make sure it's attached to function
...
llvm-svn: 4429
2002-10-29 23:40:58 +00:00
02a3d837c2
Convert backend to use passes, implement X86TargetMachine
...
llvm-svn: 4421
2002-10-29 22:37:54 +00:00
e2ac271173
These are no longer virtual methods
...
llvm-svn: 4420
2002-10-29 22:01:44 +00:00
b848956370
* Privatize the TargetName
...
* Move optSizeForSubWordData to TargetData
* Remove unused fields
llvm-svn: 4417
2002-10-29 21:48:17 +00:00
abd7fdcb99
Implement findOptimalStorageSize a bit more generally
...
llvm-svn: 4416
2002-10-29 21:47:50 +00:00
5667f0eefd
Allow TargetMachine to refuse static code gen
...
llvm-svn: 4415
2002-10-29 21:12:46 +00:00
27d247978b
Rename X86InstructionInfo to X86InstrInfo
...
llvm-svn: 4413
2002-10-29 21:05:24 +00:00
f57420ee17
Minor renaming
...
llvm-svn: 4410
2002-10-29 20:48:56 +00:00
69127c68ed
Remove unneccesary #includes
...
llvm-svn: 4408
2002-10-29 20:47:46 +00:00
71b6d491db
Rename Sparc.h to TargetMachineImpls.h
...
llvm-svn: 4407
2002-10-29 20:47:26 +00:00
ec1dcd0849
Reenable X86 backend, even though it doesn't do much, at least it compiles
...
llvm-svn: 4404
2002-10-29 20:29:34 +00:00
ea0d174f1a
Bug fix: align size for dynamic allocas according to stack pointer
...
alignment restrictions. This is incomplete for one case.
llvm-svn: 4397
2002-10-29 19:37:31 +00:00
2990e9b6cd
Switch to generating machineinstr's instead of MInstructions
...
llvm-svn: 4396
2002-10-29 17:43:55 +00:00
6c3f9c1b8f
Be compatible with sparc backend
...
llvm-svn: 4395
2002-10-29 17:43:38 +00:00
16cbd41c21
Implement MachineInstrInfo interface
...
llvm-svn: 4394
2002-10-29 17:43:19 +00:00
f4b122dbc5
Switch to different flag set
...
llvm-svn: 4393
2002-10-29 17:42:40 +00:00
268d600a88
Move TargetInstrDescriptors to MachineInstrInfo.cpp
...
llvm-svn: 4391
2002-10-29 17:37:48 +00:00
52ce69b8e2
*** empty log message ***
...
llvm-svn: 4390
2002-10-29 17:35:41 +00:00
01efae0bbf
MachineInstrInfo doesn't need a TargetMachine
...
llvm-svn: 4372
2002-10-29 15:45:20 +00:00
5cbb8183d6
Don't build X86 target until it builds properly again
...
llvm-svn: 4369
2002-10-28 23:56:41 +00:00
910b82f042
Seperate code out of TargetMachine into MachineInstrInfo
...
llvm-svn: 4368
2002-10-28 23:55:33 +00:00
1303f2f057
Initial stab at MachineInstr'ication
...
llvm-svn: 4367
2002-10-28 23:55:19 +00:00
cbe6385890
Use BuildMI instead of explicit code.
...
llvm-svn: 4362
2002-10-28 21:43:57 +00:00
5c7d638208
Remove all traces of the "Opcode Mask" field in the MachineInstr class
...
llvm-svn: 4359
2002-10-28 21:17:20 +00:00
3d736950ea
Fix minor bug
...
llvm-svn: 4355
2002-10-28 20:11:17 +00:00
9bebf832c8
Don't pass default args
...
llvm-svn: 4354
2002-10-28 20:10:56 +00:00
d5b45791a4
Fixed spelling and grammar.
...
llvm-svn: 4353
2002-10-28 20:01:52 +00:00
181ea4a265
Rewrote uses of deprecated `MachineFunction::get(BasicBlock *BB)'.
...
llvm-svn: 4352
2002-10-28 20:01:13 +00:00
6be5e92526
Replaced uses of deprecated `MachineFunction::get(BasicBlock *BB)'.
...
llvm-svn: 4351
2002-10-28 20:00:31 +00:00
780090bbf1
Don't bother passing in default value
...
llvm-svn: 4347
2002-10-28 19:46:25 +00:00
e3aa50d6b7
Fixes to work with updated RegAlloc
...
llvm-svn: 4345
2002-10-28 19:32:07 +00:00
e1a3de779e
Make sched class unsigned
...
llvm-svn: 4336
2002-10-28 04:59:43 +00:00
6a30b02b1d
Rename the redundant MachineOperand::getOperandType() to MachineOperand::getType()
...
llvm-svn: 4331
2002-10-28 04:45:29 +00:00
2a3bd1c562
*** empty log message ***
...
llvm-svn: 4323
2002-10-28 02:01:37 +00:00
8710aab04c
Rename MachineCodeForBasicBlock to MachineBasicBlock
...
llvm-svn: 4318
2002-10-28 01:41:47 +00:00
6d8a6c645c
Move machine code generation/destruction passes out of Sparc.cpp because
...
they are generic
llvm-svn: 4310
2002-10-28 01:12:41 +00:00
e94db67c4f
Move addPassesToEmitAssembly from TargetMachine to UltraSparc because it
...
really is sparc specific.
llvm-svn: 4308
2002-10-28 01:03:43 +00:00
7ae7f84cf3
Changed `MachineCodeForMethod' to `MachineFunction'.
...
llvm-svn: 4301
2002-10-28 00:28:31 +00:00
52c2d10a19
Remove dead fixme
...
llvm-svn: 4300
2002-10-27 21:23:43 +00:00
7d3e5dbf2b
Instruction select constant arguments correctly
...
llvm-svn: 4297
2002-10-27 21:16:59 +00:00
407582dc5a
Add instruction definitions for mov r, imm instructions
...
llvm-svn: 4296
2002-10-27 21:16:44 +00:00
fb34004733
change ++ to +1 when using random access iterators
...
llvm-svn: 4292
2002-10-27 19:09:51 +00:00
d92fb0058b
Initial checkin of X86 backend.
...
We can instruction select exactly one instruction 'ret void'. Wow.
llvm-svn: 4284
2002-10-25 22:55:53 +00:00
517005c760
Build the X86 target as well
...
llvm-svn: 4283
2002-10-25 22:55:05 +00:00
d6786b5f59
Prune #includes
...
llvm-svn: 4277
2002-10-25 02:01:33 +00:00
1e5e3f071e
Fix misspelling
...
llvm-svn: 4276
2002-10-25 01:43:26 +00:00
42c66c4887
Minor cleanups
...
Make sure to have a pass name
llvm-svn: 4268
2002-10-23 01:12:01 +00:00
ce64eddb71
- Two minor improvements to the MachineInstr class to reduce footprint and
...
overhead: Merge 3 parallel vectors into 1, change regsUsed hash_set to be a
bitvector. Sped up LLC a little less than 10% in a debug build!
llvm-svn: 4261
2002-10-22 23:16:21 +00:00
aaf6ee80de
Make sure to escape \'s when they are output
...
llvm-svn: 4179
2002-10-15 19:56:24 +00:00
5156bba4c7
- Add an endianness field to the TargetData datastructure
...
llvm-svn: 4174
2002-10-14 22:41:13 +00:00
92ccbb9f27
Print "circular" warning message only in debug mode.
...
llvm-svn: 4170
2002-10-14 16:32:49 +00:00
4049a9a5de
Removed misleading const keyword.
...
llvm-svn: 4169
2002-10-14 16:32:24 +00:00
74cb2d2503
Allow emission of names that start with an underscore. This is needed to
...
interface with code that uses symbols in the ansi-c protected namespace. In
most cases this comes from system header files, such as stdio.h. In particular,
without this change, a reference to the __iob symbol is mangled into ll_iob,
which is not resolved by libc.
llvm-svn: 4165
2002-10-14 06:14:18 +00:00
a202c0dbfa
Don't try to compute the size of an "array" element if the index is 0:
...
the size may be unknown, and is not needed.
llvm-svn: 4153
2002-10-13 21:47:44 +00:00
69ce8674b5
- Rename Instruction::First*Op to *OpsBegin, and Num*Ops to *OpsEnd to
...
reflect the fact that it's a range being defined.
llvm-svn: 4147
2002-10-13 19:39:16 +00:00
d77030bd76
Use vectors instead of hash_maps for issueGaps and conflictLists.
...
These hash lookups were a major sink of time because they happen so often!
llvm-svn: 4136
2002-10-13 00:37:46 +00:00
05ee0819a7
Run LICM before GCSE!
...
llvm-svn: 4135
2002-10-13 00:34:10 +00:00
10d8164013
Several major fixes, particularly in emitting constant aggregates:
...
(1) Padding bytes between structure fields (for alignment) were never
being emitted into the constant pool so the layout did not match!
(2) In printing constants, structures containing structures or arrays
were never handled.
(3) Support new model for external/uninitialized/initialized globals.
Uninitialized globals are no longer emitted since they are external.
Initialized globals may go either in .bss or in .data.
llvm-svn: 4134
2002-10-13 00:32:18 +00:00
78044fbc8e
Don't use %l0 for large operands to a SAVE since it is needed *before* SAVE!
...
We now use %g1 instead since that is shared and volatile.
llvm-svn: 4133
2002-10-13 00:24:06 +00:00
f4f7292b4e
Don't mark JMPLCALL and JMPLRET as branches.
...
llvm-svn: 4132
2002-10-13 00:22:32 +00:00
d2dc60e5d9
(1) Try to evaluate constant when multiplying 2 constants.
...
(2) Use intelligent multiply selection code for array allocas.
(3) Don't use cache padding for alloca'd stack slots!
(4) Bug fix in handling call arguments: was not copying sixth FP arg
to int reg. when calling a function with no prototype.
llvm-svn: 4130
2002-10-13 00:18:57 +00:00
d00beecb59
Eliminate duplicate target pointer in SparcRegInfo.
...
llvm-svn: 4129
2002-10-13 00:06:04 +00:00
879eac9fa1
Eliminate duplicate target pointer. Also add a few assertions.
...
llvm-svn: 4128
2002-10-13 00:05:30 +00:00
ea31dc707f
Make sure to handle small negative values hiding as large unsigned longs --
...
this is a common case created by the front-end.
llvm-svn: 4127
2002-10-13 00:04:26 +00:00
4ef6cce821
Major fix: extract ConstantExpr nodes and decompose them into symbolic
...
instructions so that (a) constant folding is done automatically before
code generation, and (b) selection does not have to deal with them.
Also, check for ConstantPointerRefs in additional to GlobalValues
when creating a GEP to load a global address.
llvm-svn: 4126
2002-10-13 00:01:57 +00:00
d76d82b40f
Return address register should be marked as "result" for the JMPL instruction
...
since it is defined by the instruction.
llvm-svn: 3966
2002-09-28 17:00:15 +00:00
6d1036d41b
Live ranges for Return value and return address of a Call are no longer
...
created here. Instead they are created in LiveRangeInfo.cpp. This
simplifies the code here quite a bit.
llvm-svn: 3965
2002-09-28 16:59:05 +00:00
cce628aeaf
Simplified code that handles call args and rets, so it no longer
...
needs the RegClass list to be passed in.
llvm-svn: 3964
2002-09-28 16:56:59 +00:00
4bb9866dc5
Simplify Call translation slightly.
...
llvm-svn: 3963
2002-09-28 16:55:41 +00:00
34d16d64b0
Overhaul integer conversions to match C++ ISO standard.
...
Don't allow direct FP-to-uint conversion (must be eliminated by preselection).
Address arithmetic for arrays is now entirely 64-bit so no sign-ext needed.
llvm-svn: 3961
2002-09-27 14:33:08 +00:00
40e2347b90
Modify operand order for Create{Sign,Zero}ExtensionInstructions.
...
llvm-svn: 3960
2002-09-27 14:29:45 +00:00
d238de02c7
Bug fix: some redundant copies were not being deleted after detection :-|.
...
llvm-svn: 3959
2002-09-27 14:27:37 +00:00
46aeb8c7c2
Decompose FP-to-UInt casts into FP-to-ULong-toUInt.
...
llvm-svn: 3957
2002-09-27 14:24:45 +00:00
09cfdcb1a3
Convert TargetData to be an ImmutablePass
...
llvm-svn: 3927
2002-09-25 23:46:55 +00:00
8e6e1816c0
Put intermediate source files in a subdirectory here instead of with
...
object files. Also,
llvm-svn: 3884
2002-09-23 13:12:28 +00:00
7765a4a4f6
Disable reassociation pass in LLC until it is fixed.
...
llvm-svn: 3883
2002-09-23 12:55:50 +00:00
4b6bd16c2b
Changed codegen to add 2 empty slots at the top of stack using StackSlots pass
...
llvm-svn: 3873
2002-09-21 05:01:21 +00:00
ca15c99c4d
Initial version: it adds 2 empty slots at the top of stack
...
llvm-svn: 3872
2002-09-21 04:58:26 +00:00
2f4d556d21
Add peephole optimization pass at the end of code generation.
...
llvm-svn: 3846
2002-09-20 00:52:43 +00:00
bbf45f6960
Added class MachineOptInfo as interface to target-specific
...
routines supporting machine code optimization.
Also added method MachineInstrInfo::getNOPOpCode().
llvm-svn: 3845
2002-09-20 00:52:09 +00:00
5e1c434572
Peephole optimization pass on final machine code.
...
llvm-svn: 3840
2002-09-20 00:42:11 +00:00
e9ac29b475
Moving these files from Code/PreSelection to here.
...
Original logs for PreSelection.cpp:
revision 1.2
date: 2002/09/17 23:50:32; author: lattner; state: Exp; lines: +1 -3
Don't put default parameter values into .cpp files, it breaks 3.x compilers
revision 1.1
date: 2002/09/16 15:31:13; author: vadve; state: Exp;
New preselection pass that specializes LLVM code for a target machine,
while remaining in legal portable LLVM form and preserving type
information and type safety.
llvm-svn: 3838
2002-09-20 00:29:28 +00:00
ff0248c47c
Removed debug info printing
...
llvm-svn: 3778
2002-09-17 20:24:46 +00:00
b048d6633d
Use ulong instead of uint for size expressions.
...
llvm-svn: 3744
2002-09-16 15:56:45 +00:00
fff5ffde27
Add methods to query about the representation of LLVM quantities (e.g.,
...
constants). Useful for target-dependent LLVM transformations like
Preselection.
llvm-svn: 3743
2002-09-16 15:56:01 +00:00
8cbdbd8e2e
Don't print out global names unnecesssarily. Also, expose pass
...
constructors so passes can be inserted by TargetMachine.cpp.
llvm-svn: 3742
2002-09-16 15:54:02 +00:00
36d3e03fa0
Move all the code that creates code generation passes from Sparc.cpp to
...
TargetMachine.cpp, since it is entirely machine-independent.
Also, add options to disable optional back-end passes (preselection and
instr. scheduling).
llvm-svn: 3740
2002-09-16 15:39:26 +00:00
834885fb82
Again, including Module makes Function unnecessary.
...
llvm-svn: 3714
2002-09-14 02:07:43 +00:00
e314bf5264
- Change getelementptr instruction to use long indexes instead of uint
...
indexes for sequential types.
llvm-svn: 3683
2002-09-11 01:21:35 +00:00
136dab7d86
- Change getelementptr instruction to use long indexes instead of uint
...
indexes for sequential types.
llvm-svn: 3682
2002-09-11 01:21:33 +00:00
d50fb11d18
Silly bug fix: Machine code vector could be empty for a no-op cast instruction,
...
e.g., cast double to double.
llvm-svn: 3633
2002-09-09 14:54:21 +00:00
f5d585d185
Add new function UltraSparcInstrInfo::CreateZeroExtensionInstructions.
...
llvm-svn: 3581
2002-09-05 18:34:31 +00:00
549489aa77
Bug fixes in casting between floats and ints smaller than 64 bits.
...
Add UltraSparcInstrInfo::CreateZeroExtensionInstructions to help with that.
llvm-svn: 3580
2002-09-05 18:33:59 +00:00
7bc45123d3
-- Use size of pointer element type instead of pointer type in array offsets!
...
-- A few bug fixes in casting between floats and ints.
-- Use SRL reg, 0 instead of AND reg, 0xffffffff to clear high 32 bits.
llvm-svn: 3579
2002-09-05 18:32:13 +00:00
93407286ed
-- Bug fix: use byte offsets not typed offsets in output assembly!
...
-- Add support for ConstantExpr constants (only cast and add operators so far)
-- Avoid generating label Bbss.bss, which sometimes came out twice.
llvm-svn: 3578
2002-09-05 18:28:10 +00:00
b0b412e66e
- Renamed Type::isIntegral() to Type::isInteger()
...
- Added new method Type::isIntegral() that is the same as isInteger, but
also accepts bool.
llvm-svn: 3574
2002-09-03 01:08:28 +00:00
bcba516097
moved this file from lib/Reoptimizer/Mapping
...
llvm-svn: 3519
2002-08-27 22:47:33 +00:00
f246131208
Added getFunctionInfo and MappingInfoForFunction pass, and fixed the earlier error in compiling
...
llvm-svn: 3513
2002-08-27 16:45:17 +00:00
bee7297f26
LoadIdx non-terminal no longer needed.
...
llvm-svn: 3499
2002-08-24 20:58:04 +00:00
541862fbf3
Sign-extend values used to index arrays (and Simplify
...
SetOperandsForMemInstr significantly). Load and Store
no longer have any indices. Eliminate spurious sign-extension
on a cast to float/double.
llvm-svn: 3498
2002-08-24 20:56:53 +00:00
9068efdce6
Fix sign-extension: it needs to happen *after* multiplying by type size.
...
llvm-svn: 3497
2002-08-24 14:44:58 +00:00
b342572667
Simplify previous hack slightly.
...
llvm-svn: 3490
2002-08-23 03:21:01 +00:00
1c84243d47
Force sign-extension for uint array indexes from 32-bit to 64-bits
...
since uint is not normally sign-extended when casting to uint64_t.
llvm-svn: 3489
2002-08-23 02:55:51 +00:00
02fe752fbd
Eliminated the MemAccessInst class, folding contents into GEP class.
...
llvm-svn: 3488
2002-08-22 23:37:24 +00:00
f18177ea01
Change code to not use the copyOperands method added to User. It's now
...
more efficient to boot.
llvm-svn: 3453
2002-08-22 15:57:58 +00:00
a6100862d3
Fix two resource names.
...
llvm-svn: 3443
2002-08-22 02:58:57 +00:00
c3a5e4e0f8
Add AsmPrinter::ConstantExprToString, which writes out a ConstantExpr
...
as an expression.
llvm-svn: 3442
2002-08-22 02:58:36 +00:00
2d85a9976a
Eliminate bool, boolreg and boolconst nonterminals, and just use
...
reg and Constant instead.
llvm-svn: 3441
2002-08-22 02:56:10 +00:00
e56681c891
Change rules for Not, since it is now implemented as Xor(reg,11..1).
...
Eliminate bool, boolreg and boolconst nonterminals, and just use
reg and Constant instead.
llvm-svn: 3440
2002-08-22 02:55:21 +00:00
74469f858f
This case JUST handles constantpointer nulls, not all pointers.
...
llvm-svn: 3402
2002-08-20 17:02:48 +00:00
caed269085
Revise code generation for unary Not (boolean and bitwise), which is
...
no longer a separate instruction but is instead implemented with XOR.
llvm-svn: 3342
2002-08-15 14:17:37 +00:00
a3efa260ea
Bug fix in TargetData::getIndexedOffset: We were using the pointer
...
type instead of the element type for the element size for arrays.
llvm-svn: 3302
2002-08-13 18:17:56 +00:00
4f729affe6
Several bug fixes in casting to signed int values.
...
llvm-svn: 3301
2002-08-13 18:04:08 +00:00
3a5a29faf4
Handle small unsigned results correctly by clearing high bits.
...
Bug fixes in casting to signed int values.
llvm-svn: 3297
2002-08-13 17:40:54 +00:00
9c9e548596
Build correctly in the face of /shared.
...
-Chris
llvm-svn: 3296
2002-08-12 22:09:44 +00:00
56e9166b84
- Clean up interface to Sparc register handling a bit:
...
- Eliminate Sparc*Order classes, moving contents to Sparc*Class classes
- get register name methods now return const char * const pointers instead
of std::string's.
- Added file header comments to SparcRegClassInfo.(cpp|h)
- Moved BIG constant arrays out of SparcRegClassInfo.h, into
SparcRegInfo.cpp. This should allow a LOT of std::string constructors to
not have to be called.
llvm-svn: 3295
2002-08-12 21:25:05 +00:00
959a5fbf8e
* Removed extraneous #includes
...
* Fixed file headers to be consistent with the rest of LLVM
* Other minor fixes
llvm-svn: 3278
2002-08-09 20:08:06 +00:00
02e7a86fec
* Removed extraneous #includes
...
* Fixed file headers to be consistent with the rest of LLVM
* Other minor fixes
llvm-svn: 3277
2002-08-09 20:08:03 +00:00
c93df6bf22
Merge three loops into one.
...
llvm-svn: 3259
2002-08-07 21:39:48 +00:00
e64e62eff9
Fix breakage in the build
...
llvm-svn: 3258
2002-08-07 21:39:39 +00:00
428a0ba612
added Mapping and Function Pass
...
llvm-svn: 3251
2002-08-05 23:23:19 +00:00
482ab44175
Bug fix in CreateCodeToLoadConst(): use sign of dest, not operand,
...
in choosing how to create int-set instructions.
llvm-svn: 3248
2002-08-04 20:55:37 +00:00
71895b28cc
Bug fix in TargetData::getIndexedOffset(): handle struct offset
...
after array offset correctly. The type was not being updated for
array offsets!
llvm-svn: 3246
2002-08-04 20:52:39 +00:00
b4a9685872
Bug fix in SetOperandsForMemInstr: handle leading zeros correctly
...
when folding or not folding GEPs.
llvm-svn: 3245
2002-08-04 20:51:05 +00:00
b430c3f395
Fix compilation problem. IsIndexZero doesn't exist, use IsZero instead.
...
llvm-svn: 3243
2002-08-03 20:57:38 +00:00
1944064801
Simplified handling of array indexes in SetMemOperands_Internal.
...
llvm-svn: 3236
2002-08-03 13:48:21 +00:00
6d6deba9f9
Bug fix: incorrect SAVE instruction when using register for stack size.
...
llvm-svn: 3198
2002-08-01 14:26:11 +00:00
c19b1cc168
Just improved comments and assertions.
...
llvm-svn: 3191
2002-07-31 21:13:31 +00:00
defe6ec939
Add a missing case: converting float/double to unsigned integer types.
...
llvm-svn: 3188
2002-07-31 21:01:34 +00:00
31d05fdd0a
* Move InstructionSelection pass to lib/CodeGen/InstrSelection so it is
...
shared by backends.
llvm-svn: 3146
2002-07-30 03:56:16 +00:00
26c7e5839e
changed implementation of LLVM BYTECODE Length
...
llvm-svn: 3089
2002-07-25 17:22:48 +00:00
10073a9080
*** empty log message ***
...
llvm-svn: 3075
2002-07-25 06:17:51 +00:00
3091e11726
GCC 3.1 changes, finally the burm file builds the FIRST time a clean directory is built.
...
llvm-svn: 3073
2002-07-25 06:08:32 +00:00
e98dd5fcac
*** empty log message ***
...
llvm-svn: 3056
2002-07-24 21:21:32 +00:00
a896b08b5c
*** empty log message ***
...
llvm-svn: 3002
2002-07-23 17:52:38 +00:00
f6f772b1af
moved from CodeGen to this dir
...
llvm-svn: 2992
2002-07-22 22:09:35 +00:00
889faf8bc9
Adding code for outputing length in .s
...
llvm-svn: 2979
2002-07-21 09:35:01 +00:00
3e751859ec
* Make global variables with external linkage get emitted correctly
...
* Do NOT add a prefix to global variables that are external
* Add newline after emitting a constpointerref
llvm-svn: 2925
2002-07-16 18:35:16 +00:00
382f286ae7
Added the Mapping Pass to out put Mapping Info to .s file
...
llvm-svn: 2913
2002-07-15 23:58:21 +00:00
cf764680ad
added std:: to vector
...
llvm-svn: 2874
2002-07-11 00:16:28 +00:00
c5f8b52bd0
Changed interface to insertCallerSavingCode().
...
llvm-svn: 2859
2002-07-10 21:42:42 +00:00
e997a11251
Stop using pseudo-instructions (SETX, SETUW, SETSW)
...
and generate actual machine instruction sequences directly.
llvm-svn: 2858
2002-07-10 21:42:13 +00:00
4e1ee14694
Add support to print %hh, %hm, %lm, or %lo in an operand field.
...
llvm-svn: 2857
2002-07-10 21:41:21 +00:00
58c904ace6
Major overhaul to stop using pseudo-instructions (SETX, SETUW, SETSW)
...
and generate actual machine instruction sequences directly.
Also a couple of bug fixes in code for putting constants into registers:
-- Do *not* sign-extend unsigned constant that is shorter than int reg size
-- Fix handling of address constant (a GlobalValue) vs. constant that
must be loaded.
llvm-svn: 2856
2002-07-10 21:39:50 +00:00
4aee77c70b
More important fixes:
...
-- FP argument to a function with no prototype going on stack
was not being copied to the stack in colorCallArgs().
-- Put caller-saving code *before* argument copying code so that
we don't trash a register before saving it!
-- Two other minor fixes.
llvm-svn: 2855
2002-07-10 21:36:00 +00:00
7e882db2f4
Added std:: to mem_fun for 64-bit gcc
...
llvm-svn: 2845
2002-07-09 19:16:59 +00:00
a3697666eb
Added support for printing constant global references to
...
assembly.
llvm-svn: 2842
2002-07-09 12:30:29 +00:00
5eb69429aa
Numerous changes in interface to class SparcRegInfo corresponding to
...
changes in class MachineRegInfo (see MachineRegInfo.h for details).
Added {LD,ST}[X]FSR instructions.
llvm-svn: 2839
2002-07-08 23:34:10 +00:00
1ce4096033
class MachineCodeForBasicBlock is now an annotation on BasicBlock.
...
llvm-svn: 2838
2002-07-08 23:31:24 +00:00
3bb830d337
BA no longer has the unused CC operand.
...
llvm-svn: 2837
2002-07-08 23:30:59 +00:00
82190d3e73
Have to save a boolean (setCC) value whenever use is outside the current
...
basic block.
Mark setCCInstr used as dest. of conditional-move as both a def and a use.
BA instruction no longer has the unused CC argument.
llvm-svn: 2836
2002-07-08 23:30:14 +00:00
c564520c5c
BA has only one argument.
...
Added LDFSR, LDXFSR, STFSR and STXFSR.
Fixed operands info for RDCCR, WRCCR.
llvm-svn: 2835
2002-07-08 23:25:17 +00:00
aee6701e63
Significant changes to correctly spill CC registers and to correctly
...
handle conditional move instructions:
-- cpMem<->Reg functions now support CC registers (int and FP) correctly.
Also, cpMem<->Reg functions now return a vector of machine instructions.
-- Scratch registers must be explicitly provided to cpMem<->Reg when
needed, since CC regs need one to be copied to/from memory.
-- CC regs are saved to a scratch register instead of stack.
-- All regs used by a instruction are now recorded in MachineInstr::regsUsed,
since regs used to save values *across* an instruction are not obvious
either from the operands or from the LiveVar sets.
-- An (explicit or implicit) operand may now be both a def and a use.
This is needed for conditional move operations.
So an operand may need spill code both before and after the instruction.
Other changes:
-- Added several get{Class,Type} functions.
-- Added unified-to-local register number conversion.
-- class MachineCodeForBasicBlock is now an annotation on BasicBlock.
-- Suggest/Color methods may modify the MachineInstr (and always did),
so don't make that argument const!
-- Caller-saving code doesn't need its special purpose code for
handling CC registers since cpMem<->Reg handle those correctly now.
llvm-svn: 2834
2002-07-08 23:23:12 +00:00
c28c7b9ccf
Remove diff-cluttering tags
...
llvm-svn: 2808
2002-06-30 16:12:03 +00:00
458496c060
changes to make it compatible with 64bit gcc
...
llvm-svn: 2791
2002-06-25 20:55:50 +00:00
7076ff29ed
MEGAPATCH checkin.
...
For details, See: docs/2002-06-25-MegaPatchInfo.txt
llvm-svn: 2778
2002-06-25 16:13:21 +00:00
2152e03bfd
Fix constness
...
llvm-svn: 2762
2002-06-05 18:11:37 +00:00
c0b158b94d
Fix Constness problems
...
llvm-svn: 2761
2002-06-05 18:08:26 +00:00
070cf77a40
Disable debugging output
...
llvm-svn: 2756
2002-06-04 03:09:57 +00:00
abe98198a8
Convert RegClass::IsColorUsedArr from a dynamically allocated array to
...
a vector. This makes asserting on array bounds easier.
llvm-svn: 2731
2002-05-23 15:50:03 +00:00
4dbcec4295
Fixed the makefile to not die when compiling a new, empty, source directory
...
llvm-svn: 2688
2002-05-21 15:58:24 +00:00
7f99b6f58c
Rename IsPowerOf2 to isPowerOf2
...
llvm-svn: 2663
2002-05-19 21:20:19 +00:00
8b831746be
Add integer register size field.
...
Make all sizes and offsets uint64_t instead of uint.
Fixed GetIndexedOffset to handle mixed array and struct indices.
llvm-svn: 2641
2002-05-19 15:28:02 +00:00
e9327f0082
Numerous bug fixes:
...
-- correct sign extensions for integer casts and for shift-by-constant
instructions generated for integer multiply
-- passing FP arguments to functions with more than 6 arguments
-- passing FP arguments to varargs functions
-- passing FP arguments to functions with no prototypes
-- incorrect stack frame size when padding a section
-- folding getelementptr operations with mixed array and struct indexes
-- use uint64_t instead of uint for constant offsets in mem operands
-- incorrect coloring for CC registers (both int and FP): interferences
were being completely ignored for int CC and were considered but no
spills were marked for fp CC!
Also some code improvements:
-- better interface to generating machine instr for common cases
(many places still need to be updated to use this interface)
-- annotations on MachineInstr to communicate information from
one codegen phase to another (now used to pass information about
CALL/JMPLCALL operands from selection to register allocation)
-- all sizes and offests in class TargetData are uint64_t instead of uint
llvm-svn: 2640
2002-05-19 15:25:51 +00:00
8b1e4d63fe
Extend TargetData::getIndexedOffset to support arrays and pointers!
...
llvm-svn: 2535
2002-05-07 20:00:33 +00:00
181cc32365
Replace all usages of Type::isPointerType with isa<PointerType>
...
llvm-svn: 2486
2002-05-06 16:15:30 +00:00
d5a847057b
Eliminate duplicate or unneccesary #include's
...
llvm-svn: 2397
2002-04-29 17:42:12 +00:00
37104aace8
Add new optional getPassName() virtual function that a Pass can override
...
to make debugging output a lot nicer.
llvm-svn: 2395
2002-04-29 14:57:45 +00:00
f12cc842b3
Tighten up the AnalysisUsage of lots of passes, primarily to correctly indicate whether or not they invalidate the CFGA
...
llvm-svn: 2386
2002-04-28 21:27:06 +00:00
63c52f3805
Add #include that was removed from TargetMachine.h
...
llvm-svn: 2381
2002-04-28 20:40:59 +00:00
ca14237696
Split ConstantVals.h into Constant.h and Constants.h
...
llvm-svn: 2378
2002-04-28 19:55:58 +00:00
776bfa20a9
Simplify code
...
Remove unneccesary getID variant for module's
llvm-svn: 2353
2002-04-28 04:50:54 +00:00
f998685cd9
s/Method/Function
...
llvm-svn: 2336
2002-04-27 07:27:19 +00:00
c8e665431b
* Rename MethodPass class to FunctionPass
...
- Rename runOnMethod to runOnFunction
* Transform getAnalysisUsageInfo into getAnalysisUsage
- Method is now const
- It now takes one AnalysisUsage object to fill in instead of 3 vectors
to fill in
- Pass's now specify which other passes they _preserve_ not which ones
they modify (be conservative!)
- A pass can specify that it preserves all analyses (because it never
modifies the underlying program)
* s/Method/Function/g in other random places as well
llvm-svn: 2333
2002-04-27 06:56:12 +00:00
e6dd75604e
Use the cast<> operator in favor of C style casts
...
llvm-svn: 2331
2002-04-27 03:14:39 +00:00
2716b5e524
Change Constant::getNullConstant to Constant::getNullValue
...
llvm-svn: 2323
2002-04-27 02:25:14 +00:00
93ddab25e8
Simplify code a bit
...
llvm-svn: 2322
2002-04-27 02:24:17 +00:00
776df77d14
Don't pad spills and temp. stack areas for alignment.
...
Freeze auto vars and spill areas when their sizes are used
for computing other offsets.
llvm-svn: 2317
2002-04-25 04:43:45 +00:00
a6d94c9a76
Major changes to how int and FP arguments are handled. Varargs
...
function calls were simply wrong; other functions were just not
using all available registers.
llvm-svn: 2316
2002-04-25 04:42:21 +00:00
a77a8eee50
Added functions to compute which register, if any, to use
...
for a particular argument in a list of arguments.
llvm-svn: 2315
2002-04-25 04:40:24 +00:00
dccabec1ea
Insert copy operations for FP arguments to a varargs function,
...
to copy the FP arg. to an integer. Necessary so that the
register allocator has two different live ranges for the FP value
and the int. argument.
llvm-svn: 2314
2002-04-25 04:37:51 +00:00
b63c4886c4
Implementation of class MachineFrameInfo.
...
llvm-svn: 2313
2002-04-25 04:35:27 +00:00
c3728c281b
* getAsString requires that the input array is string compatible, so
...
assert it.
* Use WriteAsOperand instead of getStringValue for constants
llvm-svn: 2296
2002-04-18 18:15:38 +00:00
a8e24c494e
Only print debug message if DEBUG_RA is on
...
llvm-svn: 2254
2002-04-15 22:41:48 +00:00
0b32d0d511
Handle the FP format problem, where outputed FP constants were not precise
...
enough. This fixes compilation of the health benchmark.
llvm-svn: 2228
2002-04-11 21:44:02 +00:00
98d0ac0f8e
Eliminate unneccesary extraneous iterators
...
llvm-svn: 2215
2002-04-09 19:46:27 +00:00
06be180225
Add explicit #includes of Function.h to make up for the removed #include
...
in iOther.h
llvm-svn: 2209
2002-04-09 19:08:28 +00:00
6b17c83fb0
iUse new form of pop_back to make code more concise
...
llvm-svn: 2202
2002-04-09 18:02:02 +00:00
c71deb8412
Delete NOP instructions as they are eliminated.
...
llvm-svn: 2199
2002-04-09 15:05:04 +00:00
929d4a8bb5
* Add a useful file comment
...
* Move InsertPrologEpilogCode class to PrologEpilogCodeInserter.cpp
-> Among other things, this eliminates the need for the minstrVec static
global array.
llvm-svn: 2195
2002-04-09 05:21:26 +00:00
f8a9bfbc03
Move the InsertPrologEpilogCode class out of the Sparc.cpp file into the
...
new PrologEpilogCodeInserter.cpp file, and include the bodies of the
GetInstructionsFor(Prolog|Epilog) functions from SparcInstrSelection.cpp
into the class. This eliminates the need for a static global vector of
instructions and a class of errors that is really unneccesary.
llvm-svn: 2194
2002-04-09 05:20:15 +00:00
5074bb529e
Move the InsertPrologEpilogCode class out of the Sparc.cpp file, and include
...
the bodies of the GetInstructionsFor(Prolog|Epilog) functions from
SparcInstrSelection.cpp into the class. This eliminates the need for a static
global vector of instructions and a class of errors that is really unneccesary.
llvm-svn: 2193
2002-04-09 05:18:31 +00:00
35b90c22e9
Include prototype for interface to PrologEpilogCodeInserter.cpp file
...
llvm-svn: 2192
2002-04-09 05:16:36 +00:00
46f8b0e759
Use new higher level isFloatingPoint() function
...
llvm-svn: 2191
2002-04-09 05:16:08 +00:00
30e23dacbc
Convert AddedInstrMapType to contain AddedInstrns by value instead of by
...
pointer so that they do not all get leaked!
llvm-svn: 2188
2002-04-09 05:13:04 +00:00
f739fa8541
s/Method/Function
...
llvm-svn: 2180
2002-04-08 22:03:57 +00:00
6915f8fc3c
* Move include/llvm/Analysis/SlotCalculator.h to include/llvm/SlotCalculator.h
...
because the slot calculator is already part of the VMCore library.
* Rename incorporateMethod and purgeMethod to *Function
llvm-svn: 2154
2002-04-07 22:49:37 +00:00
62b7fd136e
Change references to the Method class to be references to the Function
...
class. The Method class is obsolete (renamed) and all references to it
are being converted over to Function.
llvm-svn: 2144
2002-04-07 20:49:59 +00:00
e2f2f54f0c
s/MethodType/FunctionType
...
llvm-svn: 2115
2002-04-04 22:19:18 +00:00
313ca14124
Case numbers were not updated when Sparc.burg.in was changed
...
to add separate label for bitwise NOT operator.
llvm-svn: 2091
2002-04-01 20:28:48 +00:00
4973f73ad1
1. Fix a leftover bug in generating memory instructions.
...
2. Fix type used for TmpInstruction holding the return address.
llvm-svn: 2075
2002-03-31 19:07:35 +00:00
02662bd390
Added function getCallInstIndirectAddrVal() to set call interference
...
for that value.
llvm-svn: 2074
2002-03-31 19:04:50 +00:00
07c874547b
Minor cleanup in printing constants. I think this included a bug
...
fix related to putting a read-write variable in a read-only section,
but I'm not sure now.
llvm-svn: 2073
2002-03-31 19:03:58 +00:00
bd4e68c280
Fix CreateUIntSetInstruction() to handle sign extensions correctly.
...
llvm-svn: 2059
2002-03-31 00:13:12 +00:00
ff87436f48
s/Method/Function
...
llvm-svn: 2035
2002-03-29 03:51:11 +00:00
5d088b00bf
Convert to use new style casts instead of direct checking
...
llvm-svn: 1990
2002-03-26 17:58:12 +00:00
75ee890af0
Bug re-fix: put back MachineCodeForInstruction::get(*I).dropAllReferences().
...
Also re-enable instr. scheduling pass.
llvm-svn: 1966
2002-03-24 03:35:16 +00:00
be08b5ea15
Change latencies for Load, Store and Branch instructions.
...
llvm-svn: 1965
2002-03-24 03:33:53 +00:00
72213c9a66
Major enhancements to how array and structure indices are handled.
...
Improve checking for constants in Multiply.
Simpler method to keep track of when a node is folded into its parent.
Several other bug fixes.
llvm-svn: 1964
2002-03-24 03:33:02 +00:00
493b8241e0
Add support for code generation for array references.
...
Also, use distinct names for the three types of SetMachineOperand to
avoid painful overloading problems and errors.
Bug fix in converting-int-to-float. Other minor stuff.
llvm-svn: 1896
2002-03-18 03:15:35 +00:00
db1435f410
Bug fixes for not using unified reg. numbers, and for using the
...
wrong register class for saving CC registers.
Also, use distinct names for the three types of SetMachineOperand.
llvm-svn: 1895
2002-03-18 03:12:16 +00:00
f9ab087be7
Use distinct names for the three types of SetMachineOperand to
...
avoid painful overloading problems and errors.
llvm-svn: 1893
2002-03-18 03:09:15 +00:00
55ee12bb25
Minor fixes.
...
llvm-svn: 1892
2002-03-18 03:08:07 +00:00
270f56a085
Handling of global names was severely broken when converting to 2 passes.
...
Different labels were generated for the same name in different passes.
Use an annotation to hold a fixed table of names.
llvm-svn: 1891
2002-03-18 03:07:26 +00:00
0513e01bee
Several sundry bug fixes.
...
llvm-svn: 1890
2002-03-18 03:02:42 +00:00
15148e7e8c
Fix include error.
...
llvm-svn: 1819
2002-03-03 20:46:32 +00:00
5536c9c938
Clean up std namespace issues
...
Silence warning
llvm-svn: 1790
2002-02-24 23:02:40 +00:00
83d485b310
* Pull BasicBlock::pred_* and BasicBlock::succ_* out of BasicBlock.h and into
...
llvm/Support/CFG.h
* Make pred & succ iterators for intervals global functions
* Add #includes that are now neccesary because BasicBlock.h doesn't include
InstrTypes.h anymore
llvm-svn: 1750
2002-02-12 22:39:50 +00:00
60a6591d83
Method.h no longer includes BasicBlock.h
...
Method::inst_* is now in llvm/Support/InstIterator.h
GraphTraits specializations for BasicBlock and Methods are now in llvm/Support/CFG.h
llvm-svn: 1746
2002-02-12 21:07:25 +00:00
774cbceb0b
Write llvm bytecode to output .s file as last step of LLC.
...
llvm-svn: 1728
2002-02-11 22:35:46 +00:00
74ed5cf1e6
Fix build error
...
llvm-svn: 1722
2002-02-11 17:11:43 +00:00
ea13e0afa0
Convert operand iterator over to work like an STL iterator
...
llvm-svn: 1720
2002-02-05 06:02:59 +00:00
7e5ee4253c
Minor change: Methods that return ValueSet's that are guaranteed to be valid
...
return references instead of pointers.
llvm-svn: 1719
2002-02-05 04:20:12 +00:00
d30f989cda
* Code Cleanups
...
* Removal dependencies on Type.h & remove uses of getTypeID()
llvm-svn: 1718
2002-02-05 03:52:29 +00:00
b0af9cdbda
* Eliminate the LiveVarSet class, making applyTranferFuncForMInst a static
...
function in the one .cpp file that uses it. Use ValueSet's instead.
* Prepare to delete LiveVarSet.h & LiveVarSet.cpp
* Eliminate the ValueSet class, making all old member functions into global
templates that will eventually be moved to Support.
* Eliminate some irrelevant const's
llvm-svn: 1712
2002-02-05 02:52:05 +00:00
30e8fb69c5
* Code Cleanups
...
* Introduce RAV to allow stream I/O instead of using printValue
llvm-svn: 1710
2002-02-05 01:43:49 +00:00
1cb37628d9
The interface to instruction scheduling is now just a call to get the pass.
...
llvm-svn: 1702
2002-02-04 20:03:43 +00:00
e6b511dc0a
* ValueSet interface converted from add/remove to insert/erase
...
llvm-svn: 1690
2002-02-04 16:37:09 +00:00
f48173a875
Convert RegisterAllocator interface to opaque pass type, so that users do not
...
need to know _anything_ about RegAlloc to use it. Well in the end maybe.
llvm-svn: 1681
2002-02-04 15:54:09 +00:00
13b2227ccc
EmitAssembly doesn't need an UltraSparc, it can do with any TargetMachine
...
llvm-svn: 1680
2002-02-04 15:53:23 +00:00
5216cc55f7
* Minor cleanups
...
* Reduce number of #includes
* Remove blatently misleading qualifiers (how do you have an inlined pure virtual function?)
* Remove unnecesary & ignored qualifiers (const int argument vs int argument)
* SparcInternals.h now no longer #includes RegClass.h or SparcRegClassInfo.h
* Pull inlined functions out of .h file if they are virtual and interfere with dependencies
llvm-svn: 1677
2002-02-04 05:59:25 +00:00
c797387363
Add code that used to be inline in MachineSchedInfo.h
...
llvm-svn: 1676
2002-02-04 05:56:30 +00:00
a3403539e1
SparcRegInfo does NOT need anything about instruction scheduling.
...
llvm-svn: 1670
2002-02-04 02:44:38 +00:00
e769482fd3
Pull all of the scheduling related stuff out of Sparc.cpp into it's own file
...
llvm-svn: 1668
2002-02-04 00:39:14 +00:00
36aa542ef0
Split RegisterAllocation stuff OUT of Sparc.cpp into a well defined pass
...
that has a very minimal interface (like it should have).
llvm-svn: 1667
2002-02-04 00:33:08 +00:00
64593c51bb
Move a ton of tables out of SparcInternals.h and move them to Sparc.cpp.
...
Eventually they will probably get moved again, but at least now they aren't
having to be compiled by 7 different .cpp files...
llvm-svn: 1666
2002-02-04 00:04:35 +00:00
38aa77b911
Convert sparc backend over to use pass based compilation structure.
...
Try to decouple stuff as much as possible.
llvm-svn: 1664
2002-02-03 23:42:19 +00:00
84fa1e7801
Convert sparc backend over to use pass based compilation structure.
...
Convert some stages into passes in preparation for more splitting up.
Try to decouple stuff as much as possible.
llvm-svn: 1663
2002-02-03 23:41:51 +00:00
d682045227
Convert assembly emission over to a two pass approach.
...
llvm-svn: 1662
2002-02-03 23:41:08 +00:00
029af0b37f
Add a file level comment
...
Remove #includes
llvm-svn: 1657
2002-02-03 07:52:04 +00:00
92a49c5cae
Implement new method by method assembly output & memory releasing
...
llvm-svn: 1656
2002-02-03 07:51:17 +00:00
477923d0d4
* Switch to new TmpInstruction model
...
* Switch to new MachineCodeForInstruction model
llvm-svn: 1655
2002-02-03 07:50:56 +00:00
f08669fcbc
* Switch to new TmpInstruction model
...
llvm-svn: 1654
2002-02-03 07:49:49 +00:00
0752167009
* Swithc to new MachineCodeForInstruction model
...
* Implement memory freeing for instruction temporaries
llvm-svn: 1653
2002-02-03 07:49:15 +00:00
e772d28862
* prune #includes
...
* Implement permethod output of machine code to assembly
llvm-svn: 1652
2002-02-03 07:48:06 +00:00
621457a34b
Add #include that is no longer implicitly included
...
llvm-svn: 1651
2002-02-03 07:47:05 +00:00
b07bf170c6
Remove dead variable
...
llvm-svn: 1515
2002-01-21 22:50:38 +00:00
61c6aeb6fe
Remove dead variable.
...
llvm-svn: 1514
2002-01-21 22:44:57 +00:00
7f74a56e24
Changes to build successfully with GCC 3.02
...
llvm-svn: 1503
2002-01-20 22:54:45 +00:00
f4c2dddcda
Added more comments
...
llvm-svn: 1498
2002-01-07 21:03:42 +00:00
c07341f999
removed SizeOfStackOperand constant from the SparcRegInfo class - no longer used
...
by code.
llvm-svn: 1497
2002-01-07 20:33:44 +00:00
57386b570f
Added more comments
...
llvm-svn: 1496
2002-01-07 20:28:49 +00:00
4cfbfd599a
Added comments and correct logic for finding register sizes.
...
llvm-svn: 1494
2002-01-07 19:20:28 +00:00
cb2335f13f
Eliminate all uses of memInst->getIndicesBROKEN().
...
llvm-svn: 1485
2001-12-15 00:36:32 +00:00
721fee255c
getIndexedOffset() shd take vector of Values, not of Constants!
...
llvm-svn: 1484
2001-12-15 00:35:48 +00:00
8234b04143
Remove int hack to allow unsigned numbers greater than 2^63 - 1...
...
llvm-svn: 1483
2001-12-15 00:33:36 +00:00
7dc20864b6
Allow pointer indexing
...
llvm-svn: 1462
2001-12-14 16:31:26 +00:00
b2b1b3d036
Remove unsized array support
...
llvm-svn: 1461
2001-12-14 16:30:51 +00:00
6650d18892
Not just arrays are unsized
...
llvm-svn: 1450
2001-12-13 00:46:11 +00:00
2413b160ec
Renamed inst_const_iterator -> const_inst_iterator
...
Renamed op_const_iterator -> const_op_iterator
Renamed PointerType::getValueType() -> PointerType::getElementType()
llvm-svn: 1408
2001-12-04 00:03:30 +00:00
3462ae3ad7
Rename ConstPoolVal -> Constant
...
Rename ConstPool* -> Constant*
Rename ConstPoolVals.h -> ConstantVals.h
llvm-svn: 1407
2001-12-03 22:26:30 +00:00
5de2204fe8
Create a new #include "Support/..." directory structure to move things
...
from "llvm/Support/..." that are not llvm dependant.
Move files and fix #includes
llvm-svn: 1400
2001-11-27 00:03:19 +00:00
63b52693c8
The old getIndices has been deprecated, because it no longer works. It now
...
is named getIndicesBROKEN() and shall be removed when the codebase is updated
to not call it
llvm-svn: 1338
2001-11-26 16:56:19 +00:00
edbf52c7f9
commented out popAllTempValues since it leads to a bug - see code
...
llvm-svn: 1327
2001-11-15 22:03:04 +00:00
c97ccc5cb5
changed since names of some methods in PhyRegAlloc changed
...
llvm-svn: 1324
2001-11-15 20:25:07 +00:00
5c8f573bbf
Fix use of AllocateLocalVar for alloca instruction!
...
llvm-svn: 1319
2001-11-15 15:22:39 +00:00
821b129755
Fix int->float conversion.
...
llvm-svn: 1314
2001-11-15 14:59:56 +00:00
3fb79e61c2
Fix cute little bug that was causing the last
...
structure offset to be ignored in computing an offset!
llvm-svn: 1310
2001-11-14 21:24:44 +00:00
7e833073e3
Add function returning which operand holds immediate constant
...
for a given opcode.
llvm-svn: 1307
2001-11-14 18:48:36 +00:00
ea1a93b95d
Change latency of SETX to improve schedule -- just a hack.
...
llvm-svn: 1304
2001-11-14 15:54:44 +00:00
b8be6f6856
Added M_PSEUDO_FLAG for SETX .. instr
...
llvm-svn: 1301
2001-11-14 15:35:13 +00:00
1237e86597
Remove much cruft from the MemAccessInst instruction
...
llvm-svn: 1298
2001-11-14 11:27:58 +00:00
1a9a7f2ef1
Changed checking for invalid register number - earlier it was uisng a contant
...
llvm-svn: 1293
2001-11-13 23:08:19 +00:00
6e9422e14c
When allocating space on stack for writing a register,
...
use the size of the register, not the size of the Value type,
to get the right alignment.
llvm-svn: 1284
2001-11-12 23:26:35 +00:00
20e105f4b1
Fixed a bug with pervious ColorCallArg
...
llvm-svn: 1278
2001-11-12 20:54:19 +00:00
24e29431bc
Canged ColorCallArg so that when a call arg is directly pushed on to stack
...
for argument passing, that instruction is directly added to the InstructionsBefore
set of the called machine instruction - i.e., it is not reordered.
llvm-svn: 1277
2001-11-12 20:31:47 +00:00
01daa32a92
Disable use of the Phi machine instruction which is no longer needed
...
for register allocation.
llvm-svn: 1270
2001-11-12 18:54:11 +00:00
fcdc2ff6e0
Added phi elimination code
...
llvm-svn: 1265
2001-11-12 14:45:33 +00:00
e7dc82ec0d
Fix dumb bug in alignment adjustment code!
...
llvm-svn: 1260
2001-11-12 05:16:39 +00:00
68d00415b4
Fix bogus code that was eliminating needed args.
...
llvm-svn: 1259
2001-11-11 23:11:36 +00:00
80fc434970
Fixed FP and SP usage. SP for outgoing args - for everything else FP
...
llvm-svn: 1258
2001-11-11 22:37:51 +00:00
2d5c48fcc9
cahnged StackPointer accesses to FramePointer
...
llvm-svn: 1257
2001-11-11 21:49:37 +00:00
b3b55ae4b1
Down-growing offsets from FP should start at 0, not -1.
...
llvm-svn: 1255
2001-11-11 21:22:11 +00:00
0c0859846a
Corrected reodering code for instructions inserted before calls
...
llvm-svn: 1252
2001-11-10 21:20:43 +00:00
295600c417
Several bug fixes in printing constants, particularly with unsized
...
arrays and multi-dimensional arrays.
llvm-svn: 1239
2001-11-10 02:03:06 +00:00
209d8e1c3b
Must generate an instruction for GetElementPtr if single user is not
...
a memory instruction!
llvm-svn: 1238
2001-11-10 01:05:26 +00:00
1812fc499d
Disabled some debuggin messages
...
llvm-svn: 1237
2001-11-10 00:26:55 +00:00
d0d294afde
Added code for correct reordering of call arguments
...
llvm-svn: 1234
2001-11-09 23:49:14 +00:00
1c96dfd7af
Added class MachineCacheInfo.
...
llvm-svn: 1229
2001-11-09 02:20:18 +00:00
2ccb900add
Add support to print constant arrays and structures.
...
Align data larger than an L1 cache line on L1 cache line boundary.
llvm-svn: 1228
2001-11-09 02:19:29 +00:00
bc23cf5521
Do the same for float->int that we did for int->float earlier.
...
Also check IsPointerType() in addition to IsIntegral() in several places.
llvm-svn: 1227
2001-11-09 02:18:16 +00:00
e6642f93d4
Added function UltraSparcInstrInfo::CreateCodeToCopyFloatToInt.
...
llvm-svn: 1226
2001-11-09 02:16:40 +00:00
f34fa6956d
Added class UltraSparcCacheInfo.
...
llvm-svn: 1225
2001-11-09 02:16:04 +00:00
367f34f7cc
Bug fix: Need to include the stack offset "bias" in assembly code itself.
...
Added class UltraSparcCacheInfo.
Added function to convert float to int by copying via memory.
llvm-svn: 1224
2001-11-09 02:15:52 +00:00
56e61ec517
Bug fix: need to use .reserve for uninitialized data.
...
llvm-svn: 1205
2001-11-08 14:29:57 +00:00
c2f8911114
Add handle to TargetMachine object in all Machine...Info classes.
...
llvm-svn: 1197
2001-11-08 05:15:08 +00:00
81908213ae
Added support for bitwise logical operators. Use different labels for
...
for these than for boolean logicals to avoid making Burg diverge.
See Burg manual for more information.
llvm-svn: 1196
2001-11-08 05:14:02 +00:00
03f12f521f
Fixed function getEscapedString to follow the Sparc assembly rules
...
for symbol names! (And renamed it to getValidSymbolName).
Fixed format for float and other constants.
llvm-svn: 1195
2001-11-08 05:12:37 +00:00
f889a11590
Fix bugs in FITOS/D instruction generation.
...
The space for optional args in the stack frame is now being computed,
so finish the code generation for the variable `alloca'.
Finally, made a major overhaul of how stack frame is managed.
llvm-svn: 1194
2001-11-08 05:04:09 +00:00
503d3098fa
Added new function UltraSparcInstrInfo::CreateCodeToCopyIntToFloat.
...
Also major overhaul of how stack frame is managed.
llvm-svn: 1193
2001-11-08 04:57:53 +00:00
7a1524f971
Removed class RegStackOffsets and used class MachineCodeForMethod
...
directly to manage stack frame.
llvm-svn: 1192
2001-11-08 04:56:41 +00:00
6fcb28924b
Use MachineFrameInfo as base class of UltraSparcFrameInfo, and made
...
a major overhaul of this class and how stack frames are managed.
llvm-svn: 1191
2001-11-08 04:55:13 +00:00
e147d062fa
Killing warnings
...
llvm-svn: 1175
2001-11-07 14:01:59 +00:00
5e030830a3
Squelch warnings about not returning a value
...
llvm-svn: 1173
2001-11-07 13:49:12 +00:00
f5b4f47cff
Bug fix: Printing AdIBef and AdIAft outside the scope where they
...
were declared, and in some cases when they were unintialized.
llvm-svn: 1146
2001-11-06 05:01:54 +00:00
80cf60687d
Generate code for Rem instruction.
...
llvm-svn: 1124
2001-11-04 21:59:14 +00:00
ea5d1f5db8
Fixed instruction information for RDCCR and WRCCR.
...
Fixed selection to create a TmpInstruction for each integer CC register
(since it is an implicit side-effect, unlike FP CC registers which are
explicit operands).
llvm-svn: 1120
2001-11-04 19:34:49 +00:00
33d9cb9903
Minor method rename
...
llvm-svn: 1119
2001-11-04 08:08:34 +00:00
9d8950d240
Added code to support correct saving of %ccr across calls
...
llvm-svn: 1111
2001-11-03 19:59:59 +00:00
b7a397253f
Arranged stack frame - needs furhter organization
...
Moved InsertCallerSaveInstr to the SparcRegInfo.cpp
llvm-svn: 1106
2001-11-03 17:13:27 +00:00
41a8289eb8
Check in to use moved stringizing code
...
llvm-svn: 1024
2001-10-29 13:39:38 +00:00
5ff15721c9
Minor fix I omitted to check in.
...
llvm-svn: 1012
2001-10-28 22:19:06 +00:00
2f72cdd756
Generate SETX for 64-bit integers!
...
llvm-svn: 1007
2001-10-28 21:41:46 +00:00
a5619eb835
Add SETX instruction for 64-bit constants.
...
Add M_CC_FLAG for many instructions that use int or fp CC registers.
llvm-svn: 1006
2001-10-28 21:41:01 +00:00
b31f9c3ea6
Need to subtract, not add, stack size in SAVE instruction!
...
llvm-svn: 1005
2001-10-28 21:39:47 +00:00
71b265a848
Major overhaul to print globals and constants.
...
llvm-svn: 1004
2001-10-28 21:38:52 +00:00
9c38dbc249
Added support for spilling
...
llvm-svn: 992
2001-10-28 18:15:12 +00:00
0863c161e9
Fixed load syntax in EmitAssembly
...
Fixed cpReg2Mem (store) operand oreder in SparcRegInfo.cpp
llvm-svn: 984
2001-10-24 22:05:34 +00:00
36bcd79050
Fixed logic for checking whether a LR received the correct color.
...
llvm-svn: 976
2001-10-24 15:56:58 +00:00
6a7f02082b
Corrected a bug in SparcRegInfo.cpp - to add inserted instructions before a return
...
llvm-svn: 969
2001-10-23 21:40:39 +00:00
18a9e39214
UNUSED.
...
llvm-svn: 944
2001-10-22 13:46:38 +00:00
a0177cdca5
Split JMPL into JMPLCALL and JMPLRET.
...
llvm-svn: 943
2001-10-22 13:44:53 +00:00
9090b50ba9
Added a frame layout class, and code to insert prolog/epilog code.
...
llvm-svn: 942
2001-10-22 13:44:23 +00:00
5462dca9f1
Reordered registers slightly to simplify a new check.
...
Added a function to map between the caller's and callee's register windows.
llvm-svn: 941
2001-10-22 13:43:08 +00:00
8498277e77
Split JMPL into JMPLCALL and JMPLRET so that IsCall and IsReturn can
...
be used to distinguish those uses of the `jmpl' instruction.
llvm-svn: 940
2001-10-22 13:41:12 +00:00
52e41008e3
Added functions to generate prolog and epilog code.
...
Use JMPLRET instead of RETURN for method returns so that
llvm-svn: 939
2001-10-22 13:36:31 +00:00
6b492ddc15
Added SAVE and RESTORE. Duplicated JMPL into JMPLCALL and JMPLRET,
...
which have the same opcode and operands but different flags.
llvm-svn: 938
2001-10-22 13:32:55 +00:00
7c1a8d6d53
Reordered a couple of registers to simplify some new checks.
...
Added code to map between caller's and callee's register windows.
Added frame layout class.
llvm-svn: 937
2001-10-22 13:31:53 +00:00
24729a34ce
Added support for both call/jmpl instructions
...
llvm-svn: 930
2001-10-21 16:43:41 +00:00
9bc488984f
Fixed printing of offset operand for RETURN instruction.
...
llvm-svn: 928
2001-10-20 21:33:50 +00:00
5731249137
Use CALL for direct function calls; JMPL for indirect ones.
...
llvm-svn: 927
2001-10-20 20:57:06 +00:00
72ebb454d0
Minor bug fix in printing operands of JMPL.
...
llvm-svn: 926
2001-10-20 20:56:40 +00:00
6a073498ba
Added code so that colorIGNode does not unnecessarily reserve unusable
...
Suggested colors for neighbors.
llvm-svn: 921
2001-10-19 21:41:16 +00:00
d77a1bbc2f
Corrected call interference bug - suggested color not allocated if
...
volatile and there are call interferences
llvm-svn: 918
2001-10-19 17:23:43 +00:00
5f629318fa
Added support for condition code loading/stroing in methods cpReg2Reg etc.
...
llvm-svn: 911
2001-10-18 22:38:52 +00:00
ee6e199f0e
Change Sources specifier to ExtraSources
...
llvm-svn: 874
2001-10-18 01:48:09 +00:00
6c697526bf
1. Move most of the constant-fixup code into machine-independent file
...
InstrSelectionSupport.cpp. It now happens in a bottom-up pass on
each BURG tree after the original top-down selection pass on the tree.
2. Handle global values as constants (viz., constant addresses).
llvm-svn: 868
2001-10-18 00:26:20 +00:00
cc776df39c
Sparc-specific code shared between local files.
...
llvm-svn: 864
2001-10-18 00:03:20 +00:00
01e57a481e
Moved implementation of class UltraSparcInstrInfo to SparcInstrInfo.cpp.
...
llvm-svn: 863
2001-10-18 00:02:32 +00:00
505130cb30
Added virtual function to generate an instruction sequence to
...
load a constant into a register.
llvm-svn: 862
2001-10-18 00:02:06 +00:00
4cc2b3b155
Moved implementation of class UltraSparcInstrInfo here.
...
llvm-svn: 861
2001-10-18 00:01:48 +00:00
6b4ba47f31
Only list automatically generated .cpp files.
...
llvm-svn: 854
2001-10-17 12:34:26 +00:00
5b8971f418
Added support for caller saving
...
llvm-svn: 847
2001-10-16 01:23:19 +00:00
3294e7c14b
Emit the proper .type declarations to tell the debugger what a function is
...
llvm-svn: 845
2001-10-15 19:34:17 +00:00
77d2c22d94
Handle abnormal jmpl syntax correctly
...
llvm-svn: 844
2001-10-15 19:21:31 +00:00
f3f1e452ea
Output to cerr rather than cout so that debug info doesn't mess up assembly generation
...
llvm-svn: 840
2001-10-15 18:15:27 +00:00
086bf0fe3a
updated suggesting/coloring of call & return args & implicit operands
...
llvm-svn: 830
2001-10-15 16:25:28 +00:00
02b671388e
Be const correct
...
llvm-svn: 826
2001-10-15 15:54:43 +00:00
e6c611b990
Forward operands into implicit uses as well as explicit ones.
...
llvm-svn: 808
2001-10-14 23:28:43 +00:00
1679709b71
Two bug fixes that were suppressing some "load-constant-into-register" instrs.
...
llvm-svn: 795
2001-10-14 18:10:33 +00:00
b3368ac9db
Move the burg file to here. Add .in suffix to indicate that it gets
...
preprocessed before burg gets to it
llvm-svn: 794
2001-10-14 17:26:21 +00:00
1a176f15dc
Make the sparc.burg file be a little more flexible and rubust in the fact of
...
renumbering of instructions. It is still horribly broken and grossly dependant on the number of instructions, but now it is a least a little better.
Oh yeah it also works now.
llvm-svn: 793
2001-10-14 17:25:31 +00:00
8deb9e588e
Fix broken #endif
...
llvm-svn: 768
2001-10-13 06:54:54 +00:00
a742b6acf3
* Add #include
...
* Fix #endif problems
* Change to getCalledValue instead of getCalledMethod
llvm-svn: 767
2001-10-13 06:54:30 +00:00
8aeb09fcc7
Record implicitRefs for each machine instruction instead of
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each VM instruction.
llvm-svn: 725
2001-10-11 04:23:19 +00:00
021d523b2f
Insert code to load constants used as Call or Return arguments.
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Also, note return value of a Call as an "implicitUse".
llvm-svn: 720
2001-10-10 20:56:33 +00:00
990d8fb3e8
--removed %g regs being allocated - fix later
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llvm-svn: 714
2001-10-09 23:36:13 +00:00
7fac070215
* Both Method & GlobalVariable now subclass GlobalValue
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* ConstPoolPointerReference now represents a pointer to a GlobalValue
* Methods name references are now explicit pointers to methods
* Rename Value::GlobalVal to Value::GlobalVariableVal to avoid confusion
llvm-svn: 703
2001-10-03 14:53:21 +00:00
da55810666
Commit more code over to new cast style
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llvm-svn: 697
2001-10-02 03:41:24 +00:00
3856934386
Convert more code to use new style casts
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Eliminate old style casts from value.h
llvm-svn: 696
2001-10-01 20:11:19 +00:00
8f19112923
Add more support for new style casts
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Convert more code to use them
llvm-svn: 695
2001-10-01 18:26:53 +00:00
4b717c0edc
Add support for new style casts
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llvm-svn: 694
2001-10-01 16:18:37 +00:00
0156ba6185
Fix emission of return instructions
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llvm-svn: 688
2001-10-01 02:32:34 +00:00
3652ef7587
Several fixes:
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(1) Avoid hard-coding some register numbers.
(2) Fix some incorrect branch opcodes.
(3) Don't try to move int register to float register!
(4) If an operand being forwarded is a constant and it doesn't fit
into the immed field of the copy machine instruction, then
generate a load-constant instead of a copy.
(5) Use (unsigned long) 0 for copying a pointer via "add 0, ptr -> ptr2".
llvm-svn: 683
2001-10-01 00:12:53 +00:00
40378e32cd
Change latency of setuw and setsw to 2 cycles.
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llvm-svn: 681
2001-09-30 23:46:57 +00:00
560b0ad482
added suggesting color support
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llvm-svn: 673
2001-09-30 23:19:57 +00:00
5867c7ae80
added support for suggesting colors
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llvm-svn: 671
2001-09-30 23:16:47 +00:00
b021f68438
* Properly escape function names
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* Ignore %xcc argument on conditional branches
llvm-svn: 663
2001-09-28 15:07:24 +00:00
c6635c9fa2
Check in bug fix for vadve
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llvm-svn: 662
2001-09-28 15:06:55 +00:00
ebd284dfe9
-- fixed a ret val bug
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llvm-svn: 652
2001-09-19 22:40:51 +00:00
e86a0230aa
Seperate instruction definitions into new SparcInstr.def file
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Move contents of SparcMachineInstrDesc[] out of SparcInternals.h
into Sparc.cpp
llvm-svn: 644
2001-09-19 15:56:23 +00:00
49726a21a5
Add EmitAssembly to mf
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llvm-svn: 637
2001-09-19 13:48:18 +00:00
036a317f2a
First cut at assembly output
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llvm-svn: 636
2001-09-19 13:47:27 +00:00
518da4f3cd
Add emitAssemblyMethod to TargetMachine
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llvm-svn: 635
2001-09-19 13:47:12 +00:00
dfc6c887da
-- ruchira
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llvm-svn: 632
2001-09-18 22:52:44 +00:00
caa449cf5c
Remove extraneous #includes
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llvm-svn: 627
2001-09-18 17:03:48 +00:00
4d86cc2842
Renamed files to match the primary classes they provide.
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llvm-svn: 620
2001-09-18 13:10:05 +00:00
8dd5e310e0
Renamed a header file.
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llvm-svn: 619
2001-09-18 13:04:53 +00:00
514180ed83
Make class TargetMachine the common interface to all target-dependent
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information, including instr, sched, and reg information.
This allows us to allocate them all in one place and use them much
more uniformly.
llvm-svn: 618
2001-09-18 13:04:24 +00:00
78d50d0f7a
Allow pointer constants as well as integer and booleans.
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Skip over list nodes in ForwardOperand.
llvm-svn: 617
2001-09-18 13:03:13 +00:00
49d908a419
Make class TargetMachine the common interface to all target-dependent
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information, including instr, sched, and reg information.
Rename files to match the primary classes they provide.
Commented out call to register allocation until more tests run correctly.
llvm-svn: 616
2001-09-18 13:01:29 +00:00
6cefc7072d
Renamed files to match the main classes they provide.
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Some other minor changes.
llvm-svn: 615
2001-09-18 12:58:33 +00:00
970886e738
modified printing of debug messages
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llvm-svn: 593
2001-09-15 19:11:31 +00:00
7d144a8500
added register allocation code
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llvm-svn: 585
2001-09-15 00:30:44 +00:00
dfdab46dc1
*** empty log message ***
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llvm-svn: 579
2001-09-14 20:31:39 +00:00
95c652b59b
Add support for loading and storing pointers...
...
llvm-svn: 575
2001-09-14 20:00:02 +00:00
ad2cbf0e18
Fix a bug that caused a crash if a setcc had zero uses.
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llvm-svn: 574
2001-09-14 18:29:28 +00:00
8d44b99844
Chris seems fond of #include <vector>. Fix these. Also convert use list in
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Value to a vector instead of a list.
Move SchedGraph.h & SchedPriorities.h into lib/CodeGen/InstrScheduling
llvm-svn: 572
2001-09-14 16:56:32 +00:00
1680fb1617
Add a comment
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llvm-svn: 571
2001-09-14 16:08:12 +00:00
6875e9cc97
Break scheduling infrastructure out of TargetMachine.cpp into SchedInfo.cpp
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llvm-svn: 569
2001-09-14 15:43:58 +00:00
87b3bf630b
Split Target/Machine.h into three files:
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* Machine.h
* InstInfo.h
* SchedInfo.h
TODO: Split out reg info stuff
llvm-svn: 567
2001-09-14 06:08:03 +00:00
22a6a90511
Make a new llvm/Target #include directory.
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Move files from lib/CodeGen/TargetMachine to lib/Target
Move TargetData.h and TargetMachine.h to Target/{Data.h|Machine.h}
Prepare to split TargetMachine.h into several smaller files
llvm-svn: 566
2001-09-14 05:34:53 +00:00
f8464e4b8d
Checkin changes to:
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1. Clean up the TargetMachine structure. No more wierd pointers that have to
be cast around and taken care of by the target.
2. Instruction Scheduling now takes the schedinfo as an argument. The same
should be done with the instinfo, it just isn't now.
llvm-svn: 565
2001-09-14 04:32:55 +00:00
5fae0de330
Move files to new sparc directory
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llvm-svn: 563
2001-09-14 03:56:45 +00:00
06028541ab
Move the sparc target to a new lib/Target directory
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llvm-svn: 562
2001-09-14 03:55:11 +00:00
b0ddffaae3
Move files.
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llvm-svn: 561
2001-09-14 03:47:57 +00:00
Brian Gaeke