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Author SHA1 Message Date
Mirko Brkusanin 0654ff703d [AMDGPU] Use ds_read/write_b96/b128 when possible for SDag 
Do not break down local loads and stores so ds_read/write_b96/b128 in
ISelLowering can be selected on subtargets that support them and if align
requirements allow them.

Differential Revision: https://reviews.llvm.org/D84403
 2020-08-21 12:26:31 +02:00
Stanislav Mekhanoshin c43e67bfff [AMDGPU] gfx1011/gfx1012 targets 
Differential Revision: https://reviews.llvm.org/D63307

llvm-svn: 363344
 2019-06-14 00:33:31 +00:00
Stanislav Mekhanoshin a224f68a10 [AMDGPU] gfx1010 DS implementation 
Differential Revision: https://reviews.llvm.org/D61332

llvm-svn: 359696
 2019-05-01 16:11:11 +00:00