3 Commits

Author	SHA1	Message	Date
Kazushi (Jam) Marukawa	5d549219df	[VE] Change to promote i32 AND/OR/XOR operations ... VE has only 64 bits AND/OR/XOR instructions. We pretended that VE has 32 bits instructions also, but doing it increase the number of generated instructions. Therefore, we decide to promote 32 bits operations and use only 64 bits instructions in back end. We also avoid pretending that VE has 32 bits LEA instruction. Update regression tests also. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D85726	2020-08-12 16:23:50 +09:00
Kazushi (Jam) Marukawa	605fd4d77c	[VE] Change calling convention to follow ABI ... Change to expand all arguments and return values to i64 to follow ABI. Update regression tests also. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D84581	2020-08-01 10:08:54 +09:00
Kazushi (Jam) Marukawa	0d989cb6ab	[VE] Support lowering to NND instruction ... Summary: Support NND instruction of Aurora VE. Add hasAndNot function also for optimization. Differential Revision: https://reviews.llvm.org/D81383	2020-06-09 10:18:14 +02:00