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55 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen 1c3da3a94b Rename MachineVerifier pass to avoid command line collision. 
llvm-svn: 71987
 2009-05-17 19:37:14 +00:00
Jakob Stoklund Olesen e61c7a3958 Verify that explicit definitions in the TargetInstrDesc are matched by 
explicit register define operands.

llvm-svn: 71933
 2009-05-16 07:25:20 +00:00
Jakob Stoklund Olesen c482d14565 Allow redefinition of reserved registers. 
llvm-svn: 71932
 2009-05-16 07:24:54 +00:00
Duncan Sands bdbc98f3ef Pacify gcc-4.3, which suggests explicit braces here 
to avoid an ambiguous else.

llvm-svn: 71924
 2009-05-16 03:28:54 +00:00
Jakob Stoklund Olesen 36c027ab18 Pass to verify generated machine code. 
The following is checked:

* Operand counts: All explicit operands must be present.

* Register classes: All physical and virtual register operands must be
  compatible with the register class required by the instruction descriptor.

* Register live intervals: Registers must be defined only once, and must be
  defined before use.

The machine code verifier is enabled with the command-line option
'-verify-machineinstrs', or by defining the environment variable
LLVM_VERIFY_MACHINEINSTRS to the name of a file that will receive all the
verifier errors.

llvm-svn: 71918
 2009-05-16 00:33:53 +00:00