a1ebbac9c0
expand count-leading/trailing-zeros; the test 2005-05-11-Popcount-ffs-fls.c
...
should now pass (the "LLVM" and "REF" results should be identical)
llvm-svn: 21866
2005-05-11 08:45:08 +00:00
7247324047
Add some notes for expanding clz/ctz
...
llvm-svn: 21862
2005-05-11 05:27:09 +00:00
05309bf58e
Simplify this code, use the proper shift amount
...
llvm-svn: 21861
2005-05-11 05:21:31 +00:00
3740f39883
Legalize this correctly
...
llvm-svn: 21859
2005-05-11 05:09:47 +00:00
55e9cde37c
implement expansion of ctpop nodes, implementing CodeGen/Generic/llvm-ct-intrinsics.ll
...
llvm-svn: 21856
2005-05-11 04:51:16 +00:00
ba45e6c432
legalize readio/writeio into a load/store if requested
...
llvm-svn: 21827
2005-05-09 20:36:57 +00:00
5385db5523
legalize READPORT, WRITEPORT, READIO, WRITEIO, at least in the basic cases
...
where they are directly supported by the architecture. Wrap a bunch of
long lines :(
llvm-svn: 21826
2005-05-09 20:23:03 +00:00
2dbbb3ab84
ctpop lowering in legalize
...
llvm-svn: 21697
2005-05-05 15:55:21 +00:00
dd426dd04d
Make promoteOp work for CT*
...
Proof?
ubyte %bar(ubyte %x) {
entry:
%tmp.1 = call ubyte %llvm.ctlz( ubyte %x )
ret ubyte %tmp.1
}
==>
zapnot $16,1,$0
CTLZ $0,$0
subq $0,56,$0
zapnot $0,1,$0
ret $31,($26),1
llvm-svn: 21691
2005-05-04 19:11:05 +00:00
5e177826fd
Implement count leading zeros (ctlz), count trailing zeros (cttz), and count
...
population (ctpop). Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.
More coming soon.
llvm-svn: 21676
2005-05-03 17:19:30 +00:00
8002640eab
Codegen and legalize sin/cos/llvm.sqrt as FSIN/FCOS/FSQRT calls. This patch
...
was contributed by Morten Ofstad, with some minor tweaks and bug fixes added
by me.
llvm-svn: 21636
2005-04-30 04:43:14 +00:00
9d6fa98ec7
Legalize FSQRT, FSIN, FCOS nodes, patch contributed by Morten Ofstad
...
llvm-svn: 21606
2005-04-28 21:44:33 +00:00
4a73c2cfdc
Implement Value* tracking for loads and stores in the selection DAG. This enables one to use alias analysis in the backends.
...
(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*. Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.
llvm-svn: 21599
2005-04-27 20:10:01 +00:00
835702a094
Remove trailing whitespace
...
llvm-svn: 21420
2005-04-21 22:36:52 +00:00
e69ad5fd12
Implement expansion of unsigned i64 -> FP.
...
Note that this probably only works for little endian targets, but is enough
to get siod working :)
llvm-svn: 21280
2005-04-13 05:09:42 +00:00
0efd77eda7
Make expansion of uint->fp cast assert out instead of infinitely recurse.
...
llvm-svn: 21275
2005-04-13 03:42:14 +00:00
0e852afb4c
Instead of making ZERO_EXTEND_INREG nodes, use the helper method in
...
SelectionDAG to do the job with AND. Don't legalize Z_E_I anymore as
it is gone
llvm-svn: 21266
2005-04-13 02:38:47 +00:00
0b73a6d8bc
promote extload i1 -> extload i8
...
llvm-svn: 21258
2005-04-12 20:30:10 +00:00
aedcabe8db
Emit comparisons against the sign bit better. Codegen this:
...
bool %test1(long %X) {
%A = setlt long %X, 0
ret bool %A
}
like this:
test1:
cmpl $0, 8(%esp)
setl %al
movzbl %al, %eax
ret
instead of:
test1:
movl 8(%esp), %ecx
cmpl $0, %ecx
setl %al
movzbw %al, %ax
cmpl $0, 4(%esp)
setb %dl
movzbw %dl, %dx
cmpl $0, %ecx
cmove %dx, %ax
movzbl %al, %eax
ret
llvm-svn: 21243
2005-04-12 02:19:10 +00:00
71ff44e46c
Emit long comparison against -1 better. Instead of this (x86):
...
test2:
movl 8(%esp), %eax
notl %eax
movl 4(%esp), %ecx
notl %ecx
orl %eax, %ecx
cmpl $0, %ecx
sete %al
movzbl %al, %eax
ret
or this (PPC):
_test2:
nor r2, r4, r4
nor r3, r3, r3
or r2, r2, r3
cntlzw r2, r2
srwi r3, r2, 5
blr
Emit this:
test2:
movl 8(%esp), %eax
andl 4(%esp), %eax
cmpl $-1, %eax
sete %al
movzbl %al, %eax
ret
or this:
_test2:
.LBB_test2_0: ;
and r2, r4, r3
cmpwi cr0, r2, -1
li r3, 1
li r2, 0
beq .LBB_test2_2 ;
.LBB_test2_1: ;
or r3, r2, r2
.LBB_test2_2: ;
blr
it seems like the PPC isel could do better for R32 == -1 case.
llvm-svn: 21242
2005-04-12 01:46:05 +00:00
8ffd004920
Teach the dag mechanism that this:
...
long long test2(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) + B;
}
is equivalent to this:
long long test1(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) | B;
}
Now they are both codegen'd to this on ppc:
_test2:
blr
or this on x86:
test2:
movl 4(%esp), %edx
movl 8(%esp), %eax
ret
llvm-svn: 21231
2005-04-11 20:29:59 +00:00
edd197062f
Fix expansion of shifts by exactly NVT bits on arch's (like X86) that have
...
masking shifts.
This fixes the miscompilation of this:
long long test1(unsigned A, unsigned B) {
return ((unsigned long long)A << 32) | B;
}
into this:
test1:
movl 4(%esp), %edx
movl %edx, %eax
orl 8(%esp), %eax
ret
allowing us to generate this instead:
test1:
movl 4(%esp), %edx
movl 8(%esp), %eax
ret
llvm-svn: 21230
2005-04-11 20:08:52 +00:00
add0c63ad2
Fix libcall code to not pass a NULL Chain to LowerCallTo
...
Fix libcall code to not crash or assert looking for an ADJCALLSTACKUP node
when it is known that there is no ADJCALLSTACKDOWN to match.
Expand i64 multiply when ISD::MULHU is legal for the target.
llvm-svn: 21214
2005-04-11 03:01:51 +00:00
a3b7ef05f4
Teach legalize to deal with targets that don't support some SEXTLOAD/ZEXTLOADs
...
llvm-svn: 21212
2005-04-10 22:54:25 +00:00
391a351ede
don't zextload fp values!
...
llvm-svn: 21209
2005-04-10 17:40:35 +00:00
c53cd501b5
Until we have a dag combiner, promote using zextload's instead of extloads.
...
This gives the optimizer a bit of information about the top-part of the
value.
llvm-svn: 21205
2005-04-10 04:33:47 +00:00
d8cbfe82ba
Fix a thinko. If the operand is promoted, pass the promoted value into
...
the new zero extend, not the original operand. This fixes cast bool -> long
on ppc.
Add an unrelated fixme
llvm-svn: 21196
2005-04-10 01:13:15 +00:00
fd98678a8a
Legalize BRCONDTWOWAY into a BRCOND/BR pair if a target doesn't support it.
...
llvm-svn: 21166
2005-04-09 03:30:19 +00:00
b067492535
Teach ExpandShift how to handle shifts by a constant. This allows targets
...
like PowerPC to codegen long shifts in many fewer instructions.
llvm-svn: 21122
2005-04-06 21:13:14 +00:00
20b7d2a36f
Expand SREM and UREM for targets that claim not to have them, like PowerPC
...
llvm-svn: 21103
2005-04-06 00:23:54 +00:00
cc00a7c42d
Handle expanding arguments to ISD::TRUNCATE. This happens on PowerPC when
...
you have something like i16 = truncate i64. This fixes Regression/C/casts
llvm-svn: 21073
2005-04-04 00:57:08 +00:00
4784489de2
Fix sign_extend and zero_extend of promoted value types to expanded value
...
types. This occurs when casting short to long on PPC for example.
llvm-svn: 21072
2005-04-03 23:41:52 +00:00
a0c72cf289
Expand fabs into fneg
...
llvm-svn: 21013
2005-04-02 05:26:37 +00:00
13fe99c807
Several changes mixed up here. First when legalizing a DAG with pcmarker,
...
dont' regen the whole dag if unneccesary. Second, fix and ugly bug with
the _PARTS nodes that caused legalize to produce multiples of them.
Finally, implement initial support for FABS and FNEG. Currently FNEG is
the only one to be trusted though.
llvm-svn: 21009
2005-04-02 05:00:07 +00:00
4157c417a1
fix some bugs in the implementation of SHL_PARTS and friends.
...
llvm-svn: 21004
2005-04-02 04:00:59 +00:00
2e5872c671
Turn expanded shift operations into (e.g.) SHL_PARTS if the target supports it.
...
llvm-svn: 21002
2005-04-02 03:38:53 +00:00
07f97d5f55
Fix a bug when inserting a libcall into a function with no other calls.
...
llvm-svn: 20999
2005-04-02 03:22:40 +00:00
69d39433c4
Fix a warning about an unhandled switch case
...
llvm-svn: 20994
2005-04-02 00:41:14 +00:00
cda9aa7fa9
Add ISD::UNDEF node
...
Teach the SelectionDAG code how to expand and promote it
Have PPC32 LowerCallTo generate ISD::UNDEF for int arg regs used up by fp
arguments, but not shadowing their value. This allows us to do the right
thing with both fixed and vararg floating point arguments.
llvm-svn: 20988
2005-04-01 22:34:39 +00:00
dec53920b4
PCMarker support for DAG and Alpha
...
llvm-svn: 20965
2005-03-31 21:24:06 +00:00
32e08b7c06
implement legalization of build_pair for nate
...
llvm-svn: 20901
2005-03-28 22:03:13 +00:00
f656525cb6
Change interface to LowerCallTo to take a boolean isVarArg argument.
...
llvm-svn: 20842
2005-03-26 01:29:23 +00:00
a474313902
Fix a bug in the 'store fpimm, ptr' -> 'store intimm, ptr' handling code.
...
Changing 'op' here caused us to not enter the store into a map, causing
reemission of the code!! In practice, a simple loop like this:
no_exit: ; preds = %no_exit, %entry
%indvar = phi uint [ %indvar.next, %no_exit ], [ 0, %entry ] ; <uint> [#uses=3]
%tmp.4 = getelementptr "complex long double"* %P, uint %indvar, uint 0 ; <double*> [#uses=1]
store double 0.000000e+00, double* %tmp.4
%indvar.next = add uint %indvar, 1 ; <uint> [#uses=2]
%exitcond = seteq uint %indvar.next, %N ; <bool> [#uses=1]
br bool %exitcond, label %return, label %no_exit
was being code gen'd to:
.LBBtest_1: # no_exit
movl %edx, %esi
shll $4, %esi
movl $0, 4(%eax,%esi)
movl $0, (%eax,%esi)
incl %edx
movl $0, (%eax,%esi)
movl $0, 4(%eax,%esi)
cmpl %ecx, %edx
jne .LBBtest_1 # no_exit
Note that we are doing 4 32-bit stores instead of 2. Now we generate:
.LBBtest_1: # no_exit
movl %edx, %esi
incl %esi
shll $4, %edx
movl $0, (%eax,%edx)
movl $0, 4(%eax,%edx)
cmpl %ecx, %esi
movl %esi, %edx
jne .LBBtest_1 # no_exit
This is much happier, though it would be even better if the increment of ESI
was scheduled after the compare :-/
llvm-svn: 20265
2005-02-22 07:23:39 +00:00
0559691163
Fix a case where were incorrectly compiled cast from short to int on 64-bit
...
targets.
llvm-svn: 20030
2005-02-04 18:39:19 +00:00
5aa75e4ce5
Fix yet another memset issue.
...
llvm-svn: 19986
2005-02-02 03:44:41 +00:00
4487b2e5a6
Fix some bugs andrew noticed legalizing memset for alpha
...
llvm-svn: 19969
2005-02-01 18:38:28 +00:00
bc7497d5f5
Alpha doesn't have a native f32 extload instruction.
...
llvm-svn: 19880
2005-01-28 22:58:25 +00:00
bf8c1ad313
implement legalization of truncates whose results and sources need to be
...
truncated, e.g. (truncate:i8 something:i16) on a 32 or 64-bit RISC.
llvm-svn: 19879
2005-01-28 22:52:50 +00:00
a4cfafe31a
Get alpha working with memset/memcpy/memmove
...
llvm-svn: 19878
2005-01-28 22:29:18 +00:00
eb6614d719
CopyFromReg produces two values. Make sure that we remember that both are
...
legalized, and actually return the correct result when we legalize the chain first.
llvm-svn: 19866
2005-01-28 06:27:38 +00:00
0dfd7d3a0d
Silence optimized warnings.
...
llvm-svn: 19797
2005-01-23 23:19:44 +00:00
4add7e356f
Adjust to changes in SelectionDAG interfaces
...
The first half of correct chain insertion for libcalls. This is not enough
to fix Fhourstones yet though.
llvm-svn: 19781
2005-01-23 04:42:50 +00:00
ec2183713c
Fix problems with non-x86 targets.
...
llvm-svn: 19738
2005-01-22 00:31:52 +00:00
aac464e6c0
Refactor libcall code a bit. Initial implementation of expanding int -> FP
...
operations for 64-bit integers.
llvm-svn: 19724
2005-01-21 06:05:23 +00:00
4d25c04f94
Simplify the shift-expansion code.
...
llvm-svn: 19721
2005-01-20 20:29:23 +00:00
b3f83b28a5
Expand add/sub into ADD_PARTS/SUB_PARTS instead of a non-existant libcall.
...
llvm-svn: 19715
2005-01-20 18:52:28 +00:00
3d95c14d94
Add support for targets that pass args in registers to calls.
...
llvm-svn: 19703
2005-01-19 20:24:35 +00:00
55562fa99a
Fold single use token factor nodes into other token factor nodes.
...
llvm-svn: 19701
2005-01-19 19:10:54 +00:00
0d03eb45a8
Realize the individual pieces of an expanded copytoreg/store/load are
...
independent of each other.
llvm-svn: 19700
2005-01-19 18:02:17 +00:00
2a7f8a94f4
Implement a way of expanding shifts. This applies to targets that offer
...
select operations or to shifts that are by a constant. This automatically
implements (with no special code) all of the special cases for shift by 32,
shift by < 32 and shift by > 32.
llvm-svn: 19679
2005-01-19 04:19:40 +00:00
42993e45b6
Zero is cheaper than sign extend.
...
llvm-svn: 19675
2005-01-18 21:57:59 +00:00
d65c3f3118
Fix some fixmes (promoting bools for select and brcond), fix promotion
...
of zero and sign extends.
llvm-svn: 19671
2005-01-18 19:27:06 +00:00
9f2c4a5200
Teach legalize to promote copy(from|to)reg, instead of making the isel pass
...
do it. This results in better code on X86 for floats (because if strict
precision is not required, we can elide some more expensive double -> float
conversions like the old isel did), and allows other targets to emit
CopyFromRegs that are not legal for arguments.
llvm-svn: 19668
2005-01-18 17:54:55 +00:00
2cb338d7b5
Teach legalize to promote SetCC results.
...
llvm-svn: 19657
2005-01-18 02:59:52 +00:00
b07e2d2084
Allow setcc operations to have nonbool types.
...
llvm-svn: 19656
2005-01-18 02:52:03 +00:00
5c8a85e2d8
Implement legalize of call nodes.
...
llvm-svn: 19617
2005-01-16 19:46:48 +00:00
3c0dd46a3b
Revamp supported ops. Instead of just being supported or not, we now keep
...
track of how to deal with it, and provide the target with a hook that they
can use to legalize arbitrary operations in arbitrary ways.
Implement custom lowering for a couple of ops, implement promotion for select
operations (which x86 needs).
llvm-svn: 19613
2005-01-16 07:29:19 +00:00
3ba56b3fe7
Implement some more missing promotions.
...
llvm-svn: 19606
2005-01-16 05:06:12 +00:00
73b6977700
Clarify assertion.
...
llvm-svn: 19597
2005-01-16 02:23:34 +00:00
87a769cbd4
Move some information into the TargetLowering object.
...
llvm-svn: 19583
2005-01-16 01:11:45 +00:00
71d7f6e86f
legalize a bunch of operations that I missed.
...
llvm-svn: 19580
2005-01-16 00:38:00 +00:00
207a962c2c
Fix some serious bugs in promotion.
...
llvm-svn: 19578
2005-01-16 00:17:42 +00:00
4d97864e92
Implement promotion of a whole bunch more operators. I think that this is
...
basically everything.
llvm-svn: 19576
2005-01-15 22:16:26 +00:00
99222f706c
Add support for legalizing FP_ROUND_INREG, SIGN_EXTEND_INREG, and
...
ZERO_EXTEND_INREG for targets that don't support them.
llvm-svn: 19573
2005-01-15 07:15:18 +00:00
c6c9a5b07d
Add support for promoting ADD/MUL.
...
Add support for new SIGN_EXTEND_INREG, ZERO_EXTEND_INREG, and FP_ROUND_INREG operators.
Realize that if we do any promotions, we need to iterate SelectionDAG
construction.
llvm-svn: 19569
2005-01-15 06:18:18 +00:00
1f2c9d82fa
Add intitial support for promoting some operators.
...
llvm-svn: 19565
2005-01-15 05:21:40 +00:00
3b8e719d1d
Adjust to CopyFromReg changes, implement deletion of truncating/extending
...
stores/loads.
llvm-svn: 19562
2005-01-14 22:38:01 +00:00
39c6744c9f
Start implementing truncating stores and extending loads.
...
llvm-svn: 19559
2005-01-14 22:08:15 +00:00
e727af06c8
Add new ImplicitDef node, rename CopyRegSDNode class to RegSDNode.
...
llvm-svn: 19535
2005-01-13 20:50:02 +00:00
05b4e37e85
Legalize new node, add assertion.
...
llvm-svn: 19527
2005-01-13 17:59:25 +00:00
9864b08f94
Fix sign extend to long. When coming from sbyte, we used to generate:
...
movsbl 4(%esp), %eax
movl %eax, %edx
sarl $7, %edx
Now we generate:
movsbl 4(%esp), %eax
movl %eax, %edx
sarl $31, %edx
Which is right.
llvm-svn: 19515
2005-01-12 18:19:52 +00:00
6dced92447
Shut up warnings with GCC 3.4.3 about uninitialized variables.
...
llvm-svn: 19512
2005-01-12 14:53:45 +00:00
f49c27c65c
Squelch optimized warning.
...
llvm-svn: 19475
2005-01-11 17:46:49 +00:00
85d70c6fd5
Teach legalize to lower MEMSET/MEMCPY/MEMMOVE operations if the target
...
does not support them.
llvm-svn: 19465
2005-01-11 05:57:22 +00:00
be02d430a9
Lower to the correct functions. This fixes FreeBench/fourinarow
...
llvm-svn: 19436
2005-01-10 21:02:37 +00:00
9242c504da
Fix a bug legalizing call instructions (make sure to remember all result
...
values), and eliminate some switch statements.
llvm-svn: 19417
2005-01-09 19:43:23 +00:00
02f5ce2077
Fix a minor bug legalizing dynamic_stackalloc. This allows us to compile
...
std::__pad<wchar_t, std::char_traits<wchar_t> >::_S_pad(std::ios_base&, wchar_t, wchar_t*, wchar_t const*, int, int, bool)
from libstdc++
llvm-svn: 19416
2005-01-09 19:07:54 +00:00
ec26b48d61
Teach legalize to deal with DYNAMIC_STACKALLOC (aka a dynamic llvm alloca)
...
llvm-svn: 19415
2005-01-09 19:03:49 +00:00
c0f31c5e96
Tighten up assertions.
...
llvm-svn: 19397
2005-01-08 20:35:13 +00:00
d006195517
Silence VS warnings.
...
llvm-svn: 19384
2005-01-08 19:52:31 +00:00
7e6eeba6c5
Implement handling of most long operators through libcalls.
...
Fix a bug legalizing "ret (Val,Val)"
llvm-svn: 19375
2005-01-08 19:27:05 +00:00
2a6db3c351
Add support for FP->INT conversions and back.
...
llvm-svn: 19369
2005-01-08 08:08:56 +00:00
e69daaf71d
Implement the 'store FPIMM, Ptr' -> 'store INTIMM, Ptr' optimization for
...
all targets.
llvm-svn: 19366
2005-01-08 06:25:56 +00:00
a65a2f0c36
Add support for truncating integer casts from long.
...
llvm-svn: 19358
2005-01-07 22:37:48 +00:00
ea4ca94cae
Fix a bug in load expansion legalization and ret legalization. This fixes
...
CodeGen/Generic/select.ll:castconst.
llvm-svn: 19357
2005-01-07 22:28:47 +00:00
68a12140c0
Legalize unconditional branches too
...
llvm-svn: 19356
2005-01-07 22:12:08 +00:00
19a83990e1
Implement support for long GEP indices on 32-bit archs and support for
...
int GEP indices on 64-bit archs.
llvm-svn: 19354
2005-01-07 21:56:57 +00:00
32f20bfa93
implement legalization of a bunch more operators.
...
llvm-svn: 19352
2005-01-07 21:45:56 +00:00
fa854eb012
Fix another bug legalizing calls!
...
llvm-svn: 19350
2005-01-07 21:35:32 +00:00
f025d6788c
Fix a bug legalizing calls
...
llvm-svn: 19348
2005-01-07 21:34:13 +00:00
473825ccec
After legalizing a DAG, delete dead nodes to save space.
...
llvm-svn: 19346
2005-01-07 21:09:37 +00:00
ec3fe7c4a8
Teach legalize how to handle condbranches
...
llvm-svn: 19339
2005-01-07 08:19:42 +00:00
dc75059005
Initial implementation of the DAG legalization. This still has a long way
...
to go, but it does work for some non-trivial cases now.
llvm-svn: 19329
2005-01-07 07:47:09 +00:00
Duraid Madina